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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: arm-soc <arm@kernel.org>, soc <soc@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [GIT PULL 6/7] Renesas RISC-V DT updates for v6.2
Date: Fri, 18 Nov 2022 17:45:03 +0100	[thread overview]
Message-ID: <cover.1668788930.git.geert+renesas@glider.be> (raw)
In-Reply-To: <cover.1668788918.git.geert+renesas@glider.be>

The following changes since commit b9a0be2054964026aa58966ce9724b672f210835:

  arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts (2022-10-28 14:23:00 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-dt-for-v6.2-tag1

for you to fetch changes up to 40005cb6093e92d24a1bdbc444311c25e4b28878:

  riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C (2022-11-17 20:27:02 +0100)

----------------------------------------------------------------
Renesas RISC-V DT updates for v6.2

  - Add initial support for the Renesas RZ/Five SoC and the Renesas
    RZ/Five SMARC EVK development board.

----------------------------------------------------------------
Lad Prabhakar (5):
      riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC
      riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
      MAINTAINERS: Add entry for Renesas RISC-V
      riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
      riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

 MAINTAINERS                                        |  3 +-
 arch/riscv/boot/dts/Makefile                       |  1 +
 arch/riscv/boot/dts/renesas/Makefile               |  2 +
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi        | 59 ++++++++++++++++++++
 arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dts | 27 +++++++++
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi  | 47 ++++++++++++++++
 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi      | 64 ++++++++++++++++++++++
 7 files changed, 202 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/boot/dts/renesas/Makefile
 create mode 100644 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
 create mode 100644 arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dts
 create mode 100644 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
 create mode 100644 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi

  parent reply	other threads:[~2022-11-18 16:45 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18 16:44 [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two) Geert Uytterhoeven
2022-11-18 16:44 ` [GIT PULL 1/7] Renesas ARM defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:44 ` [GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two) Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 3/7] Renesas driver " Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 4/7] Renesas DT binding " Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:45 ` Geert Uytterhoeven [this message]
2022-11-18 16:45 ` [GIT PULL 7/7] Renesas RISC-V SoC " Geert Uytterhoeven
2022-11-21 14:52 ` [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two) patchwork-bot+linux-soc

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