From: Alex Hung <alex.hung@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <Sunpeng.Li@amd.com>,
<Rodrigo.Siqueira@amd.com>, <Aurabindo.Pillai@amd.com>,
<roman.li@amd.com>, <wayne.lin@amd.com>,
<agustin.gutierrez@amd.com>, <chiahsuan.chung@amd.com>,
<jerry.zuo@amd.com>, "Leo (Hanghong) Ma" <hanghong.ma@amd.com>,
Wenjing Liu <wenjing.liu@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
<stable@vger.kernel.org>, Alex Hung <alex.hung@amd.com>
Subject: [PATCH 17/39] drm/amd/display: Always enable HPO for DCN4 dGPU
Date: Thu, 20 Jun 2024 10:11:23 -0600 [thread overview]
Message-ID: <20240620161145.2489774-18-alex.hung@amd.com> (raw)
In-Reply-To: <20240620161145.2489774-1-alex.hung@amd.com>
From: "Leo (Hanghong) Ma" <hanghong.ma@amd.com>
[WHY && HOW]
Some DP EDID CTS tests fail due to HPO disable, and we should keep it
enable on DCN4 dGPU.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
---
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 2 ++
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index 42753f56d31d..79a911e1a09a 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -408,6 +408,8 @@ void dcn401_init_hw(struct dc *dc)
REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);
}
+ dcn401_setup_hpo_hw_control(hws, true);
+
if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks)
dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub);
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
index 1cf0608e1980..8159fd838dc3 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
@@ -137,7 +137,6 @@ static const struct hwseq_private_funcs dcn401_private_funcs = {
.program_mall_pipe_config = dcn32_program_mall_pipe_config,
.update_force_pstate = dcn32_update_force_pstate,
.update_mall_sel = dcn32_update_mall_sel,
- .setup_hpo_hw_control = dcn401_setup_hpo_hw_control,
.calculate_dccg_k1_k2_values = NULL,
.apply_single_controller_ctx_to_hw = dce110_apply_single_controller_ctx_to_hw,
.reset_back_end_for_pipe = dcn20_reset_back_end_for_pipe,
--
2.34.1
next prev parent reply other threads:[~2024-06-20 16:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240620161145.2489774-1-alex.hung@amd.com>
2024-06-20 16:11 ` [PATCH 06/39] drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present Alex Hung
2024-06-20 16:11 ` [PATCH 09/39] drm/amd/display: Fix cursor size issues Alex Hung
2024-06-20 16:11 ` [PATCH 16/39] drm/amd/display: Use sw cursor for DCN401 with rotation Alex Hung
2024-06-20 16:11 ` Alex Hung [this message]
2024-06-20 16:11 ` [PATCH 18/39] drm/amd/display: resync OTG after DIO FIFO resync Alex Hung
2024-06-20 16:11 ` [PATCH 19/39] drm/amd/display: Call dpmm when checking mode support Alex Hung
2024-06-20 16:11 ` [PATCH 21/39] drm/amd/display: Make DML2.1 P-State method force per stream Alex Hung
2024-06-20 16:36 ` Greg KH
2024-06-20 16:11 ` [PATCH 22/39] drm/amd/display: Fix reduced resolution and refresh rate Alex Hung
2024-06-20 16:11 ` [PATCH 24/39] drm/amd/display: Program CURSOR_DST_X_OFFSET in viewport space Alex Hung
2024-06-20 16:11 ` [PATCH 25/39] drm/amd/display: Reset DSC memory status Alex Hung
2024-06-20 16:11 ` [PATCH 26/39] drm/amd/display: Wait for double buffer update on ODM changes Alex Hung
2024-06-20 16:11 ` [PATCH 27/39] drm/amd/display: Fix cursor issues with ODMs and magnification Alex Hung
2024-06-20 16:11 ` [PATCH 28/39] drm/amd/display: Add HW cursor visual confirm Alex Hung
2024-06-20 16:11 ` [PATCH 30/39] drm/amd/display: Adjust reg field for DSC wait for disconnect Alex Hung
2024-06-20 16:11 ` [PATCH 31/39] drm/amd/display: Fix 1DLUT setting for NL SDR blending Alex Hung
2024-06-20 16:11 ` [PATCH 32/39] drm/amd/display: Use periodic detection for ipx/headless Alex Hung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240620161145.2489774-18-alex.hung@amd.com \
--to=alex.hung@amd.com \
--cc=Aurabindo.Pillai@amd.com \
--cc=Harry.Wentland@amd.com \
--cc=Rodrigo.Siqueira@amd.com \
--cc=Sunpeng.Li@amd.com \
--cc=agustin.gutierrez@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=chiahsuan.chung@amd.com \
--cc=hanghong.ma@amd.com \
--cc=jerry.zuo@amd.com \
--cc=mario.limonciello@amd.com \
--cc=roman.li@amd.com \
--cc=stable@vger.kernel.org \
--cc=wayne.lin@amd.com \
--cc=wenjing.liu@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox