From: Alex Hung <alex.hung@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <Sunpeng.Li@amd.com>,
<Rodrigo.Siqueira@amd.com>, <Aurabindo.Pillai@amd.com>,
<roman.li@amd.com>, <wayne.lin@amd.com>,
<agustin.gutierrez@amd.com>, <chiahsuan.chung@amd.com>,
<jerry.zuo@amd.com>, Ryan Seto <ryanseto@amd.com>,
Wenjing Liu <wenjing.liu@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
<stable@vger.kernel.org>, Alex Hung <alex.hung@amd.com>
Subject: [PATCH 30/39] drm/amd/display: Adjust reg field for DSC wait for disconnect
Date: Thu, 20 Jun 2024 10:11:36 -0600 [thread overview]
Message-ID: <20240620161145.2489774-31-alex.hung@amd.com> (raw)
In-Reply-To: <20240620161145.2489774-1-alex.hung@amd.com>
From: Ryan Seto <ryanseto@amd.com>
[WHY]
DSC was waiting for the wrong field to disconnect cleanly.
[HOW]
Changed field the DSC disconnect was waiting on.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ryan Seto <ryanseto@amd.com>
---
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h | 4 +++-
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h b/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h
index a23308a785bc..1fb90b52b814 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h
@@ -454,7 +454,9 @@
type DSCCIF_UPDATE_TAKEN_ACK; \
type DSCRM_DSC_FORWARD_EN; \
type DSCRM_DSC_OPP_PIPE_SOURCE; \
- type DSCRM_DSC_DOUBLE_BUFFER_REG_UPDATE_PENDING
+ type DSCRM_DSC_DOUBLE_BUFFER_REG_UPDATE_PENDING; \
+ type DSCRM_DSC_FORWARD_EN_STATUS
+
struct dcn20_dsc_registers {
uint32_t DSC_TOP_CONTROL;
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
index 52f23bb554af..6acb6699f146 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
@@ -208,7 +208,7 @@ static void dsc401_wait_disconnect_pending_clear(struct display_stream_compresso
{
struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);
- REG_WAIT(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_DOUBLE_BUFFER_REG_UPDATE_PENDING, 0, 2, 50000);
+ REG_WAIT(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN_STATUS, 0, 2, 50000);
}
static void dsc401_disconnect(struct display_stream_compressor *dsc)
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h b/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h
index 2143e81ca22a..3c9fa8988974 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h
@@ -196,7 +196,8 @@
DSC2_SF(DSCCIF0, DSCCIF_CONFIG0__BITS_PER_COMPONENT, mask_sh), \
DSC_SF(DSCCIF0_DSCCIF_CONFIG0, DOUBLE_BUFFER_REG_UPDATE_PENDING, mask_sh), \
DSC_SF(DSCRM0_DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN, mask_sh), \
- DSC_SF(DSCRM0_DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_OPP_PIPE_SOURCE, mask_sh)
+ DSC_SF(DSCRM0_DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_OPP_PIPE_SOURCE, mask_sh), \
+ DSC_SF(DSCRM0_DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN_STATUS, mask_sh)
struct dcn401_dsc_registers {
uint32_t DSC_TOP_CONTROL;
--
2.34.1
next prev parent reply other threads:[~2024-06-20 16:19 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240620161145.2489774-1-alex.hung@amd.com>
2024-06-20 16:11 ` [PATCH 06/39] drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present Alex Hung
2024-06-20 16:11 ` [PATCH 09/39] drm/amd/display: Fix cursor size issues Alex Hung
2024-06-20 16:11 ` [PATCH 16/39] drm/amd/display: Use sw cursor for DCN401 with rotation Alex Hung
2024-06-20 16:11 ` [PATCH 17/39] drm/amd/display: Always enable HPO for DCN4 dGPU Alex Hung
2024-06-20 16:11 ` [PATCH 18/39] drm/amd/display: resync OTG after DIO FIFO resync Alex Hung
2024-06-20 16:11 ` [PATCH 19/39] drm/amd/display: Call dpmm when checking mode support Alex Hung
2024-06-20 16:11 ` [PATCH 21/39] drm/amd/display: Make DML2.1 P-State method force per stream Alex Hung
2024-06-20 16:36 ` Greg KH
2024-06-20 16:11 ` [PATCH 22/39] drm/amd/display: Fix reduced resolution and refresh rate Alex Hung
2024-06-20 16:11 ` [PATCH 24/39] drm/amd/display: Program CURSOR_DST_X_OFFSET in viewport space Alex Hung
2024-06-20 16:11 ` [PATCH 25/39] drm/amd/display: Reset DSC memory status Alex Hung
2024-06-20 16:11 ` [PATCH 26/39] drm/amd/display: Wait for double buffer update on ODM changes Alex Hung
2024-06-20 16:11 ` [PATCH 27/39] drm/amd/display: Fix cursor issues with ODMs and magnification Alex Hung
2024-06-20 16:11 ` [PATCH 28/39] drm/amd/display: Add HW cursor visual confirm Alex Hung
2024-06-20 16:11 ` Alex Hung [this message]
2024-06-20 16:11 ` [PATCH 31/39] drm/amd/display: Fix 1DLUT setting for NL SDR blending Alex Hung
2024-06-20 16:11 ` [PATCH 32/39] drm/amd/display: Use periodic detection for ipx/headless Alex Hung
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