* FAILED: patch "[PATCH] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort" failed to apply to 6.18-stable tree
@ 2026-07-20 12:17 gregkh
2026-07-22 18:00 ` [PATCH 6.18.y 1/2] arm64: dts: qcom: correct RBR opp entry Sasha Levin
0 siblings, 1 reply; 3+ messages in thread
From: gregkh @ 2026-07-20 12:17 UTC (permalink / raw)
To: abel.vesa, andersson, dmitry.baryshkov, konrad.dybcio; +Cc: stable
The patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x c17e220946675232d383620ed9cff6685735ec48
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<stable@vger.kernel.org>' --in-reply-to '2026072016-discern-gooey-8e42@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From c17e220946675232d383620ed9cff6685735ec48 Mon Sep 17 00:00:00 2001
From: Abel Vesa <abel.vesa@oss.qualcomm.com>
Date: Mon, 23 Mar 2026 12:01:12 +0200
Subject: [PATCH] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort
controllers
According to internal documentation, the corners specific for each rate
from the DP link clock are:
- LOWSVS_D1 -> 19.2 MHz
- LOWSVS -> 270 MHz
- SVS -> 540 MHz (594 MHz in case of DP3)
- SVS_L1 -> 594 MHz
- NOM -> 810 MHz
- NOM_L1 -> 810 MHz
- TURBO -> 810 MHz
So fix all tables for each of the four controllers according to the
documentation, but since DP0 through DP2 have the same entries in their
tables, lets drop the DP1 and DP2 and have all of them share the DP0
table instead. However keep a separate table for the DP3 as it is
different for the SVS, compared to the rest of the controllers.
The 19.2 MHz @ LOWSVS_D1 isn't needed as it's not an actual working
frequency and the controller will never select it. So remove it.
Cc: stable@vger.kernel.org # v6.9+
Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes")
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-hamoa-fix-dp3-opp-table-v3-1-a823776bd1b0@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 051dee076416..4ba751a65142 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -5744,18 +5744,18 @@ mdss_dp0_out: endpoint {
mdss_dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
+ required-opps = <&rpmhpd_opp_low_svs>;
};
opp-540000000 {
opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
@@ -5796,7 +5796,7 @@ mdss_dp1: displayport-controller@ae98000 {
<&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- operating-points-v2 = <&mdss_dp1_opp_table>;
+ operating-points-v2 = <&mdss_dp0_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
@@ -5829,30 +5829,6 @@ mdss_dp1_out: endpoint {
};
};
};
-
- mdss_dp1_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-810000000 {
- opp-hz = /bits/ 64 <810000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
};
mdss_dp2: displayport-controller@ae9a000 {
@@ -5885,7 +5861,7 @@ mdss_dp2: displayport-controller@ae9a000 {
<&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- operating-points-v2 = <&mdss_dp2_opp_table>;
+ operating-points-v2 = <&mdss_dp0_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
@@ -5917,30 +5893,6 @@ mdss_dp2_out: endpoint {
};
};
};
-
- mdss_dp2_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-810000000 {
- opp-hz = /bits/ 64 <810000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
};
mdss_dp3: displayport-controller@aea0000 {
@@ -6004,21 +5956,16 @@ mdss_dp3_out: endpoint {
mdss_dp3_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
required-opps = <&rpmhpd_opp_svs>;
};
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
opp-810000000 {
opp-hz = /bits/ 64 <810000000>;
required-opps = <&rpmhpd_opp_nom>;
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 6.18.y 1/2] arm64: dts: qcom: correct RBR opp entry
2026-07-20 12:17 FAILED: patch "[PATCH] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort" failed to apply to 6.18-stable tree gregkh
@ 2026-07-22 18:00 ` Sasha Levin
2026-07-22 18:00 ` [PATCH 6.18.y 2/2] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort controllers Sasha Levin
0 siblings, 1 reply; 3+ messages in thread
From: Sasha Levin @ 2026-07-22 18:00 UTC (permalink / raw)
To: stable; +Cc: Dmitry Baryshkov, Bjorn Andersson, Sasha Levin
From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
[ Upstream commit a5c21b9bd5f531e50141b0484faabb707b92f1e2 ]
DisplayPort Reduced Bit Rate uses link rate of 1.62 Gbps, the main link
clock should be 162 MHz. Having the incorrect frequency (160 MHz) in the
OPP table will result in selecting wrong link frequency. Correct the
entry in the OPP table.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260304-msm-fix-rbr-v1-1-b9eba986eaef@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stable-dep-of: c17e22094667 ("arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort controllers")
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 8 +++----
arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 +++----
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 12 +++++-----
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 32 +++++++++++++-------------
arch/arm64/boot/dts/qcom/sm6350.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 16 ++++++-------
11 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index ef20ea941aa918..fdb92cac20f7fa 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5138,8 +5138,8 @@ port@1 {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -5226,8 +5226,8 @@ port@1 {
dp1_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index a0df10a97c7f8a..d2207084b5967d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3448,8 +3448,8 @@ port@1 {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 4b04dea57ec8cc..c5c22724835f6b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -5192,8 +5192,8 @@ port@1 {
edp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -5291,8 +5291,8 @@ mdss_dp_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 85c2afcb417def..8ee3b0c5d004e3 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3303,8 +3303,8 @@ mdss_dp0_out: endpoint {
dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -3385,8 +3385,8 @@ mdss_dp1_out: endpoint {
dp1_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -3461,8 +3461,8 @@ mdss_edp_out: endpoint {
edp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index d89938e17e0930..40649fe7a50950 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -4754,8 +4754,8 @@ mdss0_dp0_out: endpoint {
mdss0_dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -4836,8 +4836,8 @@ mdss0_dp1_out: endpoint {
mdss0_dp1_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -4916,8 +4916,8 @@ mdss0_dp2_out: endpoint {
mdss0_dp2_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -4991,8 +4991,8 @@ mdss0_dp3_out: endpoint {
mdss0_dp3_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -6110,8 +6110,8 @@ mdss1_dp0_out: endpoint {
mdss1_dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -6190,8 +6190,8 @@ mdss1_dp1_out: endpoint {
mdss1_dp1_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -6270,8 +6270,8 @@ mdss1_dp2_out: endpoint {
mdss1_dp2_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -6345,8 +6345,8 @@ mdss1_dp3_out: endpoint {
mdss1_dp3_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 19a7b9f9ea8bcf..0c6787d46ddcd9 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2306,8 +2306,8 @@ mdss_dp_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index acdba79612aa8f..e1f480e3ed0b73 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3939,8 +3939,8 @@ mdss_dp_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index adf6b49b52c48c..79ba2c0c96b7e7 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4824,8 +4824,8 @@ mdss_dp_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index fc4ce9d4977e81..af892b76322fdf 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2925,8 +2925,8 @@ mdss_dp_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 6c00390010f1f7..2caf2571b95558 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3483,8 +3483,8 @@ mdss_dp0_out: endpoint {
dp_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index ee9c12600f95a1..062911cc208322 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5522,8 +5522,8 @@ mdss_dp0_out: endpoint {
mdss_dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -5610,8 +5610,8 @@ mdss_dp1_out: endpoint {
mdss_dp1_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -5697,8 +5697,8 @@ mdss_dp2_out: endpoint {
mdss_dp2_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
@@ -5779,8 +5779,8 @@ mdss_dp3_out: endpoint {
mdss_dp3_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-160000000 {
- opp-hz = /bits/ 64 <160000000>;
+ opp-162000000 {
+ opp-hz = /bits/ 64 <162000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
--
2.53.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 6.18.y 2/2] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort controllers
2026-07-22 18:00 ` [PATCH 6.18.y 1/2] arm64: dts: qcom: correct RBR opp entry Sasha Levin
@ 2026-07-22 18:00 ` Sasha Levin
0 siblings, 0 replies; 3+ messages in thread
From: Sasha Levin @ 2026-07-22 18:00 UTC (permalink / raw)
To: stable
Cc: Abel Vesa, Dmitry Baryshkov, Konrad Dybcio, Bjorn Andersson,
Sasha Levin
From: Abel Vesa <abel.vesa@oss.qualcomm.com>
[ Upstream commit c17e220946675232d383620ed9cff6685735ec48 ]
According to internal documentation, the corners specific for each rate
from the DP link clock are:
- LOWSVS_D1 -> 19.2 MHz
- LOWSVS -> 270 MHz
- SVS -> 540 MHz (594 MHz in case of DP3)
- SVS_L1 -> 594 MHz
- NOM -> 810 MHz
- NOM_L1 -> 810 MHz
- TURBO -> 810 MHz
So fix all tables for each of the four controllers according to the
documentation, but since DP0 through DP2 have the same entries in their
tables, lets drop the DP1 and DP2 and have all of them share the DP0
table instead. However keep a separate table for the DP3 as it is
different for the SVS, compared to the rest of the controllers.
The 19.2 MHz @ LOWSVS_D1 isn't needed as it's not an actual working
frequency and the controller will never select it. So remove it.
Cc: stable@vger.kernel.org # v6.9+
Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes")
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-hamoa-fix-dp3-opp-table-v3-1-a823776bd1b0@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 77 ++++----------------------
1 file changed, 12 insertions(+), 65 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 062911cc208322..adb18c10dbd9fe 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5522,18 +5522,18 @@ mdss_dp0_out: endpoint {
mdss_dp0_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
+ required-opps = <&rpmhpd_opp_low_svs>;
};
opp-540000000 {
opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
@@ -5574,7 +5574,7 @@ mdss_dp1: displayport-controller@ae98000 {
<&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- operating-points-v2 = <&mdss_dp1_opp_table>;
+ operating-points-v2 = <&mdss_dp0_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
@@ -5606,30 +5606,6 @@ mdss_dp1_out: endpoint {
};
};
};
-
- mdss_dp1_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-810000000 {
- opp-hz = /bits/ 64 <810000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
};
mdss_dp2: displayport-controller@ae9a000 {
@@ -5662,7 +5638,7 @@ mdss_dp2: displayport-controller@ae9a000 {
<&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_1_ss2_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- operating-points-v2 = <&mdss_dp2_opp_table>;
+ operating-points-v2 = <&mdss_dp0_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
@@ -5693,30 +5669,6 @@ mdss_dp2_out: endpoint {
};
};
};
-
- mdss_dp2_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-810000000 {
- opp-hz = /bits/ 64 <810000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
};
mdss_dp3: displayport-controller@aea0000 {
@@ -5779,19 +5731,14 @@ mdss_dp3_out: endpoint {
mdss_dp3_opp_table: opp-table {
compatible = "operating-points-v2";
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
+ required-opps = <&rpmhpd_opp_low_svs>;
};
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
+ opp-594000000 {
+ opp-hz = /bits/ 64 <594000000>;
+ required-opps = <&rpmhpd_opp_svs>;
};
opp-810000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2026-07-20 12:17 FAILED: patch "[PATCH] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort" failed to apply to 6.18-stable tree gregkh
2026-07-22 18:00 ` [PATCH 6.18.y 1/2] arm64: dts: qcom: correct RBR opp entry Sasha Levin
2026-07-22 18:00 ` [PATCH 6.18.y 2/2] arm64: dts: qcom: hamoa: Fix OPP tables for all DisplayPort controllers Sasha Levin
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