* FAILED: patch "[PATCH] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists" failed to apply to 6.18-stable tree
@ 2026-07-29 10:58 gregkh
2026-08-01 0:45 ` [PATCH 6.18.y 1/3] drm/xe/xe3: Apply wa_14024997852 Sasha Levin
0 siblings, 1 reply; 5+ messages in thread
From: gregkh @ 2026-07-29 10:58 UTC (permalink / raw)
To: ashutosh.dixit, thomas.hellstrom, umesh.nerlige.ramappa; +Cc: stable
The patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x e70086a3a06d276b4a5d9a2c51c9330c6cf72780
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<stable@vger.kernel.org>' --in-reply-to '2026072902-gorgeous-negligee-5e08@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From e70086a3a06d276b4a5d9a2c51c9330c6cf72780 Mon Sep 17 00:00:00 2001
From: Ashutosh Dixit <ashutosh.dixit@intel.com>
Date: Mon, 15 Jun 2026 15:42:19 -0700
Subject: [PATCH] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Unconditionally whitelisting OA registers is a security violation. Set
RING_FORCE_TO_NONPRIV_DENY bit in OA nonpriv slots, so that OA registers
don't get whitelisted by default after probe, gt reset, resume and engine
reset.
Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support")
Cc: stable@vger.kernel.org # v6.12+
Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patch.msgid.link/20260615224227.34880-2-ashutosh.dixit@intel.com
(cherry picked from commit 90511bdcfda97211c01f1d945d4ea616578d8fca)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index fb65940848d7..d3bfc05949ae 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -104,10 +104,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
RING_FORCE_TO_NONPRIV_ACCESS_RW))
},
+#define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY)
+
#define WHITELIST_OA_MMIO_TRG(trg, status, head) \
- WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
- WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \
- WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
+ WHITELIST_DENY(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
+ WHITELIST_DENY(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \
+ WHITELIST_DENY(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
#define WHITELIST_OAG_MMIO_TRG \
WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR)
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 6.18.y 1/3] drm/xe/xe3: Apply wa_14024997852 2026-07-29 10:58 FAILED: patch "[PATCH] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists" failed to apply to 6.18-stable tree gregkh @ 2026-08-01 0:45 ` Sasha Levin 2026-08-01 0:45 ` [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting Sasha Levin 2026-08-01 0:45 ` [PATCH 6.18.y 3/3] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Sasha Levin 0 siblings, 2 replies; 5+ messages in thread From: Sasha Levin @ 2026-08-01 0:45 UTC (permalink / raw) To: stable; +Cc: Tapani Pälli, Matt Roper, Sasha Levin From: Tapani Pälli <tapani.palli@intel.com> [ Upstream commit d24f7d1f62e2ed1bce9664566c32ea13677958f4 ] Whitelist registers needed for userspace to control autostrip on xe3. v2: fix GRAPHICS_VERSION to match xe3 (Matt) v3: use GRAPHICS_VERSION_RANGE to match all xe3 (Matt) Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20251029085057.54210-1-tapani.palli@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Stable-dep-of: e70086a3a06d ("drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists") Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/xe/xe_reg_whitelist.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index 21763dc51150..9f4b56808a27 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -88,6 +88,13 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)) }, + { XE_RTP_NAME("14024997852"), + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)), + XE_RTP_ACTIONS(WHITELIST(FF_MODE, + RING_FORCE_TO_NONPRIV_ACCESS_RW), + WHITELIST(VFLSKPD, + RING_FORCE_TO_NONPRIV_ACCESS_RW)) + }, }; static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) -- 2.53.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting 2026-08-01 0:45 ` [PATCH 6.18.y 1/3] drm/xe/xe3: Apply wa_14024997852 Sasha Levin @ 2026-08-01 0:45 ` Sasha Levin 2026-08-03 23:49 ` Dixit, Ashutosh 2026-08-01 0:45 ` [PATCH 6.18.y 3/3] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Sasha Levin 1 sibling, 1 reply; 5+ messages in thread From: Sasha Levin @ 2026-08-01 0:45 UTC (permalink / raw) To: stable; +Cc: Ashutosh Dixit, Umesh Nerlige Ramappa, Sasha Levin From: Ashutosh Dixit <ashutosh.dixit@intel.com> [ Upstream commit ed455775c5a68b75e5f6ad6c8e0e3e9c98fd3f64 ] Minor refactor of OAG MMIO trigger register whitelisting for code reuse with OAM MMIO trigger register whitelisting. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patch.msgid.link/20251202025115.373546-5-ashutosh.dixit@intel.com Stable-dep-of: e70086a3a06d ("drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists") Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/xe/xe_reg_whitelist.c | 41 +++++++++++++-------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index 9f4b56808a27..b9ddbad12a58 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -66,28 +66,6 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { ENGINE_CLASS(RENDER)), XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0)) }, - { XE_RTP_NAME("oa_reg_render"), - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), - ENGINE_CLASS(RENDER)), - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, - RING_FORCE_TO_NONPRIV_ACCESS_RW), - WHITELIST(OAG_OASTATUS, - RING_FORCE_TO_NONPRIV_ACCESS_RD), - WHITELIST(OAG_OAHEADPTR, - RING_FORCE_TO_NONPRIV_ACCESS_RD | - RING_FORCE_TO_NONPRIV_RANGE_4)) - }, - { XE_RTP_NAME("oa_reg_compute"), - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), - ENGINE_CLASS(COMPUTE)), - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, - RING_FORCE_TO_NONPRIV_ACCESS_RW), - WHITELIST(OAG_OASTATUS, - RING_FORCE_TO_NONPRIV_ACCESS_RD), - WHITELIST(OAG_OAHEADPTR, - RING_FORCE_TO_NONPRIV_ACCESS_RD | - RING_FORCE_TO_NONPRIV_RANGE_4)) - }, { XE_RTP_NAME("14024997852"), XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)), XE_RTP_ACTIONS(WHITELIST(FF_MODE, @@ -95,6 +73,25 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { WHITELIST(VFLSKPD, RING_FORCE_TO_NONPRIV_ACCESS_RW)) }, + +#define WHITELIST_OA_MMIO_TRG(trg, status, head) \ + WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ + WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ + WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) + +#define WHITELIST_OAG_MMIO_TRG \ + WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) + + { XE_RTP_NAME("oag_mmio_trg_rcs"), + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), + ENGINE_CLASS(RENDER)), + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) + }, + { XE_RTP_NAME("oag_mmio_trg_ccs"), + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), + ENGINE_CLASS(COMPUTE)), + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) + }, }; static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) -- 2.53.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting 2026-08-01 0:45 ` [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting Sasha Levin @ 2026-08-03 23:49 ` Dixit, Ashutosh 0 siblings, 0 replies; 5+ messages in thread From: Dixit, Ashutosh @ 2026-08-03 23:49 UTC (permalink / raw) To: Sasha Levin; +Cc: stable, Umesh Nerlige Ramappa, Greg Kroah-Hartman On Fri, 31 Jul 2026 17:45:32 -0700, Sasha Levin wrote: > Hi Sasha, I have backported this entire series to linux-6.18.y here: https://lore.kernel.org/stable/20260803232608.3276045-1-ashutosh.dixit@intel.com/ Thanks. -- Ashutosh > From: Ashutosh Dixit <ashutosh.dixit@intel.com> > > [ Upstream commit ed455775c5a68b75e5f6ad6c8e0e3e9c98fd3f64 ] > > Minor refactor of OAG MMIO trigger register whitelisting for code reuse > with OAM MMIO trigger register whitelisting. > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> > Link: https://patch.msgid.link/20251202025115.373546-5-ashutosh.dixit@intel.com > Stable-dep-of: e70086a3a06d ("drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists") > Signed-off-by: Sasha Levin <sashal@kernel.org> > --- > drivers/gpu/drm/xe/xe_reg_whitelist.c | 41 +++++++++++++-------------- > 1 file changed, 19 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c > index 9f4b56808a27..b9ddbad12a58 100644 > --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c > +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c > @@ -66,28 +66,6 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { > ENGINE_CLASS(RENDER)), > XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0)) > }, > - { XE_RTP_NAME("oa_reg_render"), > - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > - ENGINE_CLASS(RENDER)), > - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, > - RING_FORCE_TO_NONPRIV_ACCESS_RW), > - WHITELIST(OAG_OASTATUS, > - RING_FORCE_TO_NONPRIV_ACCESS_RD), > - WHITELIST(OAG_OAHEADPTR, > - RING_FORCE_TO_NONPRIV_ACCESS_RD | > - RING_FORCE_TO_NONPRIV_RANGE_4)) > - }, > - { XE_RTP_NAME("oa_reg_compute"), > - XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > - ENGINE_CLASS(COMPUTE)), > - XE_RTP_ACTIONS(WHITELIST(OAG_MMIOTRIGGER, > - RING_FORCE_TO_NONPRIV_ACCESS_RW), > - WHITELIST(OAG_OASTATUS, > - RING_FORCE_TO_NONPRIV_ACCESS_RD), > - WHITELIST(OAG_OAHEADPTR, > - RING_FORCE_TO_NONPRIV_ACCESS_RD | > - RING_FORCE_TO_NONPRIV_RANGE_4)) > - }, > { XE_RTP_NAME("14024997852"), > XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)), > XE_RTP_ACTIONS(WHITELIST(FF_MODE, > @@ -95,6 +73,25 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { > WHITELIST(VFLSKPD, > RING_FORCE_TO_NONPRIV_ACCESS_RW)) > }, > + > +#define WHITELIST_OA_MMIO_TRG(trg, status, head) \ > + WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ > + WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ > + WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) > + > +#define WHITELIST_OAG_MMIO_TRG \ > + WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) > + > + { XE_RTP_NAME("oag_mmio_trg_rcs"), > + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > + ENGINE_CLASS(RENDER)), > + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) > + }, > + { XE_RTP_NAME("oag_mmio_trg_ccs"), > + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED), > + ENGINE_CLASS(COMPUTE)), > + XE_RTP_ACTIONS(WHITELIST_OAG_MMIO_TRG) > + }, > }; > > static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe) > -- > 2.53.0 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 6.18.y 3/3] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists 2026-08-01 0:45 ` [PATCH 6.18.y 1/3] drm/xe/xe3: Apply wa_14024997852 Sasha Levin 2026-08-01 0:45 ` [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting Sasha Levin @ 2026-08-01 0:45 ` Sasha Levin 1 sibling, 0 replies; 5+ messages in thread From: Sasha Levin @ 2026-08-01 0:45 UTC (permalink / raw) To: stable Cc: Ashutosh Dixit, Umesh Nerlige Ramappa, Thomas Hellström, Sasha Levin From: Ashutosh Dixit <ashutosh.dixit@intel.com> [ Upstream commit e70086a3a06d276b4a5d9a2c51c9330c6cf72780 ] Unconditionally whitelisting OA registers is a security violation. Set RING_FORCE_TO_NONPRIV_DENY bit in OA nonpriv slots, so that OA registers don't get whitelisted by default after probe, gt reset, resume and engine reset. Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Link: https://patch.msgid.link/20260615224227.34880-2-ashutosh.dixit@intel.com (cherry picked from commit 90511bdcfda97211c01f1d945d4ea616578d8fca) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/xe/xe_reg_whitelist.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index b9ddbad12a58..235db9f33b3c 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -74,10 +74,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { RING_FORCE_TO_NONPRIV_ACCESS_RW)) }, +#define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY) + #define WHITELIST_OA_MMIO_TRG(trg, status, head) \ - WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ - WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ - WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) + WHITELIST_DENY(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ + WHITELIST_DENY(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ + WHITELIST_DENY(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) #define WHITELIST_OAG_MMIO_TRG \ WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) -- 2.53.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-08-03 23:49 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-29 10:58 FAILED: patch "[PATCH] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists" failed to apply to 6.18-stable tree gregkh 2026-08-01 0:45 ` [PATCH 6.18.y 1/3] drm/xe/xe3: Apply wa_14024997852 Sasha Levin 2026-08-01 0:45 ` [PATCH 6.18.y 2/3] drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting Sasha Levin 2026-08-03 23:49 ` Dixit, Ashutosh 2026-08-01 0:45 ` [PATCH 6.18.y 3/3] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Sasha Levin
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