From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 13/15] arm: socfpga: agilex: Add SPL for Agilex SoC
Date: Thu, 30 May 2019 17:03:42 +0800 [thread overview]
Message-ID: <1559207024-22181-14-git-send-email-ley.foon.tan@intel.com> (raw)
In-Reply-To: <1559207024-22181-1-git-send-email-ley.foon.tan@intel.com>
Add SPL support for Agilex SoC.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
arch/arm/mach-socfpga/Makefile | 1 +
arch/arm/mach-socfpga/spl_agilex.c | 100 +++++++++++++++++++++++++++++
2 files changed, 101 insertions(+)
create mode 100644 arch/arm/mach-socfpga/spl_agilex.c
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 51355ad070..476dcaefff 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -61,6 +61,7 @@ obj-y += spl_s10.o
endif
ifdef CONFIG_TARGET_SOCFPGA_AGILEX
obj-y += ccu_agilex.o
+obj-y += spl_agilex.o
endif
endif
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
new file mode 100644
index 0000000000..0cc0a7f798
--- /dev/null
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ *
+ */
+
+#include <asm/io.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <common.h>
+#include <image.h>
+#include <spl.h>
+#include <asm/arch/ccu_agilex.h>
+#include <asm/arch/clock_manager.h>
+#include <asm/arch/firewall.h>
+#include <asm/arch/mailbox_s10.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/arch/system_manager.h>
+#include <watchdog.h>
+#include <dm/uclass.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct socfpga_system_manager *sysmgr_regs =
+ (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_boot_mode(const u32 boot_device)
+{
+#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
+ return MMCSD_MODE_FS;
+#else
+ return MMCSD_MODE_RAW;
+#endif
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+ int ret;
+ struct udevice *dev;
+
+#ifdef CONFIG_HW_WATCHDOG
+ /* Ensure watchdog is paused when debugging is happening */
+ writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, &sysmgr_regs->wddbg);
+
+ /* Enable watchdog before initializing the HW */
+ socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
+ socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
+ hw_watchdog_init();
+#endif
+
+ /* ensure all processors are not released prior Linux boot */
+ writeq(0, CPU_RELEASE_ADDR);
+
+ timer_init();
+
+ sysmgr_pinmux_init();
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+ if (ret) {
+ debug("Clock init failed: %d\n", ret);
+ hang();
+ }
+
+ preloader_console_init();
+ cm_print_clock_quick_summary();
+
+ /* enable non-secure interface to DMA330 DMA and peripherals */
+ writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma);
+ writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
+
+ firewall_setup();
+ ccu_init();
+
+#if CONFIG_IS_ENABLED(ALTERA_SDRAM)
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ hang();
+ }
+#endif
+
+ mbox_init();
+
+#ifdef CONFIG_CADENCE_QSPI
+ mbox_qspi_open();
+#endif
+}
--
2.19.0
next prev parent reply other threads:[~2019-05-30 9:03 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-30 9:03 [U-Boot] [PATCH 00/15] Add Intel Agilex SoC support Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 01/15] arm: socfpga: agilex: Add base address for Intel Agilex SoC Ley Foon Tan
2019-06-24 20:00 ` Simon Goldschmidt
2019-06-25 1:16 ` Ley Foon Tan
2019-06-25 14:03 ` Dinh Nguyen
2019-07-04 8:14 ` Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 02/15] arm: socfpga: Move firewall code to firewall file Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 03/15] arm: socfpga: Move Stratix10 and Agilex reset manager common code Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 04/15] arm: socfpga: agilex: Add reset manager support Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 05/15] arm: socfpga: Move Stratix10 and Agilex system manager common code Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 06/15] arm: socfpga: agilex: Add system manager support Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 07/15] clk: agilex: Add clock driver for Agilex Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 08/15] arm: socfpga: agilex: Add clock manager support Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 09/15] arm: socfpga: agilex: Add CCU support for Agilex Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 10/15] ddr: altera: Restructure Stratix 10 SDRAM driver Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 11/15] ddr: altera: agilex: Add SDRAM driver for Agilex Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 12/15] board: intel: agilex: Add socdk board support for Intel Agilex SoC Ley Foon Tan
2019-05-30 9:03 ` Ley Foon Tan [this message]
2019-05-30 9:03 ` [U-Boot] [PATCH 14/15] arm: dts: agilex: Add base dtsi and devkit dts Ley Foon Tan
2019-05-30 9:03 ` [U-Boot] [PATCH 15/15] arm: socfpga: agilex: Enable Agilex SoC build Ley Foon Tan
2019-06-10 6:31 ` [U-Boot] [PATCH 00/15] Add Intel Agilex SoC support Ley Foon Tan
2019-06-11 13:47 ` Marek Vasut
2019-06-11 14:03 ` Simon Goldschmidt
2019-06-24 19:53 ` Simon Goldschmidt
2019-06-25 1:01 ` Ley Foon Tan
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