* [PATCH v6 1/4] timer: atmel_tcb_timer: add atmel_tcb driver
2022-03-09 9:22 [PATCH v6 0/4] add TCB driver for sama5d2 Clément Léger
@ 2022-03-09 9:22 ` Clément Léger
2022-03-10 12:54 ` Claudiu.Beznea
2022-03-09 9:22 ` [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node Clément Léger
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Clément Léger @ 2022-03-09 9:22 UTC (permalink / raw)
To: Eugen Hristev, Ludovic Desroches
Cc: u-boot, Nicolas Ferre, Thomas Petazzoni, Claudiu Beznea,
Clément Léger
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
MAINTAINERS | 1 +
arch/arm/mach-at91/armv7/Makefile | 2 +
drivers/timer/Kconfig | 8 ++
drivers/timer/Makefile | 1 +
drivers/timer/atmel_tcb_timer.c | 154 ++++++++++++++++++++++++++++++
5 files changed, 166 insertions(+)
create mode 100644 drivers/timer/atmel_tcb_timer.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 0f39bc6bc9..e30389dc3e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -352,6 +352,7 @@ F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/cpu/at91_cpu.c
F: drivers/misc/microchip_flexcom.c
+F: drivers/timer/atmel_tcb_timer.c
F: include/dt-bindings/mfd/atmel-flexcom.h
F: drivers/timer/mchp-pit64b-timer.c
diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile
index 246050b67b..f395b55c3d 100644
--- a/arch/arm/mach-at91/armv7/Makefile
+++ b/arch/arm/mach-at91/armv7/Makefile
@@ -14,9 +14,11 @@ obj-y += cpu.o
ifndef CONFIG_$(SPL_TPL_)SYSRESET
obj-y += reset.o
endif
+ifneq ($(CONFIG_ATMEL_TCB_TIMER),y)
ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
# old non-DM timer driver
obj-y += timer.o
endif
endif
+endif
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 8913142654..8fad59b81a 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -96,6 +96,14 @@ config ATMEL_PIT_TIMER
it is designed to offer maximum accuracy and efficient management,
even for systems with long response time.
+config ATMEL_TCB_TIMER
+ bool "Atmel timer counter support"
+ depends on TIMER
+ depends on ARCH_AT91
+ help
+ Select this to enable the use of the timer counter as a monotonic
+ counter.
+
config CADENCE_TTC_TIMER
bool "Cadence TTC (Triple Timer Counter)"
depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index e2bd530eb0..58da6c1e84 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_ARC_TIMER) += arc_timer.o
obj-$(CONFIG_AST_TIMER) += ast_timer.o
obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
+obj-$(CONFIG_ATMEL_TCB_TIMER) += atmel_tcb_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c
new file mode 100644
index 0000000000..1251746bd2
--- /dev/null
+++ b/drivers/timer/atmel_tcb_timer.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Microchip Corporation
+ *
+ * Author: Clément Léger <clement.leger@bootlin.com>
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <timer.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+
+#define TCB_CHAN(chan) ((chan) * 0x40)
+
+#define TCB_CCR(chan) (0x0 + TCB_CHAN(chan))
+#define TCB_CCR_CLKEN 0x1
+
+#define TCB_CMR(chan) (0x4 + TCB_CHAN(chan))
+#define TCB_CMR_WAVE (1 << 15)
+#define TCB_CMR_TIMER_CLOCK1 0
+#define TCB_CMR_XC1 6
+#define TCB_CMR_ACPA_SET (1 << 16)
+#define TCB_CMR_ACPC_CLEAR (2 << 18)
+
+#define TCB_CV(chan) (0x10 + TCB_CHAN(chan))
+
+#define TCB_RA(chan) (0x14 + TCB_CHAN(chan))
+#define TCB_RC(chan) (0x1c + TCB_CHAN(chan))
+
+#define TCB_IDR(chan) (0x28 + TCB_CHAN(chan))
+
+#define TCB_BCR 0xc0
+#define TCB_BCR_SYNC 0x1
+
+#define TCB_BMR 0xc4
+#define TCB_BMR_TC1XC1S_TIOA0 (2 << 2)
+
+#define TCB_WPMR 0xe4
+#define TCB_WPMR_WAKEY 0x54494d
+
+struct atmel_tcb_plat {
+ void __iomem *base;
+};
+
+static u64 atmel_tcb_get_count(struct udevice *dev)
+{
+ struct atmel_tcb_plat *plat = dev_get_plat(dev);
+ u64 cv0 = 0;
+ u64 cv1 = 0;
+
+ do {
+ cv1 = readl(plat->base + TCB_CV(1));
+ cv0 = readl(plat->base + TCB_CV(0));
+ } while (readl(plat->base + TCB_CV(1)) != cv1);
+
+ cv0 |= cv1 << 32;
+
+ return cv0;
+}
+
+static void atmel_tcb_configure(void __iomem *base)
+{
+ /* Disable write protection */
+ writel(TCB_WPMR_WAKEY, base + TCB_WPMR);
+
+ /* Disable all irqs for both channel 0 & 1 */
+ writel(0xff, base + TCB_IDR(0));
+ writel(0xff, base + TCB_IDR(1));
+
+ /*
+ * In order to avoid wrapping, use a 64 bit counter by chaining
+ * two channels.
+ * Channel 0 is configured to generate a clock on TIOA0 which is cleared
+ * when reaching 0x80000000 and set when reaching 0.
+ */
+ writel(TCB_CMR_TIMER_CLOCK1 | TCB_CMR_WAVE | TCB_CMR_ACPA_SET
+ | TCB_CMR_ACPC_CLEAR, base + TCB_CMR(0));
+ writel(0x80000000, base + TCB_RC(0));
+ writel(0x1, base + TCB_RA(0));
+ writel(TCB_CCR_CLKEN, base + TCB_CCR(0));
+
+ /* Channel 1 is configured to use TIOA0 as input */
+ writel(TCB_CMR_XC1 | TCB_CMR_WAVE, base + TCB_CMR(1));
+ writel(TCB_CCR_CLKEN, base + TCB_CCR(1));
+
+ /* Set XC1 input to be TIOA0 (ie output of Channel 0) */
+ writel(TCB_BMR_TC1XC1S_TIOA0, base + TCB_BMR);
+
+ /* Sync & start all timers */
+ writel(TCB_BCR_SYNC, base + TCB_BCR);
+}
+
+static int atmel_tcb_probe(struct udevice *dev)
+{
+ struct atmel_tcb_plat *plat = dev_get_plat(dev);
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct clk clk;
+ ulong clk_rate;
+ int ret;
+
+ if (!device_is_compatible(dev->parent, "atmel,sama5d2-tcb"))
+ return -EINVAL;
+
+ /* Currently, we only support channel 0 and 1 to be chained */
+ if (dev_read_addr_index(dev, 0) != 0 &&
+ dev_read_addr_index(dev, 1) != 1) {
+ printf("Error: only chained timers 0 and 1 are supported\n");
+ return -EINVAL;
+ }
+
+ ret = clk_get_by_name(dev->parent, "gclk", &clk);
+ if (ret)
+ return -EINVAL;
+
+ clk_rate = clk_get_rate(&clk);
+ if (!clk_rate)
+ return -EINVAL;
+
+ uc_priv->clock_rate = clk_rate;
+
+ atmel_tcb_configure(plat->base);
+
+ return 0;
+}
+
+static int atmel_tcb_of_to_plat(struct udevice *dev)
+{
+ struct atmel_tcb_plat *plat = dev_get_plat(dev);
+
+ plat->base = dev_read_addr_ptr(dev->parent);
+
+ return 0;
+}
+
+static const struct timer_ops atmel_tcb_ops = {
+ .get_count = atmel_tcb_get_count,
+};
+
+static const struct udevice_id atmel_tcb_ids[] = {
+ { .compatible = "atmel,tcb-timer" },
+ { }
+};
+
+U_BOOT_DRIVER(atmel_tcb) = {
+ .name = "atmel_tcb",
+ .id = UCLASS_TIMER,
+ .of_match = atmel_tcb_ids,
+ .of_to_plat = atmel_tcb_of_to_plat,
+ .plat_auto = sizeof(struct atmel_tcb_plat),
+ .probe = atmel_tcb_probe,
+ .ops = &atmel_tcb_ops,
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v6 1/4] timer: atmel_tcb_timer: add atmel_tcb driver
2022-03-09 9:22 ` [PATCH v6 1/4] timer: atmel_tcb_timer: add atmel_tcb driver Clément Léger
@ 2022-03-10 12:54 ` Claudiu.Beznea
0 siblings, 0 replies; 9+ messages in thread
From: Claudiu.Beznea @ 2022-03-10 12:54 UTC (permalink / raw)
To: clement.leger, Eugen.Hristev, Ludovic.Desroches
Cc: u-boot, Nicolas.Ferre, thomas.petazzoni
On 09.03.2022 11:22, Clément Léger wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add a driver for the timer counter block that can be found on sama5d2.
> This driver will be used when booting under OP-TEE since the pit timer
> which is part of the SYSC is secured. Channel 1 & 2 are configured to
> be chained together which allows to have a 64bits counter.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
> MAINTAINERS | 1 +
> arch/arm/mach-at91/armv7/Makefile | 2 +
> drivers/timer/Kconfig | 8 ++
> drivers/timer/Makefile | 1 +
> drivers/timer/atmel_tcb_timer.c | 154 ++++++++++++++++++++++++++++++
> 5 files changed, 166 insertions(+)
> create mode 100644 drivers/timer/atmel_tcb_timer.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 0f39bc6bc9..e30389dc3e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -352,6 +352,7 @@ F: arch/arm/mach-at91/
> F: board/atmel/
> F: drivers/cpu/at91_cpu.c
> F: drivers/misc/microchip_flexcom.c
> +F: drivers/timer/atmel_tcb_timer.c
> F: include/dt-bindings/mfd/atmel-flexcom.h
> F: drivers/timer/mchp-pit64b-timer.c
>
> diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile
> index 246050b67b..f395b55c3d 100644
> --- a/arch/arm/mach-at91/armv7/Makefile
> +++ b/arch/arm/mach-at91/armv7/Makefile
> @@ -14,9 +14,11 @@ obj-y += cpu.o
> ifndef CONFIG_$(SPL_TPL_)SYSRESET
> obj-y += reset.o
> endif
> +ifneq ($(CONFIG_ATMEL_TCB_TIMER),y)
> ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
> ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
> # old non-DM timer driver
> obj-y += timer.o
> endif
> endif
> +endif
> diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
> index 8913142654..8fad59b81a 100644
> --- a/drivers/timer/Kconfig
> +++ b/drivers/timer/Kconfig
> @@ -96,6 +96,14 @@ config ATMEL_PIT_TIMER
> it is designed to offer maximum accuracy and efficient management,
> even for systems with long response time.
>
> +config ATMEL_TCB_TIMER
> + bool "Atmel timer counter support"
> + depends on TIMER
> + depends on ARCH_AT91
> + help
> + Select this to enable the use of the timer counter as a monotonic
> + counter.
> +
> config CADENCE_TTC_TIMER
> bool "Cadence TTC (Triple Timer Counter)"
> depends on TIMER
> diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
> index e2bd530eb0..58da6c1e84 100644
> --- a/drivers/timer/Makefile
> +++ b/drivers/timer/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_ARC_TIMER) += arc_timer.o
> obj-$(CONFIG_AST_TIMER) += ast_timer.o
> obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
> obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
> +obj-$(CONFIG_ATMEL_TCB_TIMER) += atmel_tcb_timer.o
> obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
> obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
> obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
> diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c
> new file mode 100644
> index 0000000000..1251746bd2
> --- /dev/null
> +++ b/drivers/timer/atmel_tcb_timer.c
> @@ -0,0 +1,154 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2022 Microchip Corporation
> + *
> + * Author: Clément Léger <clement.leger@bootlin.com>
> + */
> +
> +#include <common.h>
> +#include <clk.h>
> +#include <dm.h>
> +#include <timer.h>
> +#include <asm/io.h>
> +#include <linux/bitops.h>
> +
> +#define TCB_CHAN(chan) ((chan) * 0x40)
> +
> +#define TCB_CCR(chan) (0x0 + TCB_CHAN(chan))
> +#define TCB_CCR_CLKEN 0x1
(1 << 0) for this one, for consistency?
> +
> +#define TCB_CMR(chan) (0x4 + TCB_CHAN(chan))
> +#define TCB_CMR_WAVE (1 << 15)
> +#define TCB_CMR_TIMER_CLOCK1 0
> +#define TCB_CMR_XC1 6
> +#define TCB_CMR_ACPA_SET (1 << 16)
> +#define TCB_CMR_ACPC_CLEAR (2 << 18)
> +
> +#define TCB_CV(chan) (0x10 + TCB_CHAN(chan))
> +
> +#define TCB_RA(chan) (0x14 + TCB_CHAN(chan))
> +#define TCB_RC(chan) (0x1c + TCB_CHAN(chan))
> +
> +#define TCB_IDR(chan) (0x28 + TCB_CHAN(chan))
> +
> +#define TCB_BCR 0xc0
> +#define TCB_BCR_SYNC 0x1
Same here
> +
> +#define TCB_BMR 0xc4
> +#define TCB_BMR_TC1XC1S_TIOA0 (2 << 2)
> +
> +#define TCB_WPMR 0xe4
> +#define TCB_WPMR_WAKEY 0x54494d
> +
> +struct atmel_tcb_plat {
> + void __iomem *base;
> +};
> +
> +static u64 atmel_tcb_get_count(struct udevice *dev)
> +{
> + struct atmel_tcb_plat *plat = dev_get_plat(dev);
> + u64 cv0 = 0;
> + u64 cv1 = 0;
> +
> + do {
> + cv1 = readl(plat->base + TCB_CV(1));
> + cv0 = readl(plat->base + TCB_CV(0));
> + } while (readl(plat->base + TCB_CV(1)) != cv1);
> +
> + cv0 |= cv1 << 32;
> +
> + return cv0;
> +}
> +
> +static void atmel_tcb_configure(void __iomem *base)
> +{
> + /* Disable write protection */
> + writel(TCB_WPMR_WAKEY, base + TCB_WPMR);
> +
> + /* Disable all irqs for both channel 0 & 1 */
> + writel(0xff, base + TCB_IDR(0));
> + writel(0xff, base + TCB_IDR(1));
> +
> + /*
> + * In order to avoid wrapping, use a 64 bit counter by chaining
> + * two channels.
> + * Channel 0 is configured to generate a clock on TIOA0 which is cleared
> + * when reaching 0x80000000 and set when reaching 0.
I missed your previous reply about this. For me is good as is.
Other than minor comments above:
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> + */
> + writel(TCB_CMR_TIMER_CLOCK1 | TCB_CMR_WAVE | TCB_CMR_ACPA_SET
> + | TCB_CMR_ACPC_CLEAR, base + TCB_CMR(0));
> + writel(0x80000000, base + TCB_RC(0));
> + writel(0x1, base + TCB_RA(0));
> + writel(TCB_CCR_CLKEN, base + TCB_CCR(0));
> +
> + /* Channel 1 is configured to use TIOA0 as input */
> + writel(TCB_CMR_XC1 | TCB_CMR_WAVE, base + TCB_CMR(1));
> + writel(TCB_CCR_CLKEN, base + TCB_CCR(1));
> +
> + /* Set XC1 input to be TIOA0 (ie output of Channel 0) */
> + writel(TCB_BMR_TC1XC1S_TIOA0, base + TCB_BMR);
> +
> + /* Sync & start all timers */
> + writel(TCB_BCR_SYNC, base + TCB_BCR);
> +}
> +
> +static int atmel_tcb_probe(struct udevice *dev)
> +{
> + struct atmel_tcb_plat *plat = dev_get_plat(dev);
> + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> + struct clk clk;
> + ulong clk_rate;
> + int ret;
> +
> + if (!device_is_compatible(dev->parent, "atmel,sama5d2-tcb"))
> + return -EINVAL;
> +
> + /* Currently, we only support channel 0 and 1 to be chained */
> + if (dev_read_addr_index(dev, 0) != 0 &&
> + dev_read_addr_index(dev, 1) != 1) {
> + printf("Error: only chained timers 0 and 1 are supported\n");
> + return -EINVAL;
> + }
> +
> + ret = clk_get_by_name(dev->parent, "gclk", &clk);
> + if (ret)
> + return -EINVAL;
> +
> + clk_rate = clk_get_rate(&clk);
> + if (!clk_rate)
> + return -EINVAL;
> +
> + uc_priv->clock_rate = clk_rate;
> +
> + atmel_tcb_configure(plat->base);
> +
> + return 0;
> +}
> +
> +static int atmel_tcb_of_to_plat(struct udevice *dev)
> +{
> + struct atmel_tcb_plat *plat = dev_get_plat(dev);
> +
> + plat->base = dev_read_addr_ptr(dev->parent);
> +
> + return 0;
> +}
> +
> +static const struct timer_ops atmel_tcb_ops = {
> + .get_count = atmel_tcb_get_count,
> +};
> +
> +static const struct udevice_id atmel_tcb_ids[] = {
> + { .compatible = "atmel,tcb-timer" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(atmel_tcb) = {
> + .name = "atmel_tcb",
> + .id = UCLASS_TIMER,
> + .of_match = atmel_tcb_ids,
> + .of_to_plat = atmel_tcb_of_to_plat,
> + .plat_auto = sizeof(struct atmel_tcb_plat),
> + .probe = atmel_tcb_probe,
> + .ops = &atmel_tcb_ops,
> +};
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node
2022-03-09 9:22 [PATCH v6 0/4] add TCB driver for sama5d2 Clément Léger
2022-03-09 9:22 ` [PATCH v6 1/4] timer: atmel_tcb_timer: add atmel_tcb driver Clément Léger
@ 2022-03-09 9:22 ` Clément Léger
2022-03-09 9:45 ` Eugen.Hristev
2022-03-09 9:22 ` [PATCH v6 3/4] ARM: dts: at91: sama5d2: add TCB node Clément Léger
2022-03-09 9:22 ` [PATCH v6 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER Clément Léger
3 siblings, 1 reply; 9+ messages in thread
From: Clément Léger @ 2022-03-09 9:22 UTC (permalink / raw)
To: Eugen Hristev, Ludovic Desroches
Cc: u-boot, Nicolas Ferre, Thomas Petazzoni, Claudiu Beznea,
Clément Léger
When using interrupts property, a global interrupt controller needs to
be added to avoid warnings when compiling device-tree:
arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
/ahb/apb/timer@f800c000: Missing interrupt-parent
Add AIC node as the sama5d2 global interrupt controller.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
arch/arm/dts/sama5d2.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 038cd73c03..1904f16eb6 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -3,6 +3,7 @@
/ {
model = "Atmel SAMA5D2 family SoC";
compatible = "atmel,sama5d2";
+ interrupt-parent = <&aic>;
aliases {
spi0 = &spi0;
@@ -762,6 +763,15 @@
status = "disabled";
};
+ aic: interrupt-controller@fc020000 {
+ compatible = "atmel,sama5d2-aic";
+ reg = <0xfc020000 0x200>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ atmel,external-irqs = <49>;
+ status = "disabled";
+ };
+
i2c1: i2c@fc028000 {
compatible = "atmel,sama5d2-i2c";
reg = <0xfc028000 0x100>;
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node
2022-03-09 9:22 ` [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node Clément Léger
@ 2022-03-09 9:45 ` Eugen.Hristev
2022-03-09 9:53 ` Clément Léger
0 siblings, 1 reply; 9+ messages in thread
From: Eugen.Hristev @ 2022-03-09 9:45 UTC (permalink / raw)
To: clement.leger, Ludovic.Desroches
Cc: u-boot, Nicolas.Ferre, thomas.petazzoni, Claudiu.Beznea
On 3/9/22 11:22 AM, Clément Léger wrote:
> When using interrupts property, a global interrupt controller needs to
> be added to avoid warnings when compiling device-tree:
>
> arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
> /ahb/apb/timer@f800c000: Missing interrupt-parent
>
> Add AIC node as the sama5d2 global interrupt controller.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
> arch/arm/dts/sama5d2.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
> index 038cd73c03..1904f16eb6 100644
> --- a/arch/arm/dts/sama5d2.dtsi
> +++ b/arch/arm/dts/sama5d2.dtsi
> @@ -3,6 +3,7 @@
> / {
> model = "Atmel SAMA5D2 family SoC";
> compatible = "atmel,sama5d2";
> + interrupt-parent = <&aic>;
>
> aliases {
> spi0 = &spi0;
> @@ -762,6 +763,15 @@
> status = "disabled";
> };
>
> + aic: interrupt-controller@fc020000 {
> + compatible = "atmel,sama5d2-aic";
> + reg = <0xfc020000 0x200>;
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + atmel,external-irqs = <49>;
> + status = "disabled";
> + };
Hello Clement,
Any reason to not use the exact node from Linux ?
aic: interrupt-controller@fc020000 {
#interrupt-cells = <3>;
compatible = "atmel,sama5d2-aic";
interrupt-controller;
reg = <0xfc020000 0x200>;
atmel,external-irqs = <49>;
};
I would like to avoid any difference between Uboot and Linux, unless
really required.
Don't worry if the node is enabled, it's no problem with that. It won't
be probed due to several reasons: no driver and no need for it, since
Uboot is based on lazy probing.
Eugen
> +
> i2c1: i2c@fc028000 {
> compatible = "atmel,sama5d2-i2c";
> reg = <0xfc028000 0x100>;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node
2022-03-09 9:45 ` Eugen.Hristev
@ 2022-03-09 9:53 ` Clément Léger
0 siblings, 0 replies; 9+ messages in thread
From: Clément Léger @ 2022-03-09 9:53 UTC (permalink / raw)
To: Eugen.Hristev
Cc: Ludovic.Desroches, u-boot, Nicolas.Ferre, thomas.petazzoni,
Claudiu.Beznea
Le Wed, 9 Mar 2022 09:45:01 +0000,
<Eugen.Hristev@microchip.com> a écrit :
> On 3/9/22 11:22 AM, Clément Léger wrote:
> > When using interrupts property, a global interrupt controller needs to
> > be added to avoid warnings when compiling device-tree:
> >
> > arch/arm/dts/at91-sama5d2_xplained.dtb: Warning (interrupts_property):
> > /ahb/apb/timer@f800c000: Missing interrupt-parent
> >
> > Add AIC node as the sama5d2 global interrupt controller.
> >
> > Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> > ---
> > arch/arm/dts/sama5d2.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
> > index 038cd73c03..1904f16eb6 100644
> > --- a/arch/arm/dts/sama5d2.dtsi
> > +++ b/arch/arm/dts/sama5d2.dtsi
> > @@ -3,6 +3,7 @@
> > / {
> > model = "Atmel SAMA5D2 family SoC";
> > compatible = "atmel,sama5d2";
> > + interrupt-parent = <&aic>;
> >
> > aliases {
> > spi0 = &spi0;
> > @@ -762,6 +763,15 @@
> > status = "disabled";
> > };
> >
> > + aic: interrupt-controller@fc020000 {
> > + compatible = "atmel,sama5d2-aic";
> > + reg = <0xfc020000 0x200>;
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + atmel,external-irqs = <49>;
> > + status = "disabled";
> > + };
>
> Hello Clement,
>
> Any reason to not use the exact node from Linux ?
I wanted it to match all the existing nodes that are already in
this file (ie compatible, then regs and so on), it seems more coherent.
>
> aic: interrupt-controller@fc020000 {
> #interrupt-cells = <3>;
>
> compatible = "atmel,sama5d2-aic";
>
> interrupt-controller;
>
> reg = <0xfc020000 0x200>;
>
> atmel,external-irqs = <49>;
>
> };
>
> I would like to avoid any difference between Uboot and Linux, unless
> really required.
If you want, I can reuse the exact same definition used by Linux of
course.
>
> Don't worry if the node is enabled, it's no problem with that. It won't
> be probed due to several reasons: no driver and no need for it, since
> Uboot is based on lazy probing.
Ok.
>
> Eugen
>
> > +
> > i2c1: i2c@fc028000 {
> > compatible = "atmel,sama5d2-i2c";
> > reg = <0xfc028000 0x100>;
> > --
> > 2.34.1
> >
>
--
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v6 3/4] ARM: dts: at91: sama5d2: add TCB node
2022-03-09 9:22 [PATCH v6 0/4] add TCB driver for sama5d2 Clément Léger
2022-03-09 9:22 ` [PATCH v6 1/4] timer: atmel_tcb_timer: add atmel_tcb driver Clément Léger
2022-03-09 9:22 ` [PATCH v6 2/4] ARM: dts: at91: sama5d2: add AIC node Clément Léger
@ 2022-03-09 9:22 ` Clément Léger
2022-03-09 9:22 ` [PATCH v6 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER Clément Léger
3 siblings, 0 replies; 9+ messages in thread
From: Clément Léger @ 2022-03-09 9:22 UTC (permalink / raw)
To: Eugen Hristev, Ludovic Desroches
Cc: u-boot, Nicolas Ferre, Thomas Petazzoni, Claudiu Beznea,
Clément Léger
Add the device-tree node to describe the TCB timer.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
arch/arm/dts/sama5d2.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 1904f16eb6..ffbb171644 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -1,4 +1,5 @@
#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Atmel SAMA5D2 family SoC";
@@ -639,6 +640,21 @@
status = "disabled";
};
+ tcb0: timer@f800c000 {
+ compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+ reg = <0xf800c000 0x100>;
+ interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
+ clock-names = "t0_clk", "gclk", "slow_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ timer0: timer@0 {
+ compatible = "atmel,tcb-timer";
+ reg = <0>, <1>;
+ };
+ };
+
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v6 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER
2022-03-09 9:22 [PATCH v6 0/4] add TCB driver for sama5d2 Clément Léger
` (2 preceding siblings ...)
2022-03-09 9:22 ` [PATCH v6 3/4] ARM: dts: at91: sama5d2: add TCB node Clément Léger
@ 2022-03-09 9:22 ` Clément Léger
2022-03-10 12:55 ` Claudiu.Beznea
3 siblings, 1 reply; 9+ messages in thread
From: Clément Léger @ 2022-03-09 9:22 UTC (permalink / raw)
To: Eugen Hristev, Ludovic Desroches
Cc: u-boot, Nicolas Ferre, Thomas Petazzoni, Claudiu Beznea,
Clément Léger
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
---
configs/sama5d2_icp_mmc_defconfig | 2 +-
configs/sama5d2_ptc_ek_mmc_defconfig | 2 +-
configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +-
configs/sama5d2_xplained_emmc_defconfig | 2 +-
configs/sama5d2_xplained_mmc_defconfig | 2 +-
configs/sama5d2_xplained_qspiflash_defconfig | 2 +-
configs/sama5d2_xplained_spiflash_defconfig | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index 7761a57e0c..c035d7aad8 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -82,6 +82,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER_HII is not set
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
index 9f458e100b..7cb5ba37f6 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
index 6460ff3dad..667a10e93f 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 844a9cde64..72544b65bb 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -90,7 +90,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 0de0636587..bcdb84ce2c 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -92,7 +92,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index a6e002e59e..c30a90a3e1 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -91,7 +91,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 676385fe55..eae54469f8 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -95,7 +95,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
-CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v6 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER
2022-03-09 9:22 ` [PATCH v6 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER Clément Léger
@ 2022-03-10 12:55 ` Claudiu.Beznea
0 siblings, 0 replies; 9+ messages in thread
From: Claudiu.Beznea @ 2022-03-10 12:55 UTC (permalink / raw)
To: clement.leger, Eugen.Hristev, Ludovic.Desroches
Cc: u-boot, Nicolas.Ferre, thomas.petazzoni
On 09.03.2022 11:22, Clément Léger wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
> This will allow using the TCB timer instead of the PIT one when running
> under OP-TEE.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> configs/sama5d2_icp_mmc_defconfig | 2 +-
> configs/sama5d2_ptc_ek_mmc_defconfig | 2 +-
> configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +-
> configs/sama5d2_xplained_emmc_defconfig | 2 +-
> configs/sama5d2_xplained_mmc_defconfig | 2 +-
> configs/sama5d2_xplained_qspiflash_defconfig | 2 +-
> configs/sama5d2_xplained_spiflash_defconfig | 2 +-
> 7 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
> index 7761a57e0c..c035d7aad8 100644
> --- a/configs/sama5d2_icp_mmc_defconfig
> +++ b/configs/sama5d2_icp_mmc_defconfig
> @@ -82,6 +82,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
> CONFIG_ATMEL_USART=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_OF_LIBFDT_OVERLAY=y
> # CONFIG_EFI_LOADER_HII is not set
> diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
> index 9f458e100b..7cb5ba37f6 100644
> --- a/configs/sama5d2_ptc_ek_mmc_defconfig
> +++ b/configs/sama5d2_ptc_ek_mmc_defconfig
> @@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
> CONFIG_DEBUG_UART_ANNOUNCE=y
> CONFIG_ATMEL_USART=y
> CONFIG_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
> index 6460ff3dad..667a10e93f 100644
> --- a/configs/sama5d2_ptc_ek_nandflash_defconfig
> +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
> @@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
> CONFIG_DEBUG_UART_ANNOUNCE=y
> CONFIG_ATMEL_USART=y
> CONFIG_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
> index 844a9cde64..72544b65bb 100644
> --- a/configs/sama5d2_xplained_emmc_defconfig
> +++ b/configs/sama5d2_xplained_emmc_defconfig
> @@ -90,7 +90,7 @@ CONFIG_DM_SPI=y
> CONFIG_ATMEL_QSPI=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
> index 0de0636587..bcdb84ce2c 100644
> --- a/configs/sama5d2_xplained_mmc_defconfig
> +++ b/configs/sama5d2_xplained_mmc_defconfig
> @@ -92,7 +92,7 @@ CONFIG_DM_SPI=y
> CONFIG_ATMEL_QSPI=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
> index a6e002e59e..c30a90a3e1 100644
> --- a/configs/sama5d2_xplained_qspiflash_defconfig
> +++ b/configs/sama5d2_xplained_qspiflash_defconfig
> @@ -91,7 +91,7 @@ CONFIG_DM_SPI=y
> CONFIG_ATMEL_QSPI=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
> index 676385fe55..eae54469f8 100644
> --- a/configs/sama5d2_xplained_spiflash_defconfig
> +++ b/configs/sama5d2_xplained_spiflash_defconfig
> @@ -95,7 +95,7 @@ CONFIG_DM_SPI=y
> CONFIG_ATMEL_QSPI=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> -CONFIG_ATMEL_PIT_TIMER=y
> +CONFIG_ATMEL_TCB_TIMER=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread