From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value
Date: Mon, 25 Jul 2016 09:38:07 -0400 [thread overview]
Message-ID: <20160725133807.GD14698@bill-the-cat> (raw)
In-Reply-To: <20160725101547.18503-2-vigneshr@ti.com>
On Mon, Jul 25, 2016 at 03:45:44PM +0530, Vignesh R wrote:
> From: Lokesh Vutla <lokeshvutla@ti.com>
>
> According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence
> update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz
> clock, so that driver can use the same.
>
> Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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next prev parent reply other threads:[~2016-07-25 13:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-25 10:15 [U-Boot] [PATCH 0/4] dra7xx: QSPI: Increase SPI bus speed Vignesh R
2016-07-25 10:15 ` [U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value Vignesh R
2016-07-25 13:38 ` Tom Rini [this message]
2016-07-29 8:42 ` Mugunthan V N
2016-07-29 18:18 ` Jagan Teki
2016-07-25 10:15 ` [U-Boot] [PATCH 2/4] spi: ti_qspi: dra7xx: Add support to use 76.8MHz clock Vignesh R
2016-07-25 13:38 ` Tom Rini
2016-07-27 6:35 ` Jagan Teki
2016-07-27 12:10 ` Vignesh R
2016-07-28 13:36 ` Jagan Teki
2016-07-29 8:42 ` Mugunthan V N
2016-07-25 10:15 ` [U-Boot] [PATCH 3/4] configs: dra7xx: Update QSPI speed to 76.8MHz Vignesh R
2016-07-25 13:38 ` Tom Rini
2016-07-27 6:36 ` Jagan Teki
2016-07-29 8:44 ` Mugunthan V N
2016-07-25 10:15 ` [U-Boot] [PATCH 4/4] ARM: dts: dra7xx: Update spi-max-frequency for QSPI Vignesh R
2016-07-25 13:38 ` Tom Rini
2016-07-25 13:46 ` Vignesh R
2016-07-28 13:39 ` Jagan Teki
2016-07-29 8:45 ` Mugunthan V N
2016-07-25 13:38 ` [U-Boot] [PATCH 0/4] dra7xx: QSPI: Increase SPI bus speed Tom Rini
2016-07-26 6:34 ` Vignesh R
2016-07-29 18:23 ` Jagan Teki
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