From: Andre Przywara <andre.przywara@arm.com>
To: u-boot@lists.denx.de
Subject: [PATCH 5/7] sata_sil: Enable DM_PCI operation
Date: Thu, 11 Jun 2020 12:03:19 +0100 [thread overview]
Message-ID: <20200611110321.9574-6-andre.przywara@arm.com> (raw)
In-Reply-To: <20200611110321.9574-1-andre.przywara@arm.com>
Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.
Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
drivers/ata/sata_sil.c | 11 ++++++++++-
drivers/ata/sata_sil.h | 6 +++++-
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 6896fa8771..d5ba94c172 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -27,7 +27,11 @@
#include "sata_sil.h"
+#ifdef CONFIG_DM_PCI
+#define virt_to_bus(devno, v) dm_pci_virt_to_mem(devno, (void *) (v))
+#else
#define virt_to_bus(devno, v) pci_virt_to_mem(devno, (void *) (v))
+#endif
/* just compatible ahci_ops */
struct sil_ops {
@@ -608,13 +612,18 @@ static int sil_init_sata(struct udevice *uc_dev, int dev)
/* Save the private struct to block device struct */
#if !CONFIG_IS_ENABLED(BLK)
sata_dev_desc[dev].priv = (void *)sata;
+ sata->devno = sata_info.devno;
#else
priv->sil_sata_desc[dev] = sata;
priv->port_num = dev;
+#ifdef CONFIG_DM_PCI
+ sata->devno = uc_dev->parent;
+#else
+ sata->devno = sata_info.devno;
+#endif /* CONFIG_DM_PCI */
#endif
sata->id = dev;
sata->port = port;
- sata->devno = sata_info.devno;
sprintf(sata->name, "SATA#%d", dev);
sil_cmd_soft_reset(sata);
tmp = readl(port + PORT_SSTATUS);
diff --git a/drivers/ata/sata_sil.h b/drivers/ata/sata_sil.h
index ef41e8259a..a300c0c388 100644
--- a/drivers/ata/sata_sil.h
+++ b/drivers/ata/sata_sil.h
@@ -21,7 +21,11 @@ struct sil_sata {
u16 pio;
u16 mwdma;
u16 udma;
- pci_dev_t devno;
+#ifdef CONFIG_DM_PCI
+ struct udevice *devno;
+#else
+ pci_dev_t devno;
+#endif
int wcache;
int flush;
int flush_ext;
--
2.17.5
next prev parent reply other threads:[~2020-06-11 11:03 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-11 11:03 [PATCH 0/7] arm: Juno board updates and PCIe/SATA enablement Andre Przywara
2020-06-11 11:03 ` [PATCH 1/7] arm: vexpress64: Fix counter frequency Andre Przywara
2020-06-20 20:22 ` Linus Walleij
2020-07-08 3:04 ` Tom Rini
2020-06-11 11:03 ` [PATCH 2/7] net: dm: Remove warning about EEPROM provided MAC address Andre Przywara
2020-06-11 11:09 ` Ramon Fried
2020-06-20 20:23 ` Linus Walleij
2020-07-08 3:04 ` Tom Rini
2020-06-11 11:03 ` [PATCH 3/7] net: smc911x: Properly handle EEPROM " Andre Przywara
2020-06-11 11:10 ` Ramon Fried
2020-06-20 20:25 ` Linus Walleij
2020-07-08 3:04 ` Tom Rini
2020-06-11 11:03 ` [PATCH 4/7] arm: juno: Enable DM_ETH Andre Przywara
2020-06-20 20:26 ` Linus Walleij
2020-07-08 3:04 ` Tom Rini
2020-06-11 11:03 ` Andre Przywara [this message]
2020-06-20 20:27 ` [PATCH 5/7] sata_sil: Enable DM_PCI operation Linus Walleij
2020-07-08 3:04 ` Tom Rini
2020-06-11 11:03 ` [PATCH 6/7] arm: juno: Enable PCI Andre Przywara
2020-06-20 20:28 ` Linus Walleij
2020-07-08 3:05 ` Tom Rini
2020-06-11 11:03 ` [PATCH 7/7] arm: juno: Enable SATA controller Andre Przywara
2020-06-20 20:28 ` Linus Walleij
2020-07-08 3:05 ` Tom Rini
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