From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v4 0/8] riscv: Clean up timer drivers
Date: Wed, 9 Sep 2020 16:09:22 -0400 [thread overview]
Message-ID: <20200909200930.232174-1-seanga2@gmail.com> (raw)
This series cleans up the timer drivers in RISC-V and converts them to DM.
This series needs to be tested! I have only tested it on QEMU and the K210.
Notably, this means that the HiFive and anything Andes is completely untested.
Changes in v4:
- Both the Andes PMLT and Sifive CLINT now fall back on timebase-frequency,
per discussion with Anup Patel
- Introduce helper function for falling back on timebase-frequency
- Modify RISCV_TIMER KConfig
- Now depends on RISCV
- Implied by S-Mode (with or without SPL)
- Rebase
- Remove clock-frequency property from k210 clint binding because we fall
back on timebase-frequency
Changes in v3:
- Don't initialize the IPI in spl_invoke_opensbi. Further testing has
revealed it to be unnecessary.
- Rebase
Changes in v2:
- Fix SiFive CLINT not getting tick-rate from rtcclk
- Remove RISCV_RDTIME KConfig option
- Split Kendryte binding changes into their own commit
Sean Anderson (8):
riscv: Rework riscv timer driver to only support S-mode
timer: Add helper for drivers using timebase fallback
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
riscv: Clean up initialization in Andes PLIC
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
riscv: clk: Add CLINT clock to kendryte clock driver
riscv: Update Kendryte device tree for new CLINT driver
riscv: Update SiFive device tree for new CLINT driver
arch/riscv/Kconfig | 16 -----
arch/riscv/cpu/ax25/Kconfig | 2 +-
arch/riscv/cpu/fu540/Kconfig | 2 +-
arch/riscv/cpu/generic/Kconfig | 2 +-
arch/riscv/dts/ae350_32.dts | 1 +
arch/riscv/dts/ae350_64.dts | 1 +
arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++-
.../dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++
arch/riscv/dts/k210.dtsi | 7 +-
arch/riscv/include/asm/global_data.h | 3 -
arch/riscv/lib/Makefile | 1 -
arch/riscv/lib/andes_plic.c | 58 +++++++---------
arch/riscv/lib/andes_plmt.c | 44 ++++++-------
arch/riscv/lib/rdtime.c | 38 -----------
arch/riscv/lib/sifive_clint.c | 66 ++++++++++---------
drivers/clk/kendryte/clk.c | 4 ++
drivers/ram/sifive/Kconfig | 2 +
drivers/timer/Kconfig | 4 +-
drivers/timer/riscv_timer.c | 39 +++++------
drivers/timer/timer-uclass.c | 25 +++++++
include/dt-bindings/clock/k210-sysctl.h | 1 +
include/timer.h | 15 +++++
22 files changed, 170 insertions(+), 173 deletions(-)
delete mode 100644 arch/riscv/lib/rdtime.c
--
2.28.0
next reply other threads:[~2020-09-09 20:09 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 20:09 Sean Anderson [this message]
2020-09-09 20:09 ` [PATCH v4 1/8] riscv: Rework riscv timer driver to only support S-mode Sean Anderson
2020-09-09 20:09 ` [PATCH v4 2/8] timer: Add helper for drivers using timebase fallback Sean Anderson
2020-09-10 13:38 ` Simon Glass
2020-09-10 15:13 ` Sean Anderson
2020-09-15 7:13 ` Bin Meng
2020-09-09 20:09 ` [PATCH v4 3/8] riscv: Rework Andes PLMT as a UCLASS_TIMER driver Sean Anderson
2020-09-15 7:18 ` Bin Meng
2020-09-15 10:04 ` Sean Anderson
2020-09-09 20:09 ` [PATCH v4 4/8] riscv: Clean up initialization in Andes PLIC Sean Anderson
2020-09-09 20:09 ` [PATCH v4 5/8] riscv: Rework Sifive CLINT as UCLASS_TIMER driver Sean Anderson
2020-09-15 8:09 ` Bin Meng
2020-09-15 10:06 ` Sean Anderson
2020-09-09 20:09 ` [PATCH v4 6/8] riscv: clk: Add CLINT clock to kendryte clock driver Sean Anderson
2020-09-09 20:09 ` [PATCH v4 7/8] riscv: Update Kendryte device tree for new CLINT driver Sean Anderson
2020-09-15 9:07 ` Bin Meng
2020-09-09 20:09 ` [PATCH v4 8/8] riscv: Update SiFive " Sean Anderson
2020-09-15 9:13 ` Bin Meng
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