From: Tom Rini <trini@konsulko.com>
To: Georgi Vlaev <g-vlaev@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Anand Gadiyar <gadiyar@ti.com>,
u-boot@lists.denx.de
Subject: Re: [PATCH 5/5] configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Date: Thu, 16 Jun 2022 10:39:12 -0400 [thread overview]
Message-ID: <20220616143912.GT2484912@bill-the-cat> (raw)
In-Reply-To: <20220614144534.317407-6-g-vlaev@ti.com>
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On Tue, Jun 14, 2022 at 05:45:34PM +0300, Georgi Vlaev wrote:
> Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
> needed to calculate the size of DDR that is available.
>
> Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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next prev parent reply other threads:[~2022-06-16 14:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-14 14:45 [PATCH 0/5] board: ti: am62x: Add support for 1-bit inline DDRSS ECC Georgi Vlaev
2022-06-14 14:45 ` [PATCH 1/5] arm: mach-k3: common: Use ddr_init in spl_enable_dcache Georgi Vlaev
2022-06-16 14:38 ` Tom Rini
2022-07-07 1:55 ` Tom Rini
2022-06-14 14:45 ` [PATCH 2/5] arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl Georgi Vlaev
2022-06-16 14:38 ` Tom Rini
2022-07-07 1:55 ` Tom Rini
2022-06-14 14:45 ` [PATCH 3/5] board: ti: am62x: Use fdt functions for ram and bank init Georgi Vlaev
2022-06-16 14:38 ` Tom Rini
2022-07-07 1:55 ` Tom Rini
2022-06-14 14:45 ` [PATCH 4/5] board: ti: am62x: Account for DDR size fixups if ECC is enabled Georgi Vlaev
2022-06-16 14:39 ` Tom Rini
2022-07-07 1:55 ` Tom Rini
2022-06-14 14:45 ` [PATCH 5/5] configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig Georgi Vlaev
2022-06-16 14:39 ` Tom Rini [this message]
2022-07-07 1:55 ` Tom Rini
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