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From: Georgi Vlaev <g-vlaev@ti.com>
To: Vignesh Raghavendra <vigneshr@ti.com>,
	Anand Gadiyar <gadiyar@ti.com>, Tom Rini <trini@konsulko.com>
Cc: <u-boot@lists.denx.de>, Georgi Vlaev <g-vlaev@ti.com>
Subject: [PATCH 4/5] board: ti: am62x: Account for DDR size fixups if ECC is enabled
Date: Tue, 14 Jun 2022 17:45:33 +0300	[thread overview]
Message-ID: <20220614144534.317407-5-g-vlaev@ti.com> (raw)
In-Reply-To: <20220614144534.317407-1-g-vlaev@ti.com>

Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
---
 board/ti/am62x/evm.c | 53 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
index fb5106d1f3c8..d65ee1d69606 100644
--- a/board/ti/am62x/evm.c
+++ b/board/ti/am62x/evm.c
@@ -9,6 +9,8 @@
 
 #include <asm/io.h>
 #include <spl.h>
+#include <dm/uclass.h>
+#include <k3-ddrss.h>
 #include <fdt_support.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
@@ -30,3 +32,54 @@ int dram_init_banksize(void)
 {
 	return fdtdec_setup_memory_banksize();
 }
+
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_K3_AM64_DDRSS)
+static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
+{
+	struct udevice *dev;
+	int ret;
+
+	dram_init_banksize();
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret)
+		panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
+
+	ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
+	if (ret)
+		printf("Error fixing up ddr node for ECC use! %d\n", ret);
+}
+#else
+static void fixup_memory_node(struct spl_image_info *spl_image)
+{
+	u64 start[CONFIG_NR_DRAM_BANKS];
+	u64 size[CONFIG_NR_DRAM_BANKS];
+	int bank;
+	int ret;
+
+	dram_init();
+	dram_init_banksize();
+
+	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+		start[bank] =  gd->bd->bi_dram[bank].start;
+		size[bank] = gd->bd->bi_dram[bank].size;
+	}
+
+	/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
+	ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
+				     CONFIG_NR_DRAM_BANKS);
+	if (ret)
+		printf("Error fixing up memory node! %d\n", ret);
+}
+#endif
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+#if defined(CONFIG_K3_AM64_DDRSS)
+	fixup_ddr_driver_for_ecc(spl_image);
+#else
+	fixup_memory_node(spl_image);
+#endif
+}
+#endif
-- 
2.30.2


  parent reply	other threads:[~2022-06-14 15:23 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-14 14:45 [PATCH 0/5] board: ti: am62x: Add support for 1-bit inline DDRSS ECC Georgi Vlaev
2022-06-14 14:45 ` [PATCH 1/5] arm: mach-k3: common: Use ddr_init in spl_enable_dcache Georgi Vlaev
2022-06-16 14:38   ` Tom Rini
2022-07-07  1:55   ` Tom Rini
2022-06-14 14:45 ` [PATCH 2/5] arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl Georgi Vlaev
2022-06-16 14:38   ` Tom Rini
2022-07-07  1:55   ` Tom Rini
2022-06-14 14:45 ` [PATCH 3/5] board: ti: am62x: Use fdt functions for ram and bank init Georgi Vlaev
2022-06-16 14:38   ` Tom Rini
2022-07-07  1:55   ` Tom Rini
2022-06-14 14:45 ` Georgi Vlaev [this message]
2022-06-16 14:39   ` [PATCH 4/5] board: ti: am62x: Account for DDR size fixups if ECC is enabled Tom Rini
2022-07-07  1:55   ` Tom Rini
2022-06-14 14:45 ` [PATCH 5/5] configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig Georgi Vlaev
2022-06-16 14:39   ` Tom Rini
2022-07-07  1:55   ` Tom Rini

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