* [PATCH v2 0/3] Risc-V 32 bit/64 bit images
@ 2025-04-04 14:48 Mayuresh Chitale
2025-04-04 14:48 ` [PATCH v2 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Mayuresh Chitale @ 2025-04-04 14:48 UTC (permalink / raw)
To: u-boot
Cc: Mayuresh Chitale, Tom Rini, Maxim Moskalets, Mattijs Korpershoek,
Igor Opaniuk, Raymond Mao, Marek Vasut, Simon Glass,
Julien Masson, Sughosh Ganu, Paul HENRYS, Rick Chen, Leo,
Yu-Chien Peter Lin, Heinrich Schuchardt, Ilias Apalodimas,
Janne Grunau, Dario Binacchi, Sam Protsenko
This series adds support for building different images for 32-bit vs
64-bit Risc-V CPUs and also for verifying the target arch of an image
before booting it.
Change in v2:
- Rebase to latest master branch
- Improve comment in image.h
- Set arch type in booti for all modes
Changes from RFC:
- Rebase on latest master branch
- Improve commit message for patch 3
Mayuresh Chitale (3):
riscv: image: Add new image type for RV64
riscv: Select appropriate image type
booti/bootm: riscv: Verify image arch type
arch/riscv/dts/binman.dtsi | 14 ++++++++++----
arch/riscv/include/asm/u-boot.h | 4 ++++
arch/riscv/lib/bootm.c | 4 ++++
boot/image.c | 3 ++-
cmd/booti.c | 7 +++++--
include/image.h | 3 ++-
6 files changed, 27 insertions(+), 8 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 1/3] riscv: image: Add new image type for RV64 2025-04-04 14:48 [PATCH v2 0/3] Risc-V 32 bit/64 bit images Mayuresh Chitale @ 2025-04-04 14:48 ` Mayuresh Chitale 2025-04-05 3:28 ` Yao Zi 2025-04-04 14:48 ` [PATCH v2 2/3] riscv: Select appropriate image type Mayuresh Chitale 2025-04-04 14:48 ` [PATCH v2 3/3] booti/bootm: riscv: Verify image arch type Mayuresh Chitale 2 siblings, 1 reply; 6+ messages in thread From: Mayuresh Chitale @ 2025-04-04 14:48 UTC (permalink / raw) To: u-boot Cc: Mayuresh Chitale, Tom Rini, Maxim Moskalets, Mattijs Korpershoek, Igor Opaniuk, Raymond Mao, Marek Vasut, Simon Glass, Julien Masson, Sughosh Ganu, Paul HENRYS Similar to ARM and X86, introduce a new image type which allows u-boot to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com> --- boot/image.c | 3 ++- include/image.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/boot/image.c b/boot/image.c index 139c5bd035a..45299a7dc33 100644 --- a/boot/image.c +++ b/boot/image.c @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = { { IH_ARCH_ARC, "arc", "ARC", }, { IH_ARCH_X86_64, "x86_64", "AMD x86_64", }, { IH_ARCH_XTENSA, "xtensa", "Xtensa", }, - { IH_ARCH_RISCV, "riscv", "RISC-V", }, + { IH_ARCH_RISCV, "riscv", "RISC-V 32 Bit",}, + { IH_ARCH_RISCV64, "riscv64", "RISC-V 64 Bit",}, { -1, "", "", }, }; diff --git a/include/image.h b/include/image.h index 07912606f33..411bfcd0877 100644 --- a/include/image.h +++ b/include/image.h @@ -138,7 +138,8 @@ enum { IH_ARCH_ARC, /* Synopsys DesignWare ARC */ IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */ IH_ARCH_XTENSA, /* Xtensa */ - IH_ARCH_RISCV, /* RISC-V */ + IH_ARCH_RISCV, /* RISC-V 32 bit*/ + IH_ARCH_RISCV64, /* RISC-V 64 bit*/ IH_ARCH_COUNT, }; -- 2.43.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/3] riscv: image: Add new image type for RV64 2025-04-04 14:48 ` [PATCH v2 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale @ 2025-04-05 3:28 ` Yao Zi 0 siblings, 0 replies; 6+ messages in thread From: Yao Zi @ 2025-04-05 3:28 UTC (permalink / raw) To: Mayuresh Chitale, u-boot Cc: Tom Rini, Maxim Moskalets, Mattijs Korpershoek, Igor Opaniuk, Raymond Mao, Marek Vasut, Simon Glass, Julien Masson, Sughosh Ganu, Paul HENRYS On Fri, Apr 04, 2025 at 02:48:55PM +0000, Mayuresh Chitale wrote: > Similar to ARM and X86, introduce a new image type which allows u-boot > to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs. > > Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> > Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com> > --- > boot/image.c | 3 ++- > include/image.h | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/boot/image.c b/boot/image.c > index 139c5bd035a..45299a7dc33 100644 > --- a/boot/image.c > +++ b/boot/image.c > @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = { > { IH_ARCH_ARC, "arc", "ARC", }, > { IH_ARCH_X86_64, "x86_64", "AMD x86_64", }, > { IH_ARCH_XTENSA, "xtensa", "Xtensa", }, > - { IH_ARCH_RISCV, "riscv", "RISC-V", }, > + { IH_ARCH_RISCV, "riscv", "RISC-V 32 Bit",}, > + { IH_ARCH_RISCV64, "riscv64", "RISC-V 64 Bit",}, > { -1, "", "", }, > }; > > diff --git a/include/image.h b/include/image.h > index 07912606f33..411bfcd0877 100644 > --- a/include/image.h > +++ b/include/image.h > @@ -138,7 +138,8 @@ enum { > IH_ARCH_ARC, /* Synopsys DesignWare ARC */ > IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */ > IH_ARCH_XTENSA, /* Xtensa */ > - IH_ARCH_RISCV, /* RISC-V */ > + IH_ARCH_RISCV, /* RISC-V 32 bit*/ I'll consider IH_ARCH_RISCV32 a better idea, instead of implying 32bit when no suffix attached. We (and the Linux kernel) mix 32-bit and 64-bit variants of RISC-V together, thus it's hard to tell the exact bitwidth of "IH_ARCH_RISCV" without inspecting the code around. To me, it sounds more like "RISC-V, but no bitwidth specified". It will be nice if we could avoid this kind of ambiguity. > + IH_ARCH_RISCV64, /* RISC-V 64 bit*/ > IH_ARCH_COUNT, > }; > -- > 2.43.0 > Thanks, Yao Zi ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 2/3] riscv: Select appropriate image type 2025-04-04 14:48 [PATCH v2 0/3] Risc-V 32 bit/64 bit images Mayuresh Chitale 2025-04-04 14:48 ` [PATCH v2 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale @ 2025-04-04 14:48 ` Mayuresh Chitale 2025-05-12 9:26 ` Leo Liang 2025-04-04 14:48 ` [PATCH v2 3/3] booti/bootm: riscv: Verify image arch type Mayuresh Chitale 2 siblings, 1 reply; 6+ messages in thread From: Mayuresh Chitale @ 2025-04-04 14:48 UTC (permalink / raw) To: u-boot; +Cc: Mayuresh Chitale, Rick Chen, Leo, Tom Rini, Yu-Chien Peter Lin Select between the 32-bit or 64-bit arch type for the image headers depending on how the build is configured. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> --- arch/riscv/dts/binman.dtsi | 14 ++++++++++---- arch/riscv/include/asm/u-boot.h | 4 ++++ 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi index 0405faca574..a1a566b511b 100644 --- a/arch/riscv/dts/binman.dtsi +++ b/arch/riscv/dts/binman.dtsi @@ -5,6 +5,12 @@ #include <config.h> +#ifdef CONFIG_64BIT +#define ARCH "riscv64" +#else +#define ARCH "riscv" + +#endif / { binman: binman { multiple-images; @@ -31,7 +37,7 @@ description = "U-Boot"; type = "standalone"; os = "U-Boot"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 <CONFIG_TEXT_BASE>; @@ -44,7 +50,7 @@ description = "Linux"; type = "standalone"; os = "Linux"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 <CONFIG_TEXT_BASE>; @@ -57,7 +63,7 @@ tee { description = "OP-TEE"; type = "tee"; - arch = "riscv"; + arch = ARCH; compression = "none"; os = "tee"; load = /bits/ 64 <CONFIG_SPL_OPTEE_LOAD_ADDR>; @@ -71,7 +77,7 @@ description = "OpenSBI fw_dynamic Firmware"; type = "firmware"; os = "opensbi"; - arch = "riscv"; + arch = ARCH; compression = "none"; load = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>; entry = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>; diff --git a/arch/riscv/include/asm/u-boot.h b/arch/riscv/include/asm/u-boot.h index d5e1d5f3231..a90cc4c21cf 100644 --- a/arch/riscv/include/asm/u-boot.h +++ b/arch/riscv/include/asm/u-boot.h @@ -23,6 +23,10 @@ #include <asm/u-boot-riscv.h> /* For image.h:image_check_target_arch() */ +#ifdef CONFIG_64BIT +#define IH_ARCH_DEFAULT IH_ARCH_RISCV64 +#else #define IH_ARCH_DEFAULT IH_ARCH_RISCV +#endif #endif /* _U_BOOT_H_ */ -- 2.43.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/3] riscv: Select appropriate image type 2025-04-04 14:48 ` [PATCH v2 2/3] riscv: Select appropriate image type Mayuresh Chitale @ 2025-05-12 9:26 ` Leo Liang 0 siblings, 0 replies; 6+ messages in thread From: Leo Liang @ 2025-05-12 9:26 UTC (permalink / raw) To: Mayuresh Chitale; +Cc: u-boot, Rick Chen, Tom Rini, Yu-Chien Peter Lin On Fri, Apr 04, 2025 at 02:48:56PM +0000, Mayuresh Chitale wrote: > Select between the 32-bit or 64-bit arch type for the image headers > depending on how the build is configured. > > Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> > --- > arch/riscv/dts/binman.dtsi | 14 ++++++++++---- > arch/riscv/include/asm/u-boot.h | 4 ++++ > 2 files changed, 14 insertions(+), 4 deletions(-) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 3/3] booti/bootm: riscv: Verify image arch type 2025-04-04 14:48 [PATCH v2 0/3] Risc-V 32 bit/64 bit images Mayuresh Chitale 2025-04-04 14:48 ` [PATCH v2 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale 2025-04-04 14:48 ` [PATCH v2 2/3] riscv: Select appropriate image type Mayuresh Chitale @ 2025-04-04 14:48 ` Mayuresh Chitale 2 siblings, 0 replies; 6+ messages in thread From: Mayuresh Chitale @ 2025-04-04 14:48 UTC (permalink / raw) To: u-boot Cc: Mayuresh Chitale, Rick Chen, Leo, Tom Rini, Sughosh Ganu, Simon Glass, Heinrich Schuchardt, Ilias Apalodimas, Janne Grunau, Dario Binacchi, Sam Protsenko Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently not supported for Risc-V. Hence, for bootm, disallow booting a FIT or a legacy image that was built for an arch type which is different than the current arch and for booti, set the arch type to be the same as the current arch. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> --- arch/riscv/lib/bootm.c | 4 ++++ cmd/booti.c | 7 +++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index 76c610bcee0..90f71bee6a5 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -94,6 +94,10 @@ static void boot_jump_linux(struct bootm_headers *images, int flag) announce_and_cleanup(fake); if (!fake) { + if (images->os.arch != IH_ARCH_DEFAULT) { + printf("Image arch not compatible with host arch.\n"); + hang(); + } if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) { #ifdef CONFIG_SMP ret = smp_call_function(images->ep, diff --git a/cmd/booti.c b/cmd/booti.c index 1a57fe91397..ced2c1047ab 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -130,8 +130,11 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) bootm_disable_interrupts(); images.os.os = IH_OS_LINUX; - if (IS_ENABLED(CONFIG_RISCV_SMODE)) - images.os.arch = IH_ARCH_RISCV; + if (IS_ENABLED(CONFIG_RISCV)) + if (IS_ENABLED(CONFIG_64BIT)) + images.os.arch = IH_ARCH_RISCV64; + else + images.os.arch = IH_ARCH_RISCV; else if (IS_ENABLED(CONFIG_ARM64)) images.os.arch = IH_ARCH_ARM64; -- 2.43.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-05-12 9:27 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-04-04 14:48 [PATCH v2 0/3] Risc-V 32 bit/64 bit images Mayuresh Chitale 2025-04-04 14:48 ` [PATCH v2 1/3] riscv: image: Add new image type for RV64 Mayuresh Chitale 2025-04-05 3:28 ` Yao Zi 2025-04-04 14:48 ` [PATCH v2 2/3] riscv: Select appropriate image type Mayuresh Chitale 2025-05-12 9:26 ` Leo Liang 2025-04-04 14:48 ` [PATCH v2 3/3] booti/bootm: riscv: Verify image arch type Mayuresh Chitale
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