[PATCH v2 0/2] RB1 fixes

[PATCH v2 0/2] RB1 fixes

[Sumit Garg]

The eMMC on RB1 boards supports HS200 mode but currently the msm_shdci
driver in U-Boot is missing DLL configuration required for HS200 mode to
work. Hence disable HS200 for now until proper support is in place.

Apart from that, add a fix for USB PHY power on sequence which got
broken by recent addition for SM660 platform support.

Changes in v2:
- Drop DT override patch as Caleb fixed SD card and enable USB DT fixup
  via OF_LIVE here [1].
- Expand commit message for eMMC fix.
- Add a patch to fix USB PHY power on sequence.

[1] https://lore.kernel.org/u-boot/20250409-livetree-fixup-v1-0-76dfea80b07f@linaro.org/

Sumit Garg (2):
  qcom_defconfig: Disable MMC HS200 mode support
  phy: phy-qcom-qusb2: Fix USB PHY power on sequence

 configs/qcom_defconfig            | 1 -
 drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
2.43.0

[PATCH v2 1/2] qcom_defconfig: Disable MMC HS200 mode support

[Sumit Garg]

From: Sumit Garg <sumit.garg@oss.qualcomm.com>

Currently the msm_sdhci doesn't yet support DLL configurations which are
required to enable bus speeds greater that 100MHz. So disable HS200 mode
support as of now as it requires bus speeds of 200MHz.

This should fix eMMC issues reported on RB1/RB2 although it should fix
issues for all Qcom platforms but it's not seen there as mostly SD cards
available don't support HS200 mode. The SD cards usually works in high
speed mode whose performance remains unaffected by this change. It only
affects RB1/RB2 as eMMC flash on these support HS200 mode but the U-Boot
driver currently is incapable of supporting that.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
---
 configs/qcom_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index a2b54b95f19..537806450dc 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -81,7 +81,6 @@ CONFIG_QCOM_HYP_SMMU=y
 CONFIG_MISC=y
 CONFIG_NVMEM=y
 CONFIG_I2C_EEPROM=y
-CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ADMA=y
 CONFIG_MMC_SDHCI_MSM=y
-- 
2.43.0

[PATCH v2 2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence

[Sumit Garg]

From: Sumit Garg <sumit.garg@oss.qualcomm.com>

Recent addition of support for SDM660 inadvertently broke USB PHY power
on sequence on RB1/RB2 and others with following error:

starting USB...
Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
Can't power on PHY0
probe failed, error -16
No USB controllers found

The root cause was the addition of flag se_clk_scheme_default which was
configured correctly for SDM660 but incorrect for all other supported
SoC. Fix that by properly assignment as per upstream Linux driver.

Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
---
 drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
index cabd05bf5a6..d98f6108e69 100644
--- a/drivers/phy/qcom/phy-qcom-qusb2.c
+++ b/drivers/phy/qcom/phy-qcom-qusb2.c
@@ -230,6 +230,7 @@ static const struct qusb2_phy_cfg sm6115_phy_cfg = {
 	.regs = sm6115_regs_layout,
 
 	.has_pll_test = true,
+	.se_clk_scheme_default = true,
 	.disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
 	.mask_core_ready = PLL_LOCKED,
 	.autoresume_en = BIT(3),
@@ -256,6 +257,7 @@ static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
 			 POWER_DOWN),
 	.mask_core_ready = CORE_READY_STATUS,
 	.has_pll_override = true,
+	.se_clk_scheme_default = true,
 	.autoresume_en = BIT(0),
 	.update_tune1_with_efuse = true,
 };
-- 
2.43.0

Re: [PATCH v2 2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence

[neil.armstrong]

On 10/04/2025 10:00, Sumit Garg wrote:
> From: Sumit Garg <sumit.garg@oss.qualcomm.com>
> 
> Recent addition of support for SDM660 inadvertently broke USB PHY power
> on sequence on RB1/RB2 and others with following error:
> 
> starting USB...
> Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
> qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
> Can't power on PHY0
> probe failed, error -16
> No USB controllers found
> 
> The root cause was the addition of flag se_clk_scheme_default which was
> configured correctly for SDM660 but incorrect for all other supported
> SoC. Fix that by properly assignment as per upstream Linux driver.
> 
> Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
> ---
>   drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
> index cabd05bf5a6..d98f6108e69 100644
> --- a/drivers/phy/qcom/phy-qcom-qusb2.c
> +++ b/drivers/phy/qcom/phy-qcom-qusb2.c
> @@ -230,6 +230,7 @@ static const struct qusb2_phy_cfg sm6115_phy_cfg = {
>   	.regs = sm6115_regs_layout,
>   
>   	.has_pll_test = true,
> +	.se_clk_scheme_default = true,
>   	.disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
>   	.mask_core_ready = PLL_LOCKED,
>   	.autoresume_en = BIT(3),
> @@ -256,6 +257,7 @@ static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
>   			 POWER_DOWN),
>   	.mask_core_ready = CORE_READY_STATUS,
>   	.has_pll_override = true,
> +	.se_clk_scheme_default = true,
>   	.autoresume_en = BIT(0),
>   	.update_tune1_with_efuse = true,
>   };

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Re: [PATCH v2 2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence

[neil.armstrong]

On 10/04/2025 10:00, Sumit Garg wrote:
> From: Sumit Garg <sumit.garg@oss.qualcomm.com>
> 
> Recent addition of support for SDM660 inadvertently broke USB PHY power
> on sequence on RB1/RB2 and others with following error:
> 
> starting USB...
> Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
> qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
> Can't power on PHY0
> probe failed, error -16
> No USB controllers found
> 
> The root cause was the addition of flag se_clk_scheme_default which was
> configured correctly for SDM660 but incorrect for all other supported
> SoC. Fix that by properly assignment as per upstream Linux driver.
> 
> Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
> ---
>   drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
> index cabd05bf5a6..d98f6108e69 100644
> --- a/drivers/phy/qcom/phy-qcom-qusb2.c
> +++ b/drivers/phy/qcom/phy-qcom-qusb2.c
> @@ -230,6 +230,7 @@ static const struct qusb2_phy_cfg sm6115_phy_cfg = {
>   	.regs = sm6115_regs_layout,
>   
>   	.has_pll_test = true,
> +	.se_clk_scheme_default = true,
>   	.disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
>   	.mask_core_ready = PLL_LOCKED,
>   	.autoresume_en = BIT(3),
> @@ -256,6 +257,7 @@ static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
>   			 POWER_DOWN),
>   	.mask_core_ready = CORE_READY_STATUS,
>   	.has_pll_override = true,
> +	.se_clk_scheme_default = true,
>   	.autoresume_en = BIT(0),
>   	.update_tune1_with_efuse = true,
>   };

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Re: [PATCH v2 1/2] qcom_defconfig: Disable MMC HS200 mode support

[neil.armstrong]

On 10/04/2025 10:00, Sumit Garg wrote:
> From: Sumit Garg <sumit.garg@oss.qualcomm.com>
> 
> Currently the msm_sdhci doesn't yet support DLL configurations which are
> required to enable bus speeds greater that 100MHz. So disable HS200 mode
> support as of now as it requires bus speeds of 200MHz.
> 
> This should fix eMMC issues reported on RB1/RB2 although it should fix
> issues for all Qcom platforms but it's not seen there as mostly SD cards
> available don't support HS200 mode. The SD cards usually works in high
> speed mode whose performance remains unaffected by this change. It only
> affects RB1/RB2 as eMMC flash on these support HS200 mode but the U-Boot
> driver currently is incapable of supporting that.
> 
> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
> ---
>   configs/qcom_defconfig | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
> index a2b54b95f19..537806450dc 100644
> --- a/configs/qcom_defconfig
> +++ b/configs/qcom_defconfig
> @@ -81,7 +81,6 @@ CONFIG_QCOM_HYP_SMMU=y
>   CONFIG_MISC=y
>   CONFIG_NVMEM=y
>   CONFIG_I2C_EEPROM=y
> -CONFIG_MMC_HS200_SUPPORT=y
>   CONFIG_MMC_SDHCI=y
>   CONFIG_MMC_SDHCI_ADMA=y
>   CONFIG_MMC_SDHCI_MSM=y

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

Re: [PATCH v2 2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence

[Caleb Connolly]

On 4/10/25 10:00, Sumit Garg wrote:
> From: Sumit Garg <sumit.garg@oss.qualcomm.com>
> 
> Recent addition of support for SDM660 inadvertently broke USB PHY power
> on sequence on RB1/RB2 and others with following error:
> 
> starting USB...
> Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
> qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
> Can't power on PHY0
> probe failed, error -16
> No USB controllers found
> 
> The root cause was the addition of flag se_clk_scheme_default which was
> configured correctly for SDM660 but incorrect for all other supported
> SoC. Fix that by properly assignment as per upstream Linux driver.
> 
> Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

Nice find! Thanks.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>> ---
>   drivers/phy/qcom/phy-qcom-qusb2.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
> index cabd05bf5a6..d98f6108e69 100644
> --- a/drivers/phy/qcom/phy-qcom-qusb2.c
> +++ b/drivers/phy/qcom/phy-qcom-qusb2.c
> @@ -230,6 +230,7 @@ static const struct qusb2_phy_cfg sm6115_phy_cfg = {
>   	.regs = sm6115_regs_layout,
>   
>   	.has_pll_test = true,
> +	.se_clk_scheme_default = true,
>   	.disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
>   	.mask_core_ready = PLL_LOCKED,
>   	.autoresume_en = BIT(3),
> @@ -256,6 +257,7 @@ static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
>   			 POWER_DOWN),
>   	.mask_core_ready = CORE_READY_STATUS,
>   	.has_pll_override = true,
> +	.se_clk_scheme_default = true,
>   	.autoresume_en = BIT(0),
>   	.update_tune1_with_efuse = true,
>   };

-- 
Caleb (they/them)

Re: [PATCH v2 0/2] RB1 fixes

[Caleb Connolly]

On Thu, 10 Apr 2025 13:30:25 +0530, Sumit Garg wrote:
> The eMMC on RB1 boards supports HS200 mode but currently the msm_shdci
> driver in U-Boot is missing DLL configuration required for HS200 mode to
> work. Hence disable HS200 for now until proper support is in place.
> 
> Apart from that, add a fix for USB PHY power on sequence which got
> broken by recent addition for SM660 platform support.
> 
> [...]

Applied, thanks!

[1/2] qcom_defconfig: Disable MMC HS200 mode support
      https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/01445f10cd58
[2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence
      https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/cd5799caf491

Best regards,
-- 
Caleb Connolly <caleb.connolly@linaro.org>

Re: [PATCH v2 0/2] RB1 fixes

[Caleb Connolly]

On Thu, 10 Apr 2025 13:30:25 +0530, Sumit Garg wrote:
> The eMMC on RB1 boards supports HS200 mode but currently the msm_shdci
> driver in U-Boot is missing DLL configuration required for HS200 mode to
> work. Hence disable HS200 for now until proper support is in place.
> 
> Apart from that, add a fix for USB PHY power on sequence which got
> broken by recent addition for SM660 platform support.
> 
> [...]

Applied, thanks!

[1/2] qcom_defconfig: Disable MMC HS200 mode support
      https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/49cf3b29134c
[2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence
      https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/45acd9d2d4ec

Best regards,
-- 
Caleb Connolly <caleb.connolly@linaro.org>