[U-Boot-Users] [RFC/PATCH] SPI API improvements

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Haavard Skinnemoen]

From: Haavard Skinnemoen <hskinnemoen@atmel.com>

This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates a given chipselect line
  * spi_cs_deactivate(): Deactivates a given chipselect line
  * spi_cs_is_valid(): Determines if the given chipselect line can be
    activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch hasn't been tested on all the boards involved, so there are
probably a few issues. For now, I'd like some comments on the new
interface -- if it looks good, we should spend some additional effort
to validate that it doesn't introduce any breakage. I could use some
help with this.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

SPI API update

New SPI API: Update soft_spi

More SPI API updates
---
 board/amcc/taihu/taihu.c                  |   16 ++--
 board/freescale/mpc8349emds/mpc8349emds.c |   25 +++---
 board/sacsng/sacsng.c                     |   35 +++-----
 board/ssv/adnpesc1/adnpesc1.c             |   27 +++---
 common/cmd_spi.c                          |   28 +++---
 common/soft_spi.c                         |  110 ++++++++++++++++-------
 cpu/nios/spi.c                            |   71 +++++++++++----
 drivers/rtc/ds1306.c                      |   67 ++++++++++----
 drivers/rtc/mc13783-rtc.c                 |   28 ++++++-
 drivers/spi/mpc8xxx_spi.c                 |   54 ++++++++++--
 drivers/spi/mxc_spi.c                     |   71 +++++++++------
 include/spi.h                             |  139 ++++++++++++++++++++++++-----
 12 files changed, 478 insertions(+), 193 deletions(-)

diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
index eedde59..e8be434 100644
--- a/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@ -165,16 +165,20 @@ unsigned char spi_read(void)
 	return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
 }
 
-void taihu_spi_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	gpio_write_bit(SPI_CS_GPIO0, cs);
+	return bus == 0 && cs == 0;
 }
 
-spi_chipsel_type spi_chipsel[]= {
-	taihu_spi_chipsel
-};
+void spi_cs_activate(unsigned int cs)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 1);
+}
 
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(unsigned int cs)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 0);
+}
 
 #ifdef CONFIG_PCI
 static unsigned char int_lines[32] = {
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 6c82596..5effd35 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -257,25 +257,24 @@ void sdram_init(void)
 
 #define SPI_CS_MASK	0x80000000
 
-void spi_eeprom_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(unsigned int cs)
 {
 	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
-	if (cs)
-		iopd->dat &= ~SPI_CS_MASK;
-	else
-		iopd->dat |=  SPI_CS_MASK;
+	iopd->dat &= ~SPI_CS_MASK;
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_eeprom_chipsel,
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(unsigned int cs)
+{
+	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
+	iopd->dat |=  SPI_CS_MASK;
+}
 #endif /* CONFIG_HARD_SPI */
 
 #if defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c
index 25209e0..c201008 100644
--- a/board/sacsng/sacsng.c
+++ b/board/sacsng/sacsng.c
@@ -842,37 +842,30 @@ void show_boot_progress (int status)
 #define SPI_ADC_CS_MASK	0x00000800
 #define SPI_DAC_CS_MASK	0x00001000
 
-void spi_adc_chipsel(int cs)
+static const u32 cs_mask[] = {
+    SPI_ADC_CS_MASK,
+    SPI_DAC_CS_MASK,
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+    return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]);
+}
+
+void spi_cs_activate(unsigned int cs)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_ADC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_ADC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat &= ~cs_mask[cs];
 }
 
-void spi_dac_chipsel(int cs)
+void spi_cs_deactivate(unsigned int cs)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_DAC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_DAC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat |= cs_mask[cs];
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_adc_chipsel,
-	spi_dac_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
 #endif
 
 #endif /* CONFIG_MISC_INIT_R */
diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c
index 2ec3a72..692f615 100644
--- a/board/ssv/adnpesc1/adnpesc1.c
+++ b/board/ssv/adnpesc1/adnpesc1.c
@@ -69,25 +69,24 @@ long int initdram (int board_type)
 
 #define	SPI_RTC_CS_MASK	0x00000001
 
-void spi_rtc_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(unsigned int cs)
 {
 	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
 
-	if (cs)
-		spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
-	else
-		spi->slaveselect = 0;			/* deactivate (0) */
+	spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_rtc_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(unsigned int cs)
+{
+	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
+
+	spi->slaveselect = 0;			/* deactivate (0) */
+}
 
 #endif
 
diff --git a/common/cmd_spi.c b/common/cmd_spi.c
index 7604422..b0e7db1 100644
--- a/common/cmd_spi.c
+++ b/common/cmd_spi.c
@@ -38,19 +38,13 @@
 #endif
 
 /*
- * External table of chip select functions (see the appropriate board
- * support for the actual definition of the table).
- */
-extern spi_chipsel_type spi_chipsel[];
-extern int spi_chipsel_cnt;
-
-/*
  * Values from last command.
  */
 static int   device;
 static int   bitlen;
 static uchar dout[MAX_SPI_BYTES];
 static uchar din[MAX_SPI_BYTES];
+static struct spi_slave *slave;
 
 /*
  * SPI read/write
@@ -65,6 +59,7 @@ static uchar din[MAX_SPI_BYTES];
 
 int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
+	struct spi_slave *slave;
 	char  *cp = 0;
 	uchar tmp;
 	int   j;
@@ -101,19 +96,22 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		}
 	}
 
-	if ((device < 0) || (device >=  spi_chipsel_cnt)) {
-		printf("Invalid device %d, giving up.\n", device);
-		return 1;
-	}
 	if ((bitlen < 0) || (bitlen >  (MAX_SPI_BYTES * 8))) {
 		printf("Invalid bitlen %d, giving up.\n", bitlen);
 		return 1;
 	}
 
-	debug ("spi_chipsel[%d] = %08X\n",
-		device, (uint)spi_chipsel[device]);
+	/* FIXME: Make these parameters configurable */
+	slave = spi_setup_slave(0, device, 1000000, SPI_MODE_0);
+	if (!slave) {
+		printf("Invalid device %d, giving up.\n", device);
+		return 1;
+	}
+
+	debug ("spi chipsel = %08X\n", device);
 
-	if(spi_xfer(spi_chipsel[device], bitlen, dout, din) != 0) {
+	spi_claim_bus(slave);
+	if(spi_xfer(device, bitlen, dout, din) != 0) {
 		printf("Error with the SPI transaction.\n");
 		rcode = 1;
 	} else {
@@ -123,6 +121,8 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		}
 		printf("\n");
 	}
+	spi_release_bus(slave);
+	spi_free_slave(slave);
 
 	return rcode;
 }
diff --git a/common/soft_spi.c b/common/soft_spi.c
index e425061..76ffcd3 100644
--- a/common/soft_spi.c
+++ b/common/soft_spi.c
@@ -29,6 +29,8 @@
 
 #if defined(CONFIG_SOFT_SPI)
 
+#include <malloc.h>
+
 /*-----------------------------------------------------------------------
  * Definitions
  */
@@ -39,6 +41,10 @@
 #define PRINTD(fmt,args...)
 #endif
 
+struct spi_slave {
+	unsigned int cs;
+	unsigned int mode;
+};
 
 /*=====================================================================*/
 /*                         Public Functions                            */
@@ -56,6 +62,49 @@ void spi_init (void)
 #endif
 }
 
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+		unsigned int max_hz, unsigned int mode)
+{
+	struct spi_slave *slave;
+
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	slave = malloc(sizeof(struct spi_slave));
+	if (!slave)
+		return NULL;
+
+	slave->cs = cs;
+	slave->mode = mode;
+
+	/* TODO: Use max_hz to limit the SCK rate */
+
+	return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	/*
+	 * Make sure the SPI clock is in idle state as defined for
+	 * this slave.
+	 */
+	if (slave->mode & SPI_CPOL)
+		SPI_SCL(1);
+	else
+		SPI_SCL(0);
+
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	/* Nothing to do */
+}
 
 /*-----------------------------------------------------------------------
  * SPI transfer
@@ -68,50 +117,53 @@ void spi_init (void)
  * and "din" can point to the same memory location, in which case the
  * input data overwrites the output data (since both are buffered by
  * temporary variables, this is OK).
- *
- * If the chipsel() function is not NULL, it is called with a parameter
- * of '1' (chip select active) at the start of the transfer and again with
- * a parameter of '0' at the end of the transfer.
- *
- * If the chipsel() function _is_ NULL, it the responsibility of the
- * caller to make the appropriate chip select active before calling
- * spi_xfer() and making it inactive after spi_xfer() returns.
  */
-int  spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
+int  spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
 {
 #ifdef CFG_IMMR
 	volatile immap_t *immr = (immap_t *)CFG_IMMR;
 #endif
-	uchar tmpdin  = 0;
-	uchar tmpdout = 0;
-	int   j;
+	uchar		tmpdin  = 0;
+	uchar		tmpdout = 0;
+	const u8	*txd = dout;
+	u8		*rxd = din;
+	int		cpol = slave->mode & SPI_CPOL;
+	int		cpha = slave->mode & SPI_CPHA;
+	unsigned int	j;
 
-	PRINTD("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n",
-		(int)chipsel, *(uint *)dout, *(uint *)din, bitlen);
+	PRINTD("spi_xfer: chipsel %d dout %08X din %08X bitlen %u\n",
+		cs, *(uint *)txd, *(uint *)rxd, bitlen);
 
-	if(chipsel != NULL) {
-		(*chipsel)(1);	/* select the target chip */
-	}
+	if (flags & SPI_XFER_BEGIN)
+		spi_cs_activate(slave->cs);
 
 	for(j = 0; j < bitlen; j++) {
 		/*
 		 * Check if it is time to work on a new byte.
 		 */
 		if((j % 8) == 0) {
-			tmpdout = *dout++;
+			tmpdout = *txd++;
 			if(j != 0) {
-				*din++ = tmpdin;
+				*rxd++ = tmpdin;
 			}
 			tmpdin  = 0;
 		}
-		SPI_SCL(0);
+
+		if (!cpha)
+			SPI_SCL(!cpol);
 		SPI_SDA(tmpdout & 0x80);
 		SPI_DELAY;
-		SPI_SCL(1);
+		if (cpha)
+			SPI_SCL(!cpol);
+		else
+			SPI_SCL(cpol);
+		tmpdin	<<= 1;
+		tmpdin	|= SPI_READ;
+		tmpdout	<<= 1;
 		SPI_DELAY;
-		tmpdin  <<= 1;
-		tmpdin   |= SPI_READ;
-		tmpdout <<= 1;
+		if (cpha)
+			SPI_SCL(cpol);
 	}
 	/*
 	 * If the number of bits isn't a multiple of 8, shift the last
@@ -120,14 +172,10 @@ int  spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 	 */
 	if((bitlen % 8) != 0)
 		tmpdin <<= 8 - (bitlen % 8);
-	*din++ = tmpdin;
+	*rxd++ = tmpdin;
 
-	SPI_SCL(0);		/* SPI wants the clock left low for idle */
-
-	if(chipsel != NULL) {
-		(*chipsel)(0);	/* deselect the target chip */
-
-	}
+	if (flags & SPI_XFER_END)
+		spi_cs_deactivate(slave->cs);
 
 	return(0);
 }
diff --git a/cpu/nios/spi.c b/cpu/nios/spi.c
index f37146b..7305875 100644
--- a/cpu/nios/spi.c
+++ b/cpu/nios/spi.c
@@ -40,6 +40,10 @@
 #error "*** CFG_NIOS_SPIBITS should be either 8 or 16 ***"
 #endif
 
+struct spi_slave {
+	unsigned int cs;
+};
+
 static nios_spi_t	*spi	= (nios_spi_t *)CFG_NIOS_SPIBASE;
 
 /* Warning:
@@ -63,10 +67,10 @@ static char quickhex (int i)
 	return hex_digit[i];
 }
 
-static void memdump (void *pv, int num)
+static void memdump (const void *pv, int num)
 {
 	int i;
-	unsigned char *pc = (unsigned char *) pv;
+	const unsigned char *pc = (const unsigned char *) pv;
 
 	for (i = 0; i < num; i++)
 		printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f));
@@ -83,26 +87,58 @@ static void memdump (void *pv, int num)
 #endif  /* DEBUG */
 
 
+struct spi_slave *spi_setup(unsigned int bus, unsigned int cs,
+		unsigned int max_hz, unsigned int mode)
+{
+	struct spi_slave *slave;
+
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	slave = malloc(sizeof(struct spi_slave));
+	if (!slave)
+		return NULL;
+
+	slave->cs = cs;
+
+	/* TODO: Add support for different modes and speeds */
+
+	return slave;
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+
+}
+
 /*
  * SPI transfer:
  *
  * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf
  * for more informations.
  */
-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
+int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout,
+		void *din, unsigned long flags)
 {
+	const u8 *txd = dout;
+	u8 *rxd = din;
 	int j;
 
 	DPRINT(("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n",
 		(int)chipsel, *(uint *)dout, *(uint *)din, bitlen));
 
-	memdump((void*)dout, (bitlen + 7) / 8);
+	memdump(dout, (bitlen + 7) / 8);
 
-	if(chipsel != NULL) {
-		chipsel(1);	/* select the target chip */
-	}
+	if (flags & SPI_XFER_BEGIN)
+		spi_cs_activate(cs);
 
-	if (bitlen > CFG_NIOS_SPIBITS) {	/* leave chip select active */
+	if (!(flags & SPI_XFER_END) || bitlen > CFG_NIOS_SPIBITS) {
+		/* leave chip select active */
 		spi->control |= NIOS_SPI_SSO;
 	}
 
@@ -114,11 +150,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 
 		while ((spi->status & NIOS_SPI_TRDY) == 0)
 			;
-		spi->txdata = (unsigned)(dout[j]);
+		spi->txdata = (unsigned)(txd[j]);
 
 		while ((spi->status & NIOS_SPI_RRDY) == 0)
 			;
-		din[j] = (unsigned char)(spi->rxdata & 0xff);
+		rxd[j] = (unsigned char)(spi->rxdata & 0xff);
 
 #elif	(CFG_NIOS_SPIBITS == 16)
 		j++, j++) {
@@ -126,15 +162,15 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 		while ((spi->status & NIOS_SPI_TRDY) == 0)
 			;
 		if ((j+1) < ((bitlen + 7) / 8))
-			spi->txdata = (unsigned)((dout[j] << 8) | dout[j+1]);
+			spi->txdata = (unsigned)((txd[j] << 8) | txd[j+1]);
 		else
-			spi->txdata = (unsigned)(dout[j] << 8);
+			spi->txdata = (unsigned)(txd[j] << 8);
 
 		while ((spi->status & NIOS_SPI_RRDY) == 0)
 			;
-		din[j] = (unsigned char)((spi->rxdata >> 8) & 0xff);
+		rxd[j] = (unsigned char)((spi->rxdata >> 8) & 0xff);
 		if ((j+1) < ((bitlen + 7) / 8))
-			din[j+1] = (unsigned char)(spi->rxdata & 0xff);
+			rxd[j+1] = (unsigned char)(spi->rxdata & 0xff);
 
 #else
 #error "*** unsupported value of CFG_NIOS_SPIBITS ***"
@@ -146,11 +182,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 		spi->control &= ~NIOS_SPI_SSO;
 	}
 
-	if(chipsel != NULL) {
-		chipsel(0);	/* deselect the target chip */
-	}
+	if (flags & SPI_XFER_END)
+		spi_cs_deactivate(cs);
 
-	memdump((void*)din, (bitlen + 7) / 8);
+	memdump(din, (bitlen + 7) / 8);
 
 	return 0;
 }
diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c
index 1c8ac7f..29854fc 100644
--- a/drivers/rtc/ds1306.c
+++ b/drivers/rtc/ds1306.c
@@ -62,13 +62,6 @@
 
 #define	RTC_USER_RAM_BASE	0x20
 
-/*
- * External table of chip select functions (see the appropriate board
- * support for the actual definition of the table).
- */
-extern spi_chipsel_type spi_chipsel[];
-extern int spi_chipsel_cnt;
-
 static unsigned int bin2bcd (unsigned int n);
 static unsigned char bcd2bin (unsigned char c);
 
@@ -305,11 +298,29 @@ void rtc_reset (void)
 static unsigned char rtc_read (unsigned char reg);
 static void rtc_write (unsigned char reg, unsigned char val);
 
+static struct spi_slave *slave;
+
 /* read clock time from DS1306 and return it in *tmp */
 int rtc_get (struct rtc_time *tmp)
 {
 	unsigned char sec, min, hour, mday, wday, mon, year;
 
+	/*
+	 * Assuming Vcc = 2.0V (lowest speed)
+	 *
+	 * REVISIT: If we add an rtc_init() function we can do this
+	 * step just once.
+	 */
+	if (!slave) {
+		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
+				SPI_MODE_3 | SPI_CS_HIGH);
+		if (!slave)
+			return;
+	}
+
+	if (spi_claim_bus(slave))
+		return;
+
 	sec = rtc_read (RTC_SECONDS);
 	min = rtc_read (RTC_MINUTES);
 	hour = rtc_read (RTC_HOURS);
@@ -318,6 +329,8 @@ int rtc_get (struct rtc_time *tmp)
 	mon = rtc_read (RTC_MONTH);
 	year = rtc_read (RTC_YEAR);
 
+	spi_release_bus(slave);
+
 	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
 	       "hr: %02x min: %02x sec: %02x\n",
 	       year, mon, mday, wday, hour, min, sec);
@@ -360,6 +373,17 @@ int rtc_get (struct rtc_time *tmp)
 /* set clock time from *tmp in DS1306 RTC */
 void rtc_set (struct rtc_time *tmp)
 {
+	/* Assuming Vcc = 2.0V (lowest speed) */
+	if (!slave) {
+		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
+				SPI_MODE_3 | SPI_CS_HIGH);
+		if (!slave)
+			return;
+	}
+
+	if (spi_claim_bus(slave))
+		return;
+
 	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
 	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
 	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
@@ -371,6 +395,8 @@ void rtc_set (struct rtc_time *tmp)
 	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
 	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
 	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
+
+	spi_release_bus(slave);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -378,6 +404,17 @@ void rtc_set (struct rtc_time *tmp)
 /* reset the DS1306 */
 void rtc_reset (void)
 {
+	/* Assuming Vcc = 2.0V (lowest speed) */
+	if (!slave) {
+		slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000,
+				SPI_MODE_3 | SPI_CS_HIGH);
+		if (!slave)
+			return;
+	}
+
+	if (spi_claim_bus(slave))
+		return;
+
 	/* clear the control register */
 	rtc_write (RTC_CONTROL, 0x00);	/* 1st step: reset WP */
 	rtc_write (RTC_CONTROL, 0x00);	/* 2nd step: reset 1Hz, AIE1, AIE0 */
@@ -391,22 +428,18 @@ void rtc_reset (void)
 	rtc_write (RTC_HOURS_ALARM1, 0x00);
 	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
 	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
+
+	spi_release_bus(slave);
 }
 
 /* ------------------------------------------------------------------------- */
 
 static unsigned char rtc_read (unsigned char reg)
 {
-	unsigned char dout[2];	/* SPI Output Data Bytes */
-	unsigned char din[2];	/* SPI Input Data Bytes */
-
-	dout[0] = reg;
+	int ret;
 
-	if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
-		return 0;
-	} else {
-		return din[1];
-	}
+	ret = spi_w8r8(slave, reg);
+	return ret < 0 ? 0 : ret;
 }
 
 /* ------------------------------------------------------------------------- */
@@ -419,7 +452,7 @@ static void rtc_write (unsigned char reg, unsigned char val)
 	dout[0] = 0x80 | reg;
 	dout[1] = val;
 
-	spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
+	spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
 }
 
 #endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
index 35b1b8b..5a1ef4f 100644
--- a/drivers/rtc/mc13783-rtc.c
+++ b/drivers/rtc/mc13783-rtc.c
@@ -24,13 +24,24 @@
 #include <rtc.h>
 #include <spi.h>
 
+static struct spi_slave *slave;
+
 int rtc_get(struct rtc_time *rtc)
 {
 	u32 day1, day2, time;
 	u32 reg;
 	int err, tim, i = 0;
 
-	spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH);
+	if (!slave) {
+		/* FIXME: Verify the max SCK rate */
+		slave = spi_setup_slave(1, 0, 1000000,
+				SPI_MODE_2 | SPI_CS_HIGH);
+		if (!slave)
+			return -1;
+	}
+
+	if (spi_claim_bus(slave))
+		return -1;
 
 	do {
 		reg = 0x2c000000;
@@ -52,6 +63,8 @@ int rtc_get(struct rtc_time *rtc)
 			return err;
 	} while (day1 != day2 && i++ < 3);
 
+	spi_release_bus(slave);
+
 	tim = day1 * 86400 + time;
 	to_tm(tim, rtc);
 
@@ -65,16 +78,29 @@ void rtc_set(struct rtc_time *rtc)
 {
 	u32 time, day, reg;
 
+	if (!slave) {
+		/* FIXME: Verify the max SCK rate */
+		slave = spi_setup_slave(1, 0, 1000000,
+				SPI_MODE_2 | SPI_CS_HIGH);
+		if (!slave)
+			return;
+	}
+
 	time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday,
 		      rtc->tm_hour, rtc->tm_min, rtc->tm_sec);
 	day = time / 86400;
 	time %= 86400;
 
+	if (spi_claim_bus(slave))
+		return;
+
 	reg = 0x2c000000 | day | 0x80000000;
 	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
 
 	reg = 0x28000000 | time | 0x80000000;
 	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+
+	spi_release_bus(slave);
 }
 
 void rtc_reset(void)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 2fe838c..8efc51c 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -37,6 +37,35 @@
 
 #define SPI_TIMEOUT	1000
 
+struct spi_slave {
+	unsigned int cs;
+};
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+		unsigned int max_hz, unsigned int mode)
+{
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	slave = malloc(sizeof(struct spi_slave));
+	if (!slave)
+		return NULL;
+
+	slave->cs = cs;
+
+	/*
+	 * TODO: Some of the code in spi_init() should probably move
+	 * here.
+	 */
+
+	return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	free(slave);
+}
+
 void spi_init(void)
 {
 	volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi;
@@ -53,7 +82,18 @@ void spi_init(void)
 	spi->com = 0;		/* LST bit doesn't do anything, so disregard */
 }
 
-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
+int spi_claim_bus(struct spi_slave *slave)
+{
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+
+}
+
+int spi_xfer(struct spi_slave *slave, int bitlen, uchar *dout, uchar *din,
+		unsigned long flags)
 {
 	volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi;
 	unsigned int tmpdout, tmpdin, event;
@@ -61,11 +101,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 	int tm, isRead = 0;
 	unsigned char charSize = 32;
 
-	debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n",
-	      (int)chipsel, *(uint *) dout, *(uint *) din, bitlen);
+	debug("spi_xfer: chipsel %u dout %08X din %08X bitlen %u\n",
+	      slave->cs, *(uint *) dout, *(uint *) din, bitlen);
 
-	if (chipsel != NULL)
-		(*chipsel) (1);	/* select the target chip */
+	if (flags & SPI_XFER_BEGIN)
+		spi_cs_activate(slave->cs);
 
 	spi->event = 0xffffffff;	/* Clear all SPI events */
 
@@ -135,8 +175,8 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 		debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
 	}
 
-	if (chipsel != NULL)
-		(*chipsel) (0);	/* deselect the target chip */
+	if (flags & SPI_XFER_END)
+		spi_cs_deactivate(cs);
 
 	return 0;
 }
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index b2e3ab9..8279e3e 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -61,17 +61,12 @@ static unsigned long spi_bases[] = {
 	0x53f84000,
 };
 
-static unsigned long spi_base;
-
 #endif
 
-spi_chipsel_type spi_chipsel[] = {
-	(spi_chipsel_type)0,
-	(spi_chipsel_type)1,
-	(spi_chipsel_type)2,
-	(spi_chipsel_type)3,
+struct spi_slave {
+	unsigned long	base;
+	u32		ctrl_reg;
 };
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
 
 static inline u32 reg_read(unsigned long addr)
 {
@@ -83,30 +78,31 @@ static inline void reg_write(unsigned long addr, u32 val)
 	*(volatile unsigned long*)addr = val;
 }
 
-static u32 spi_xchg_single(u32 data, int bitlen)
+static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
 {
 
-	unsigned int cfg_reg = reg_read(spi_base + MXC_CSPICTRL);
+	unsigned int cfg_reg = reg_read(slave->base + MXC_CSPICTRL);
 
 	if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg & MXC_CSPICTRL_BITCOUNT(31))) {
 		cfg_reg = (cfg_reg & ~MXC_CSPICTRL_BITCOUNT(31)) |
 			MXC_CSPICTRL_BITCOUNT(bitlen - 1);
-		reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+		reg_write(slave->base + MXC_CSPICTRL, cfg_reg);
 	}
 
-	reg_write(spi_base + MXC_CSPITXDATA, data);
+	reg_write(slave->base + MXC_CSPITXDATA, data);
 
 	cfg_reg |= MXC_CSPICTRL_XCH;
 
-	reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+	reg_write(slave->base + MXC_CSPICTRL, cfg_reg);
 
-	while (reg_read(spi_base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
+	while (reg_read(slave->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
 		;
 
-	return reg_read(spi_base + MXC_CSPIRXDATA);
+	return reg_read(slave->base + MXC_CSPIRXDATA);
 }
 
-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+		void *din, unsigned long flags)
 {
 	int n_blks = (bitlen + 31) / 32;
 	u32 *out_l, *in_l;
@@ -117,13 +113,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
 		return 1;
 	}
 
-	if (!spi_base)
-		spi_select(CONFIG_MXC_SPI_IFACE, (int)chipsel, SPI_MODE_2 | SPI_CS_HIGH);
-
 	for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout;
 	     i < n_blks;
 	     i++, in_l++, out_l++, bitlen -= 32)
-		*in_l = spi_xchg_single(*out_l, bitlen);
+		*in_l = spi_xchg_single(slave, *out_l, bitlen);
 
 	return 0;
 }
@@ -132,15 +125,15 @@ void spi_init(void)
 {
 }
 
-int spi_select(unsigned int bus, unsigned int dev, unsigned long mode)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+			unsigned int max_hz, unsigned int mode)
 {
 	unsigned int ctrl_reg;
+	struct spi_slave *slave;
 
 	if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
 	    dev > 3)
-		return 1;
-
-	spi_base = spi_bases[bus];
+		return NULL;
 
 	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) |
 		MXC_CSPICTRL_BITCOUNT(31) |
@@ -155,12 +148,34 @@ int spi_select(unsigned int bus, unsigned int dev, unsigned long mode)
 	if (mode & SPI_CS_HIGH)
 		ctrl_reg |= MXC_CSPICTRL_SSPOL;
 
-	reg_write(spi_base + MXC_CSPIRESET, 1);
+	slave = malloc(sizeof(struct spi_slave));
+	if (!slave)
+		return NULL;
+
+	slave->base = spi_bases[bus];
+	slave->ctrl_reg = ctrl_reg;
+
+	return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	reg_write(slave->base + MXC_CSPIRESET, 1);
 	udelay(1);
-	reg_write(spi_base + MXC_CSPICTRL, ctrl_reg);
-	reg_write(spi_base + MXC_CSPIPERIOD,
+	reg_write(slave->base + MXC_CSPICTRL, slave->ctrl_reg);
+	reg_write(slave->base + MXC_CSPIPERIOD,
 		  MXC_CSPIPERIOD_32KHZ);
-	reg_write(spi_base + MXC_CSPIINT, 0);
+	reg_write(slave->base + MXC_CSPIINT, 0);
 
 	return 0;
 }
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	/* TODO: Shut the controller down */
+}
diff --git a/include/spi.h b/include/spi.h
index 3a55a68..b434402 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -31,22 +31,77 @@
 #define	SPI_MODE_1	(0|SPI_CPHA)
 #define	SPI_MODE_2	(SPI_CPOL|0)
 #define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
-#define	SPI_CS_HIGH	0x04			/* chipselect active high? */
+#define	SPI_CS_HIGH	0x04			/* CS active high */
 #define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
 #define	SPI_3WIRE	0x10			/* SI/SO signals shared */
 #define	SPI_LOOP	0x20			/* loopback mode */
 
-/*
- * The function call pointer type used to drive the chip select.
- */
-typedef void (*spi_chipsel_type)(int cs);
+/* SPI transfer flags */
+#define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
+#define SPI_XFER_END	0x02			/* Deassert CS after transfer */
 
+/* Driver-specific SPI slave data */
+struct spi_slave;
 
 /*-----------------------------------------------------------------------
  * Initialization, must be called once on start up.
+ *
+ * TODO: I don't think we really need this.
  */
 void spi_init(void);
 
+/*-----------------------------------------------------------------------
+ * Set up communications parameters for a SPI slave.
+ *
+ * This must be called once for each slave. Note that this function
+ * usually doesn't touch any actual hardware, it only initializes the
+ * contents of spi_slave so that the hardware can be easily
+ * initialized later.
+ *
+ *   bus:     Bus ID of the slave chip.
+ *   cs:      Chip select ID of the slave chip on the specified bus.
+ *   max_hz:  Maximum SCK rate in Hz.
+ *   mode:    Clock polarity, clock phase and other parameters.
+ *
+ * Returns: A spi_slave reference that can be used in subsequent SPI
+ * calls, or NULL if one or more of the parameters are not supported.
+ */
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+		unsigned int max_hz, unsigned int mode);
+
+/*-----------------------------------------------------------------------
+ * Free any memory associated with a SPI slave.
+ *
+ *   slave:	The SPI slave
+ */
+void spi_free_slave(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * Claim the bus and prepare it for communication with a given slave.
+ *
+ * This must be called before doing any transfers with a SPI slave. It
+ * will enable and initialize any SPI hardware as necessary, and make
+ * sure that the SCK line is in the correct idle state. It is not
+ * allowed to claim the same bus for several slaves without releasing
+ * the bus in between.
+ *
+ *   slave:	The SPI slave
+ *
+ * Returns: 0 if the bus was claimed successfully, or a negative value
+ * if it wasn't.
+ */
+int spi_claim_bus(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * Release the SPI bus
+ *
+ * This must be called once for every call to spi_claim_bus() after
+ * all transfers have finished. It may disable any SPI hardware as
+ * appropriate.
+ *
+ *   slave:	The SPI slave
+ */
+void spi_release_bus(struct spi_slave *slave);
 
 /*-----------------------------------------------------------------------
  * SPI transfer
@@ -60,28 +115,66 @@ void spi_init(void);
  * input data overwrites the output data (since both are buffered by
  * temporary variables, this is OK).
  *
- * If the chipsel() function is not NULL, it is called with a parameter
- * of '1' (chip select active) at the start of the transfer and again with
- * a parameter of '0' at the end of the transfer.
- *
- * If the chipsel() function _is_ NULL, it the responsibility of the
- * caller to make the appropriate chip select active before calling
- * spi_xfer() and making it inactive after spi_xfer() returns.
- *
  * spi_xfer() interface:
- *   chipsel: Routine to call to set/clear the chip select:
- *              if chipsel is NULL, it is not used.
- *              if(cs),  make the chip select active (typically '0').
- *              if(!cs), make the chip select inactive (typically '1').
- *   dout:    Pointer to a string of bits to send out.  The bits are
- *              held in a byte array and are sent MSB first.
- *   din:     Pointer to a string of bits that will be filled in.
- *   bitlen:  How many bits to write and read.
+ *   slave:	The SPI slave which will be sending/receiving the data.
+ *   bitlen:	How many bits to write and read.
+ *   dout:	Pointer to a string of bits to send out.  The bits are
+ *		held in a byte array and are sent MSB first.
+ *   din:	Pointer to a string of bits that will be filled in.
+ *   flags:	A bitwise combination of SPI_XFER_* flags.
  *
  *   Returns: 0 on success, not 0 on failure
  */
-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din);
+int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+		void *din, unsigned long flags);
+
+/*-----------------------------------------------------------------------
+ * Determine if a SPI chipselect is valid.
+ * This function is provided by the board if the low-level SPI driver
+ * needs it to determine if a given chipselect is actually valid.
+ *
+ * Returns: 1 if cs identifies a valid chip, 0 otherwise.
+ */
+int  spi_cs_is_valid(unsigned int bus, unsigned int cs);
+
+/*-----------------------------------------------------------------------
+ * Activate a SPI chipselect.
+ * This function is provided by the board code when using a driver
+ * that can't control its chipselects automatically (e.g.
+ * common/soft_spi.c). When called, it should activate the chip select
+ * to the device identified by "cs".
+ */
+void spi_cs_activate(unsigned int cs);
+
+/*-----------------------------------------------------------------------
+ * Deactivate a SPI chipselect.
+ * This function is provided by the board code when using a driver
+ * that can't control its chipselects automatically (e.g.
+ * common/soft_spi.c). When called, it should deactivate the chip
+ * select to the device identified by "cs".
+ */
+void spi_cs_deactivate(unsigned int cs);
+
+/*-----------------------------------------------------------------------
+ * Write 8 bits, then read 8 bits.
+ *   slave:	The SPI slave we're communicating with
+ *   byte:	Byte to be written
+ *
+ * Returns: The value that was read, or a negative value on error.
+ *
+ * TODO: This function probably shouldn't be inlined.
+ */
+static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
+{
+	unsigned char dout[2];
+	unsigned char din[2];
+	int ret;
+
+	dout[0] = byte;
+	dout[1] = 0;
 
-int spi_select(unsigned int bus, unsigned int dev, unsigned long mode);
+	ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
+	return ret < 0 ? ret : din[1];
+}
 
 #endif	/* _SPI_H_ */
-- 
1.5.5.1

[U-Boot-Users] [RFC/PATCH] atmel_spi: Driver for the Atmel SPI controller

[Haavard Skinnemoen]

From: Hans-Christian Egtvedt <hcegtvedt@atmel.com>

This adds a driver for the SPI controller found on most AT91 and AVR32
chips.

Currently, AT91RM9200 seems to have a SPI framework on its own. It
probably makes sense to merge the two drivers and make AT91RM9200 use
the framework everyone else uses at some point...

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
---
 cpu/at32ap/at32ap700x/gpio.c                      |   34 ++++
 drivers/spi/Makefile                              |    1 +
 drivers/spi/atmel_spi.c                           |  194 +++++++++++++++++++++
 drivers/spi/atmel_spi.h                           |   90 ++++++++++
 include/asm-avr32/arch-at32ap700x/chip-features.h |    1 +
 include/asm-avr32/arch-at32ap700x/clk.h           |    6 +
 include/asm-avr32/arch-at32ap700x/gpio.h          |    4 +
 7 files changed, 330 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/atmel_spi.c
 create mode 100644 drivers/spi/atmel_spi.h

diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
index 859124a..68527cb 100644
--- a/cpu/at32ap/at32ap700x/gpio.c
+++ b/cpu/at32ap/at32ap700x/gpio.c
@@ -142,3 +142,37 @@ void gpio_enable_mmci(void)
 	gpio_select_periph_A(GPIO_PIN_PA15, 0);	/* DATA3 */
 }
 #endif
+
+#ifdef AT32AP700x_CHIP_HAS_SPI
+void gpio_enable_spi0(unsigned long cs_mask)
+{
+	gpio_select_periph_A(GPIO_PIN_PA0,  0);	/* MISO	*/
+	gpio_select_periph_A(GPIO_PIN_PA1,  0);	/* MOSI	*/
+	gpio_select_periph_A(GPIO_PIN_PA2,  0);	/* SCK	*/
+
+	if (cs_mask & (1 << 0))
+		gpio_select_periph_A(GPIO_PIN_PA3,  0);	/* NPCS0 */
+	if (cs_mask & (1 << 1))
+		gpio_select_periph_A(GPIO_PIN_PA4,  0);	/* NPCS1 */
+	if (cs_mask & (1 << 2))
+		gpio_select_periph_A(GPIO_PIN_PA5,  0);	/* NPCS2 */
+	if (cs_mask & (1 << 3))
+		gpio_select_periph_B(GPIO_PIN_PA20, 0);	/* NPCS3 */
+}
+
+void gpio_enable_spi1(unsigned long cs_mask)
+{
+	gpio_select_periph_B(GPIO_PIN_PA0,  0);	/* MISO	*/
+	gpio_select_periph_B(GPIO_PIN_PB1,  0);	/* MOSI	*/
+	gpio_select_periph_B(GPIO_PIN_PB5,  0);	/* SCK	*/
+
+	if (cs_mask & (1 << 0))
+		gpio_select_periph_B(GPIO_PIN_PB2,  0);	/* NPCS0 */
+	if (cs_mask & (1 << 1))
+		gpio_select_periph_B(GPIO_PIN_PB3,  0);	/* NPCS1 */
+	if (cs_mask & (1 << 2))
+		gpio_select_periph_B(GPIO_PIN_PB4,  0);	/* NPCS2 */
+	if (cs_mask & (1 << 3))
+		gpio_select_periph_A(GPIO_PIN_PA27, 0);	/* NPCS3 */
+}
+#endif
\ No newline@end of file
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index bc8a104..e66e0ee 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	:= $(obj)libspi.a
 
 COBJS-y += mpc8xxx_spi.o
+COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
 
 COBJS	:= $(COBJS-y)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
new file mode 100644
index 0000000..6700d6b
--- /dev/null
+++ b/drivers/spi/atmel_spi.c
@@ -0,0 +1,194 @@
+/*
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <spi.h>
+#include <malloc.h>
+
+#include <asm/io.h>
+
+#include <asm/arch/clk.h>
+#include <asm/arch/memory-map.h>
+
+#include "atmel_spi.h"
+
+void spi_init()
+{
+
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+			unsigned int max_hz, unsigned int mode)
+{
+	struct spi_slave	*slave;
+	unsigned int		scbr;
+	u32			csrx;
+	void			*regs;
+
+	if (cs > 3 || !spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	switch (bus) {
+	case 0:
+		regs = (void *)SPI0_BASE;
+		break;
+#ifdef SPI1_BASE
+	case 1:
+		regs = (void *)SPI1_BASE;
+		break;
+#endif
+#ifdef SPI2_BASE
+	case 2:
+		regs = (void *)SPI2_BASE;
+		break;
+#endif
+#ifdef SPI3_BASE
+	case 3:
+		regs = (void *)SPI3_BASE;
+		break;
+#endif
+	default:
+		return NULL;
+	}
+
+
+	scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
+	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
+		/* Too low max SCK rate */
+		return NULL;
+	if (scbr < 1)
+		scbr = 1;
+
+	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
+	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
+	if (!(mode & SPI_CPHA))
+		csrx |= ATMEL_SPI_CSRx_NCPHA;
+	if (mode & SPI_CPOL)
+		csrx |= ATMEL_SPI_CSRx_CPOL;
+
+	slave = malloc(sizeof(struct spi_slave));
+	if (!slave)
+		return NULL;
+
+	slave->regs = regs;
+	slave->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
+			| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
+	spi_writel(slave, CSR(cs), csrx);
+
+	return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	/* Enable the SPI hardware */
+	spi_writel(slave, CR, ATMEL_SPI_CR_SPIEN);
+
+	/*
+	 * Select the slave. This should set SCK to the correct
+	 * initial state, etc.
+	 */
+	spi_writel(slave, MR, slave->mr);
+
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	/* Disable the SPI hardware */
+	spi_writel(slave, CR, ATMEL_SPI_CR_SPIDIS);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
+{
+	unsigned int	len_tx;
+	unsigned int	len_rx;
+	unsigned int	len;
+	u32		status;
+	const u8	*txp = dout;
+	u8		*rxp = din;
+	u8		value;
+
+	if (bitlen == 0)
+		return 0;
+
+	/*
+	 * TODO: The controller can do non-multiple-of-8 bit
+	 * transfers, but this driver currently doesn't support it.
+	 *
+	 * It's also not clear how such transfers are supposed to be
+	 * represented as a stream of bytes...this is a limitation of
+	 * the current SPI interface.
+	 */
+	if (bitlen % 8)
+		return -1;
+
+	len = bitlen / 8;
+
+	/*
+	 * The controller can do automatic CS control, but it is
+	 * somewhat quirky, and it doesn't really buy us much anyway
+	 * in the context of U-Boot.
+	 */
+	if (flags & SPI_XFER_BEGIN)
+		spi_cs_activate(slave->cs);
+
+	for (len_tx = 0, len_rx = 0; len_rx < len; ) {
+		status = spi_readl(slave, SR);
+
+		if (status & ATMEL_SPI_SR_OVRES)
+			return -1;
+
+		if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) {
+			if (txp)
+				value = *txp++;
+			else
+				value = 0;
+			spi_writel(slave, TDR, value);
+			len_tx++;
+		}
+		if (status & ATMEL_SPI_SR_RDRF) {
+			value = spi_readl(slave, RDR);
+			if (rxp)
+				*rxp++ = value;
+			len_rx++;
+		}
+	}
+
+	if (flags & SPI_XFER_END) {
+		/*
+		 * Wait until the transfer is completely done before
+		 * we deactivate CS.
+		 */
+		do {
+			status = spi_readl(slave, SR);
+		} while (!(status & ATMEL_SPI_SR_TXEMPTY));
+
+		spi_cs_deactivate(slave->cs);
+	}
+
+	return 0;
+}
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
new file mode 100644
index 0000000..af1853a
--- /dev/null
+++ b/drivers/spi/atmel_spi.h
@@ -0,0 +1,90 @@
+/*
+ * Register definitions for the Atmel AT32/AT91 SPI Controller
+ */
+
+/* Register offsets */
+#define ATMEL_SPI_CR			0x0000
+#define ATMEL_SPI_MR			0x0004
+#define ATMEL_SPI_RDR			0x0008
+#define ATMEL_SPI_TDR			0x000c
+#define ATMEL_SPI_SR			0x0010
+#define ATMEL_SPI_IER			0x0014
+#define ATMEL_SPI_IDR			0x0018
+#define ATMEL_SPI_IMR			0x001c
+#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
+#define ATMEL_SPI_VERSION		0x00fc
+
+/* Bits in CR */
+#define ATMEL_SPI_CR_SPIEN		(1 << 0)
+#define ATMEL_SPI_CR_SPIDIS		(1 << 1)
+#define ATMEL_SPI_CR_SWRST		(1 << 7)
+#define ATMEL_SPI_CR_LASTXFER		(1 << 24)
+
+/* Bits in MR */
+#define ATMEL_SPI_MR_MSTR		(1 << 0)
+#define ATMEL_SPI_MR_PS			(1 << 1)
+#define ATMEL_SPI_MR_PCSDEC		(1 << 2)
+#define ATMEL_SPI_MR_FDIV		(1 << 3)
+#define ATMEL_SPI_MR_MODFDIS		(1 << 4)
+#define ATMEL_SPI_MR_LLB		(1 << 7)
+#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
+#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
+
+/* Bits in RDR */
+#define ATMEL_SPI_RDR_RD(x)		(x)
+#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
+
+/* Bits in TDR */
+#define ATMEL_SPI_TDR_TD(x)		(x)
+#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
+#define ATMEL_SPI_TDR_LASTXFER		(1 << 24)
+
+/* Bits in SR/IER/IDR/IMR */
+#define ATMEL_SPI_SR_RDRF		(1 << 0)
+#define ATMEL_SPI_SR_TDRE		(1 << 1)
+#define ATMEL_SPI_SR_MODF		(1 << 2)
+#define ATMEL_SPI_SR_OVRES		(1 << 3)
+#define ATMEL_SPI_SR_ENDRX		(1 << 4)
+#define ATMEL_SPI_SR_ENDTX		(1 << 5)
+#define ATMEL_SPI_SR_RXBUFF		(1 << 6)
+#define ATMEL_SPI_SR_TXBUFE		(1 << 7)
+#define ATMEL_SPI_SR_NSSR		(1 << 8)
+#define ATMEL_SPI_SR_TXEMPTY		(1 << 9)
+#define ATMEL_SPI_SR_SPIENS		(1 << 16)
+
+/* Bits in CSRx */
+#define ATMEL_SPI_CSRx_CPOL		(1 << 0)
+#define ATMEL_SPI_CSRx_NCPHA		(1 << 1)
+#define ATMEL_SPI_CSRx_CSAAT		(1 << 3)
+#define ATMEL_SPI_CSRx_BITS(x)		((x) << 4)
+#define ATMEL_SPI_CSRx_SCBR(x)		((x) << 8)
+#define ATMEL_SPI_CSRx_SCBR_MAX		0xff
+#define ATMEL_SPI_CSRx_DLYBS(x)		((x) << 16)
+#define ATMEL_SPI_CSRx_DLYBCT(x)	((x) << 24)
+
+/* Bits in VERSION */
+#define ATMEL_SPI_VERSION_REV(x)	((x) << 0)
+#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
+
+/* Constants for CSRx:BITS */
+#define ATMEL_SPI_BITS_8		0
+#define ATMEL_SPI_BITS_9		1
+#define ATMEL_SPI_BITS_10		2
+#define ATMEL_SPI_BITS_11		3
+#define ATMEL_SPI_BITS_12		4
+#define ATMEL_SPI_BITS_13		5
+#define ATMEL_SPI_BITS_14		6
+#define ATMEL_SPI_BITS_15		7
+#define ATMEL_SPI_BITS_16		8
+
+struct spi_slave {
+	void		*regs;
+	unsigned int	cs;
+	u32		mr;
+};
+
+/* Register access macros */
+#define spi_readl(slave, reg)					\
+	readl(slave->regs + ATMEL_SPI_##reg)
+#define spi_writel(slave, reg, value)				\
+	writel(value, slave->regs + ATMEL_SPI_##reg)
diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/include/asm-avr32/arch-at32ap700x/chip-features.h
index 29b1fd6..c47107e 100644
--- a/include/asm-avr32/arch-at32ap700x/chip-features.h
+++ b/include/asm-avr32/arch-at32ap700x/chip-features.h
@@ -25,6 +25,7 @@
 /* Currently, all the AP700x chips have these */
 #define AT32AP700x_CHIP_HAS_USART
 #define AT32AP700x_CHIP_HAS_MMCI
+#define AT32AP700x_CHIP_HAS_SPI
 
 /* Only AP7000 has ethernet interface */
 #ifdef CONFIG_AT32AP7000
diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h
index 385319a..bd6f2e5 100644
--- a/include/asm-avr32/arch-at32ap700x/clk.h
+++ b/include/asm-avr32/arch-at32ap700x/clk.h
@@ -74,6 +74,12 @@ static inline unsigned long get_mci_clk_rate(void)
 	return get_pbb_clk_rate();
 }
 #endif
+#ifdef AT32AP700x_CHIP_HAS_SPI
+static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
+{
+	return get_pba_clk_rate();
+}
+#endif
 
 /* Board code may need the SDRAM base clock as a compile-time constant */
 #define SDRAMC_BUS_HZ	(MAIN_CLK_RATE >> CFG_CLKDIV_HSB)
diff --git a/include/asm-avr32/arch-at32ap700x/gpio.h b/include/asm-avr32/arch-at32ap700x/gpio.h
index b10a3e4..ef20cea 100644
--- a/include/asm-avr32/arch-at32ap700x/gpio.h
+++ b/include/asm-avr32/arch-at32ap700x/gpio.h
@@ -216,5 +216,9 @@ void gpio_enable_macb1(void);
 #ifdef AT32AP700x_CHIP_HAS_MMCI
 void gpio_enable_mmci(void);
 #endif
+#ifdef AT32AP700x_CHIP_HAS_SPI
+void gpio_enable_spi0(unsigned long cs_mask);
+void gpio_enable_spi1(unsigned long cs_mask);
+#endif
 
 #endif /* __ASM_AVR32_ARCH_GPIO_H__ */
-- 
1.5.5.1

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Mike Frysinger]

On Friday 09 May 2008, Haavard Skinnemoen wrote:
> This patch hasn't been tested on all the boards involved, so there are
> probably a few issues. For now, I'd like some comments on the new
> interface -- if it looks good, we should spend some additional effort
> to validate that it doesn't introduce any breakage. I could use some
> help with this.

just a quick glance, but do we care about U-Boot being a SPI slave ?  i only 
noticed this as i was working on the Blackfin I2C driver recently and 
realized that the I2C framework has defines for U-Boot to act as a slave.  
not that the Blackfin driver even has any of the slave stuff implemented, i 
just noticed it ;).
-mike
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[U-Boot-Users] [RFC/PATCH] SPI API improvements

[HŒaavard Skinnemoen]

Mike Frysinger wrote:
> On Friday 09 May 2008, Haavard Skinnemoen wrote:
>> This patch hasn't been tested on all the boards involved, so there are
>> probably a few issues. For now, I'd like some comments on the new
>> interface -- if it looks good, we should spend some additional effort
>> to validate that it doesn't introduce any breakage. I could use some
>> help with this.
> 
> just a quick glance, but do we care about U-Boot being a SPI slave ?  i only 
> noticed this as i was working on the Blackfin I2C driver recently and 
> realized that the I2C framework has defines for U-Boot to act as a slave.  
> not that the Blackfin driver even has any of the slave stuff implemented, i 
> just noticed it ;).

I can't see much reason to add support for U-Boot acting as a SPI slave, 
and these patches certainly doesn't attempt to make that happen. If 
you're thinking of the new "struct spi_slave", that's a reference to the 
SPI slave we're talking to, i.e. whatever sits at the other end of the 
SPI bus.

If someone else wants support for slave-mode SPI, maybe we should add 
it, but that should be an entirely separate set of patches.

Haavard

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Mike Frysinger]

On Sunday 11 May 2008, H?aavard Skinnemoen wrote:
> Mike Frysinger wrote:
> > On Friday 09 May 2008, Haavard Skinnemoen wrote:
> >> This patch hasn't been tested on all the boards involved, so there are
> >> probably a few issues. For now, I'd like some comments on the new
> >> interface -- if it looks good, we should spend some additional effort
> >> to validate that it doesn't introduce any breakage. I could use some
> >> help with this.
> >
> > just a quick glance, but do we care about U-Boot being a SPI slave ?  i
> > only noticed this as i was working on the Blackfin I2C driver recently
> > and realized that the I2C framework has defines for U-Boot to act as a
> > slave. not that the Blackfin driver even has any of the slave stuff
> > implemented, i just noticed it ;).
>
> I can't see much reason to add support for U-Boot acting as a SPI slave,
> and these patches certainly doesn't attempt to make that happen. If
> you're thinking of the new "struct spi_slave", that's a reference to the
> SPI slave we're talking to, i.e. whatever sits at the other end of the
> SPI bus.
>
> If someone else wants support for slave-mode SPI, maybe we should add
> it, but that should be an entirely separate set of patches.

sure sure ... i agree with you completely.  just floating the idea in case 
anyone else actually cared about it.  i certainly dont :).
-mike
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[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Guennadi Liakhovetski]

Hi Haavard,

On Fri, 9 May 2008, Haavard Skinnemoen wrote:

> diff --git a/common/cmd_spi.c b/common/cmd_spi.c
> index 7604422..b0e7db1 100644
> --- a/common/cmd_spi.c
> +++ b/common/cmd_spi.c
> @@ -38,19 +38,13 @@
>  #endif
>  
>  /*
> - * External table of chip select functions (see the appropriate board
> - * support for the actual definition of the table).
> - */
> -extern spi_chipsel_type spi_chipsel[];
> -extern int spi_chipsel_cnt;
> -
> -/*
>   * Values from last command.
>   */
>  static int   device;
>  static int   bitlen;
>  static uchar dout[MAX_SPI_BYTES];
>  static uchar din[MAX_SPI_BYTES];
> +static struct spi_slave *slave;

Don't think this is needed...

>  
>  /*
>   * SPI read/write
> @@ -65,6 +59,7 @@ static uchar din[MAX_SPI_BYTES];
>  
>  int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
>  {
> +	struct spi_slave *slave;

...because it is only ever used in this function and is shadowed by this 
local variable.

> @@ -101,19 +96,22 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
>  		}
>  	}
>  
> -	if ((device < 0) || (device >=  spi_chipsel_cnt)) {
> -		printf("Invalid device %d, giving up.\n", device);
> -		return 1;
> -	}
>  	if ((bitlen < 0) || (bitlen >  (MAX_SPI_BYTES * 8))) {
>  		printf("Invalid bitlen %d, giving up.\n", bitlen);
>  		return 1;
>  	}
>  
> -	debug ("spi_chipsel[%d] = %08X\n",
> -		device, (uint)spi_chipsel[device]);
> +	/* FIXME: Make these parameters configurable */
> +	slave = spi_setup_slave(0, device, 1000000, SPI_MODE_0);

Until it is configurable (I think, you mean at runtime), please use the 
CONFIG_MXC_SPI_IFACE macro, otherwise it will be useless on mx31ads.

> diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
> index 35b1b8b..5a1ef4f 100644
> --- a/drivers/rtc/mc13783-rtc.c
> +++ b/drivers/rtc/mc13783-rtc.c
> @@ -24,13 +24,24 @@
>  #include <rtc.h>
>  #include <spi.h>
>  
> +static struct spi_slave *slave;
> +

In do_spi() you use a local variable, allocate a slave, claim the bus, 
xfer data, release the bus and free the slave on each call, which is also 
nice. Whereas, for example, in this driver you use a static variable, 
allocate a slave for it once, and, naturally, never free it. This is at 
least inconsistent, IMHO.

> @@ -65,16 +78,29 @@ void rtc_set(struct rtc_time *rtc)
>  {
>  	u32 time, day, reg;
>  
> +	if (!slave) {
> +		/* FIXME: Verify the max SCK rate */
> +		slave = spi_setup_slave(1, 0, 1000000,
> +				SPI_MODE_2 | SPI_CS_HIGH);
> +		if (!slave)
> +			return;
> +	}
> +
>  	time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday,
>  		      rtc->tm_hour, rtc->tm_min, rtc->tm_sec);
>  	day = time / 86400;
>  	time %= 86400;
>  
> +	if (spi_claim_bus(slave))
> +		return;
> +
>  	reg = 0x2c000000 | day | 0x80000000;
>  	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);

You changed spi_xfer()'s prototype, but didn't change all calls.

> diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
> index b2e3ab9..8279e3e 100644
> --- a/drivers/spi/mxc_spi.c
> +++ b/drivers/spi/mxc_spi.c

[skip]

> @@ -132,15 +125,15 @@ void spi_init(void)
>  {
>  }
>  
> -int spi_select(unsigned int bus, unsigned int dev, unsigned long mode)
> +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> +			unsigned int max_hz, unsigned int mode)

You changed the parameter name from dev to cs

>  {
>  	unsigned int ctrl_reg;
> +	struct spi_slave *slave;
>  
>  	if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
>  	    dev > 3)

but you didn't change it here

> -		return 1;
> -
> -	spi_base = spi_bases[bus];
> +		return NULL;
>  
>  	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) |
>  		MXC_CSPICTRL_BITCOUNT(31) |

and here.

> diff --git a/include/spi.h b/include/spi.h
> index 3a55a68..b434402 100644
> --- a/include/spi.h
> +++ b/include/spi.h
> @@ -31,22 +31,77 @@
>  #define	SPI_MODE_1	(0|SPI_CPHA)
>  #define	SPI_MODE_2	(SPI_CPOL|0)
>  #define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
> -#define	SPI_CS_HIGH	0x04			/* chipselect active high? */
> +#define	SPI_CS_HIGH	0x04			/* CS active high */
>  #define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
>  #define	SPI_3WIRE	0x10			/* SI/SO signals shared */
>  #define	SPI_LOOP	0x20			/* loopback mode */
>  
> -/*
> - * The function call pointer type used to drive the chip select.
> - */
> -typedef void (*spi_chipsel_type)(int cs);
> +/* SPI transfer flags */
> +#define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
> +#define SPI_XFER_END	0x02			/* Deassert CS after transfer */
>  
> +/* Driver-specific SPI slave data */
> +struct spi_slave;

Well, I am a bit upset you decided to make struct spi_slave 
hardware-specific. I hoped it would be standard, and contain a void * to 
hardware-specific part. Or, better yet, be embeddable in hardware-specific 
object, so drivers then would use container_of to get to their data and 
wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
system, so, let's see what others say.

After all above are fixed, and I can at least compile it again:-), I'll 
test it on hardware.

I only reviewed the parts I'd written or changed myself.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Haavard Skinnemoen]

On Tue, 13 May 2008 13:20:22 +0200 (CEST)
Guennadi Liakhovetski <lg@denx.de> wrote:

> >  static int   device;
> >  static int   bitlen;
> >  static uchar dout[MAX_SPI_BYTES];
> >  static uchar din[MAX_SPI_BYTES];
> > +static struct spi_slave *slave;
> 
> Don't think this is needed...

Right.

> > +	/* FIXME: Make these parameters configurable */
> > +	slave = spi_setup_slave(0, device, 1000000, SPI_MODE_0);
> 
> Until it is configurable (I think, you mean at runtime), please use the 
> CONFIG_MXC_SPI_IFACE macro, otherwise it will be useless on mx31ads.

Do you really think platform-specific macros are appropriate here?

But yeah, I did mean at runtime. If we're going to support multiple
busses, we need to expose that at the user interface level too.

> > diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
> > index 35b1b8b..5a1ef4f 100644
> > --- a/drivers/rtc/mc13783-rtc.c
> > +++ b/drivers/rtc/mc13783-rtc.c
> > @@ -24,13 +24,24 @@
> >  #include <rtc.h>
> >  #include <spi.h>
> >  
> > +static struct spi_slave *slave;
> > +
> 
> In do_spi() you use a local variable, allocate a slave, claim the bus, 
> xfer data, release the bus and free the slave on each call, which is also 
> nice. Whereas, for example, in this driver you use a static variable, 
> allocate a slave for it once, and, naturally, never free it. This is at 
> least inconsistent, IMHO.

I don't think it's inconsistent...they're very different users. While
this RTC driver will normally only ever see one slave, do_spi() needs
to be able to communicate with whatever device the user tells it to,
which may be different from one call to the next.

What I would really like here is a rtc_init() call which sets up the
slave parameters once and for all. In the mean time, we'll have to
either do the initialization on demand and keep it around, or do the
initialization every time and take it down afterwards. I don't really
have strong feelings one way or another, but I don't think consistency
with the "spi" command is a very useful goal.

> >  	reg = 0x2c000000 | day | 0x80000000;
> >  	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
> 
> You changed spi_xfer()'s prototype, but didn't change all calls.

Right, I'll fix it.

> > @@ -132,15 +125,15 @@ void spi_init(void)
> >  {
> >  }
> >  
> > -int spi_select(unsigned int bus, unsigned int dev, unsigned long mode)
> > +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> > +			unsigned int max_hz, unsigned int mode)
> 
> You changed the parameter name from dev to cs
> 
> >  {
> >  	unsigned int ctrl_reg;
> > +	struct spi_slave *slave;
> >  
> >  	if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
> >  	    dev > 3)
> 
> but you didn't change it here
> 
> > -		return 1;
> > -
> > -	spi_base = spi_bases[bus];
> > +		return NULL;
> >  
> >  	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) |
> >  		MXC_CSPICTRL_BITCOUNT(31) |
> 
> and here.

Fixed.

> > -/*
> > - * The function call pointer type used to drive the chip select.
> > - */
> > -typedef void (*spi_chipsel_type)(int cs);
> > +/* SPI transfer flags */
> > +#define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
> > +#define SPI_XFER_END	0x02			/* Deassert CS after transfer */
> >  
> > +/* Driver-specific SPI slave data */
> > +struct spi_slave;
> 
> Well, I am a bit upset you decided to make struct spi_slave 
> hardware-specific. I hoped it would be standard, and contain a void * to 
> hardware-specific part. Or, better yet, be embeddable in hardware-specific 
> object, so drivers then would use container_of to get to their data and 
> wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
> system, so, let's see what others say.

Instead of being upset, could you tell me what kind of information such
a hardware-independent spi_slave struct should have, and why it might be
useful outside the controller driver?

While I'm not fanatical about keeping the spi_slave layout hidden from
its users, I do think this offers some potential optimizations in the
controller driver (i.e. instead of storing a bus number, you can store
a direct pointer to its register space.) I'm very concerned about
keeping this as lightweight as possible, so unless defining a common
spi_slave layout offers any actual advantages, I'd rather leave all of
it up to the controller driver.

> After all above are fixed, and I can at least compile it again:-), I'll 
> test it on hardware.

With the below patch, it compiles on imx31_litekit at least.

Sorry about pushing this untested code on everyone, but I wanted to get
it out early so I could get some feedback on the interface. I did
_attempt_ to get it right so that you could see how it all fits
together, but I did expect some breakage.

I'll do some more thorough testing during the next couple of days, but
I'd like to know whether or not you all think this whole thing looks
reasonable, given that the breakage gets sorted out.

Now, I guess I should start compile-testing powerpc...that's a bit
problematic since practically no configurations build out of the box,
and nobody seems to want the absolutely trivial fix I posted half a
year ago...

> I only reviewed the parts I'd written or changed myself.

Thanks for the feedback.

Haavard

diff --git a/common/cmd_spi.c b/common/cmd_spi.c
index b0e7db1..15b2811 100644
--- a/common/cmd_spi.c
+++ b/common/cmd_spi.c
@@ -44,7 +44,6 @@ static int   device;
 static int   bitlen;
 static uchar dout[MAX_SPI_BYTES];
 static uchar din[MAX_SPI_BYTES];
-static struct spi_slave *slave;
 
 /*
  * SPI read/write
@@ -111,7 +110,8 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	debug ("spi chipsel = %08X\n", device);
 
 	spi_claim_bus(slave);
-	if(spi_xfer(device, bitlen, dout, din) != 0) {
+	if(spi_xfer(slave, bitlen, dout, din,
+				SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
 		printf("Error with the SPI transaction.\n");
 		rcode = 1;
 	} else {
diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
index 5a1ef4f..b6e1501 100644
--- a/drivers/rtc/mc13783-rtc.c
+++ b/drivers/rtc/mc13783-rtc.c
@@ -45,19 +45,22 @@ int rtc_get(struct rtc_time *rtc)
 
 	do {
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
 
 		reg = 0x28000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
 
 		reg = 0x2c000000;
-		err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
+		err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
+				SPI_XFER_BEGIN | SPI_XFER_END);
 
 		if (err)
 			return err;
@@ -95,10 +98,12 @@ void rtc_set(struct rtc_time *rtc)
 		return;
 
 	reg = 0x2c000000 | day | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
+			SPI_XFER_BEGIN | SPI_XFER_END);
 
 	reg = 0x28000000 | time | 0x80000000;
-	spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
+	spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
+			SPI_XFER_BEGIN | SPI_XFER_END);
 
 	spi_release_bus(slave);
 }
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 8279e3e..435d64a 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -19,6 +19,7 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
 
@@ -132,10 +133,10 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	struct spi_slave *slave;
 
 	if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
-	    dev > 3)
+	    cs > 3)
 		return NULL;
 
-	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) |
+	ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
 		MXC_CSPICTRL_BITCOUNT(31) |
 		MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */
 		MXC_CSPICTRL_EN |

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Guennadi Liakhovetski]

On Tue, 13 May 2008, Haavard Skinnemoen wrote:

> On Tue, 13 May 2008 13:20:22 +0200 (CEST)
> Guennadi Liakhovetski <lg@denx.de> wrote:
> 
> > > +	/* FIXME: Make these parameters configurable */
> > > +	slave = spi_setup_slave(0, device, 1000000, SPI_MODE_0);
> > 
> > Until it is configurable (I think, you mean at runtime), please use the 
> > CONFIG_MXC_SPI_IFACE macro, otherwise it will be useless on mx31ads.
> 
> Do you really think platform-specific macros are appropriate here?
> 
> But yeah, I did mean at runtime. If we're going to support multiple
> busses, we need to expose that at the user interface level too.

Appropriate or not from the esthetic PoV, I don't see another chance to 
make it useful - either make it run-time configurable either via command 
parameters, or environment varables, ot at least compile-time, so 
platforms could specify something meaningful there. BTW, same holds for 
the flags. So, I'd do

#ifndef CONFIG_MXC_SPI_IFACE
#define CONFIG_MXC_SPI_IFACE 0
#endif
#ifndef CONFIG_MXC_SPI_MODE
#define CONFIG_MXC_SPI_MODE SPI_MODE_0
#endif

	slave = spi_setup_slave(CONFIG_MXC_SPI_IFACE, device, 1000000, CONFIG_MXC_SPI_MODE);

Without these sspi is useless on mx31ads.

> > > diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
> > > index 35b1b8b..5a1ef4f 100644
> > > --- a/drivers/rtc/mc13783-rtc.c
> > > +++ b/drivers/rtc/mc13783-rtc.c
> > > @@ -24,13 +24,24 @@
> > >  #include <rtc.h>
> > >  #include <spi.h>
> > >  
> > > +static struct spi_slave *slave;
> > > +
> > 
> > In do_spi() you use a local variable, allocate a slave, claim the bus, 
> > xfer data, release the bus and free the slave on each call, which is also 
> > nice. Whereas, for example, in this driver you use a static variable, 
> > allocate a slave for it once, and, naturally, never free it. This is at 
> > least inconsistent, IMHO.
> 
> I don't think it's inconsistent...they're very different users. While
> this RTC driver will normally only ever see one slave, do_spi() needs
> to be able to communicate with whatever device the user tells it to,
> which may be different from one call to the next.

Ok, sorry, you're right.

> > > -/*
> > > - * The function call pointer type used to drive the chip select.
> > > - */
> > > -typedef void (*spi_chipsel_type)(int cs);
> > > +/* SPI transfer flags */
> > > +#define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
> > > +#define SPI_XFER_END	0x02			/* Deassert CS after transfer */
> > >  
> > > +/* Driver-specific SPI slave data */
> > > +struct spi_slave;
> > 
> > Well, I am a bit upset you decided to make struct spi_slave 
> > hardware-specific. I hoped it would be standard, and contain a void * to 
> > hardware-specific part. Or, better yet, be embeddable in hardware-specific 
> > object, so drivers then would use container_of to get to their data and 
> > wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
> > system, so, let's see what others say.
> 
> Instead of being upset, could you tell me what kind of information such
> a hardware-independent spi_slave struct should have, and why it might be
> useful outside the controller driver?

Well, I just don't like different things being called with the same 
name:-)

> > After all above are fixed, and I can at least compile it again:-), I'll 
> > test it on hardware.
> 
> With the below patch, it compiles on imx31_litekit at least.

and it works too - rtc works, sspi works with above modifications and 
setting

#define CONFIG_MXC_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)	/* Default SPI mode */

in mx31ads.h

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de

[U-Boot-Users] [RFC/PATCH] SPI API improvements

[Haavard Skinnemoen]

On Tue, 13 May 2008 17:06:35 +0200 (CEST)
Guennadi Liakhovetski <lg@denx.de> wrote:

> Appropriate or not from the esthetic PoV, I don't see another chance to 
> make it useful - either make it run-time configurable either via command 
> parameters, or environment varables, ot at least compile-time, so 
> platforms could specify something meaningful there. BTW, same holds for 
> the flags. So, I'd do
> 
> #ifndef CONFIG_MXC_SPI_IFACE
> #define CONFIG_MXC_SPI_IFACE 0
> #endif
> #ifndef CONFIG_MXC_SPI_MODE
> #define CONFIG_MXC_SPI_MODE SPI_MODE_0
> #endif
> 
> 	slave = spi_setup_slave(CONFIG_MXC_SPI_IFACE, device, 1000000, CONFIG_MXC_SPI_MODE);
> 
> Without these sspi is useless on mx31ads.

Ok, so how about we introduce

	CONFIG_DEFAULT_SPI_IFACE
	CONFIG_DEFAULT_SPI_MODE

so that other platforms can do the same thing too?

As for run-time configurability...here's one suggestion:
  * Allow optional prefix "<bus>:" before the chip select number. Use
    board-specific default if not specified
  * Add optional parameter specifying the mode at the end. This can be
    parsed as a 32-bit hexadecimal number so you can specify pretty much
    anything, but normally you'd just specify 0, 1, 2 or 3, indicating
    one of the standard SPI modes.

Or perhaps we should use environment variables instead...?

> > > Well, I am a bit upset you decided to make struct spi_slave 
> > > hardware-specific. I hoped it would be standard, and contain a void * to 
> > > hardware-specific part. Or, better yet, be embeddable in hardware-specific 
> > > object, so drivers then would use container_of to get to their data and 
> > > wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
> > > system, so, let's see what others say.
> > 
> > Instead of being upset, could you tell me what kind of information such
> > a hardware-independent spi_slave struct should have, and why it might be
> > useful outside the controller driver?
> 
> Well, I just don't like different things being called with the same 
> name:-)

We already have things like spi_xfer() which is implemented differently
depending on the SPI driver being used.

However, I think we might want a common spi_slave struct for a
different reason as well: so that we can pass it to the board hooks --
spi_activate_cs(), spi_deactivate_cs() and spi_cs_is_valid(). We
probably need to add a "bus" parameter to the former two anyway, and by
passing them a struct, we can easily add new parameters later without
having to change prototypes all over the tree...

So I guess I'm in favour of your second suggestion -- define a common
struct spi_slave which can be embedded into a controller-specific
struct.

> > > After all above are fixed, and I can at least compile it again:-), I'll 
> > > test it on hardware.
> > 
> > With the below patch, it compiles on imx31_litekit at least.
> 
> and it works too - rtc works, sspi works with above modifications and 
> setting
> 
> #define CONFIG_MXC_SPI_MODE	(SPI_MODE_2 | SPI_CS_HIGH)	/* Default SPI mode */

Great. I have a few other fixes that I had to make in order for other
boards to compile. I've also been doing some testing with DataFlash,
and it seems to work fine on my hardware too, at least so far...

Haavard