* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Simon Glass @ 2011-10-31 22:51 UTC (permalink / raw)
To: u-boot
In-Reply-To: <201110311837.33466.vapier@gentoo.org>
Hi Mike,
On Mon, Oct 31, 2011 at 3:37 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Monday 31 October 2011 17:49:58 Simon Glass wrote:
>> On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 wrote:
>> > On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
>> >> -static void print_num(const char *, ulong);
>> >> +__maybe_unused
>> >> +static void print_num(const char *name, ulong value)
>> >> +{
>> >> + ? ? ? printf("%-12s= 0x%08lX\n", name, value);
>> >> +}
>> >
>> > Will the linker remove the functions from the binary if they are unusued?
>>
>> If built with -ffunction-sections and --gc-sections,, then the linker
>> can do this sort of thing. Otherwise it can't, but the compiler can. I
>> just tested Mike's code on my ARM compiler to make sure and it happily
>> removed print_eth() when it was not used.
>
> i don't think you need function-sections to make this happen. ?since it is
> marked "static", gcc should do DCE on it. ?the __maybe_unused markings is just
> to kill off any warnings about the func not being used (which might occur in
> the #ifdef jungle below). ?that attribute does not tell gcc to retain the
> function even if it isn't referenced in this file (as far as gcc can tell).
> -mike
>
That's right, you don't need function-sections for the compiler to
eliminate the code - my point was that the linker can't do this sort
of thing...luckily it doesn't need to.
There might be an option to control this, a bit like
-fkeep-static-consts, but I can't see it. Can't see it being very
useful anyway.
Regards,
Simon
^ permalink raw reply
* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Mike Frysinger @ 2011-10-31 22:37 UTC (permalink / raw)
To: u-boot
In-Reply-To: <CAPnjgZ3zVxHyixC670Nfrh=r0dXgju=5goz-rLb7WncNTdXjOw@mail.gmail.com>
On Monday 31 October 2011 17:49:58 Simon Glass wrote:
> On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 wrote:
> > On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
> >> -static void print_num(const char *, ulong);
> >> +__maybe_unused
> >> +static void print_num(const char *name, ulong value)
> >> +{
> >> + printf("%-12s= 0x%08lX\n", name, value);
> >> +}
> >
> > Will the linker remove the functions from the binary if they are unusued?
>
> If built with -ffunction-sections and --gc-sections,, then the linker
> can do this sort of thing. Otherwise it can't, but the compiler can. I
> just tested Mike's code on my ARM compiler to make sure and it happily
> removed print_eth() when it was not used.
i don't think you need function-sections to make this happen. since it is
marked "static", gcc should do DCE on it. the __maybe_unused markings is just
to kill off any warnings about the func not being used (which might occur in
the #ifdef jungle below). that attribute does not tell gcc to retain the
function even if it isn't referenced in this file (as far as gcc can tell).
-mike
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^ permalink raw reply
* [U-Boot] [PATCH v5 05/11] arm, davinci: add support for new spl framework
From: Tom Rini @ 2011-10-31 22:34 UTC (permalink / raw)
To: u-boot
In-Reply-To: <4EAF1CA7.5010403@freescale.com>
On Mon, Oct 31, 2011 at 3:09 PM, Scott Wood <scottwood@freescale.com> wrote:
> On 10/30/2011 11:53 PM, Heiko Schocher wrote:
>> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
>> new file mode 100644
>> index 0000000..efc0521
>> --- /dev/null
>> +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
>> @@ -0,0 +1,57 @@
>> +/*
>> + * Copyright (C) 2011
>> + * Heiko Schocher, DENX Software Engineering, hs at denx.de.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include <common.h>
>> +#include <nand.h>
>> +#include <asm/io.h>
>
> Does this file use anything from asm/io.h?
>
>> +/*
>> + * The main entry for NAND booting. It's necessary that SDRAM is already
>> + * configured and available since this code loads the main U-Boot image
>> + * from NAND into SDRAM and starts it from there.
>> + */
>> +void nand_boot(void)
>> +{
>> + ? ? int ret;
>> + ? ? __attribute__((noreturn)) void (*uboot)(void);
>> +
>> + ? ? /*
>> + ? ? ?* Load U-Boot image from NAND into RAM
>> + ? ? ?*/
>> + ? ? ret = ?nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
>> + ? ? ? ? ? ? ? ? ? ? CONFIG_SYS_NAND_U_BOOT_SIZE,
>> + ? ? ? ? ? ? (void *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +
>> +#ifdef CONFIG_NAND_ENV_DST
>> + ? ? ret = ?nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>> + ? ? ? ? ? ? (void *)CONFIG_NAND_ENV_DST);
>> +
>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>> + ? ? ret = ?nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>> + ? ? ? ? ? ? (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>> +#endif
>> +#endif
>> +
>> + ? ? /*
>> + ? ? ?* Jump to U-Boot image
>> + ? ? ?*/
>> + ? ? uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
>> + ? ? (*uboot)();
>> +}
>
> This is common to most NAND SPLs. ?It would be nice to stick this in a
> common place (at least the loading part, maybe not the jump). ?Not
> nand_spl_simple.c, as it's utility is not limited to the simple driver.
> ?Maybe drivers/mtd/nand/nand_spl_load.c?
Indeed, the difference right here between davinci and omap*(/am335x)
is parsing u-boot.img for the size or just using a hard-coded size
variable.
--
Tom
^ permalink raw reply
* [U-Boot] Union Pay/ATM Compensation Payment Notification
From: Christopher S. Card @ 2011-10-31 22:29 UTC (permalink / raw)
To: u-boot
Union Pay Malaysia Sdn Bhd
19th Floor, Plaza IBM
No. 8, First Avenue,
Persiaran Bandar Utama
47800 Petaling Jaya
Selangor Darul Ehsan
Union Pay/ATM Compensation Payment Notification
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on the successful emergence in our ongoing fund remittance promo of all ATM card users around the globe. This scheme was initiated
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No tickets were sold out. Your email was one of the lucky emails/ATM Card users selected RANDOMLY via E-wheel Computer Ballot System
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In the mean time we have been mandated to issue out this payment via our swift card payment centers, which is the latest technology
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and a tracking number issued to you to enable you track your parcel till it gets to its final destination. This card can be used in
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Center Manager with the requested information as listed below to the follow office via email.
Union Pay Malaysia Sdn Bhd
19th Floor, Plaza IBM
No. 8, First Avenue,
Persiaran Bandar Utama
47800 Petaling Jaya
Selangor Darul Ehsan
Contact Person: Mr. Lin Yung
Email: malaysiapayunion at xnmsn.com
Telephone:+60123013718
Required information:
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4. Your Age and Current Occupation
5. Country
Note that because of impostors, we hereby issued you our code of conduct, which is (ATM-3714) so you have to indicate this code when
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________________________________
CONFIDENTIALITY NOTICE: This email message, including any attachments, is for the sole use of the intended recipient(s) and may contain confidential and privileged information or otherwise be protected by law. Any access, use, disclosure or distribution of this email message by anyone other than the intended recipient(s) is unauthorized and prohibited. If you are not an intended recipient (or an agent acting on an intended recipient's behalf), please contact the sender by reply email and immediately destroy all copies of the original message. Virus scanning is recommended on all email attachments.
^ permalink raw reply
* [U-Boot] [PATCH v5 05/11] arm, davinci: add support for new spl framework
From: Scott Wood @ 2011-10-31 22:09 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320036790-24283-6-git-send-email-hs@denx.de>
On 10/30/2011 11:53 PM, Heiko Schocher wrote:
> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> new file mode 100644
> index 0000000..efc0521
> --- /dev/null
> +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> @@ -0,0 +1,57 @@
> +/*
> + * Copyright (C) 2011
> + * Heiko Schocher, DENX Software Engineering, hs at denx.de.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <nand.h>
> +#include <asm/io.h>
Does this file use anything from asm/io.h?
> +/*
> + * The main entry for NAND booting. It's necessary that SDRAM is already
> + * configured and available since this code loads the main U-Boot image
> + * from NAND into SDRAM and starts it from there.
> + */
> +void nand_boot(void)
> +{
> + int ret;
> + __attribute__((noreturn)) void (*uboot)(void);
> +
> + /*
> + * Load U-Boot image from NAND into RAM
> + */
> + ret = nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (void *)CONFIG_SYS_NAND_U_BOOT_DST);
> +
> +#ifdef CONFIG_NAND_ENV_DST
> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (void *)CONFIG_NAND_ENV_DST);
> +
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> +
> + /*
> + * Jump to U-Boot image
> + */
> + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
> + (*uboot)();
> +}
This is common to most NAND SPLs. It would be nice to stick this in a
common place (at least the loading part, maybe not the jump). Not
nand_spl_simple.c, as it's utility is not limited to the simple driver.
Maybe drivers/mtd/nand/nand_spl_load.c?
-Scott
^ permalink raw reply
* [U-Boot] [PATCH v3 8/8] tegra2: Don't use board pointer before it is set up
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
In board_init_f() the gd->bd pointer is not valid when dram_init() is called.
This only avoids dying because DRAM is at zero on Tegra2. The common ARM
routine sets up the banks in the same way anyway, so we can just remove this
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v3:
- Remove later CP15 init in board.c since this is not needed now
- Rebase against master (due to CONFIG_SYS_CACHELINE_SIZE series)
arch/arm/cpu/armv7/tegra2/board.c | 10 +---------
1 files changed, 1 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
index fbf189a..59dce8f 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -57,16 +57,8 @@ unsigned int query_sdram_size(void)
int dram_init(void)
{
- unsigned long rs;
-
/* We do not initialise DRAM here. We just query the size */
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = gd->ram_size = query_sdram_size();
-
- /* Now check it dynamically */
- rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size);
- if (rs)
- gd->bd->bi_dram[0].size = gd->ram_size = rs;
+ gd->ram_size = query_sdram_size();
return 0;
}
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 7/8] tegra2: Remove unneeded 'dynamic ram size' message
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
This message is not required, since it is followed by an 'official' U-Boot
message.
U-Boot 2011.03-00048-gd7cb0d3 (May 11 2011 - 17:17:23)
TEGRA2
Board: NVIDIA Seaboard
dynamic ram_size = 1073741824
DRAM: 1 GiB
becomes:
TEGRA2
Board: NVIDIA Seaboard
DRAM: 1 GiB
This is a separate commit since it changes behavior.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/cpu/armv7/tegra2/board.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
index e6fe4fd..fbf189a 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -65,10 +65,8 @@ int dram_init(void)
/* Now check it dynamically */
rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size);
- if (rs) {
- printf("dynamic ram_size = %lu\n", rs);
+ if (rs)
gd->bd->bi_dram[0].size = gd->ram_size = rs;
- }
return 0;
}
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 6/8] tegra2: Remove unused low-level Tegra2 UART code
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
This was used by the AVP in early boot but is no longer used. Unless we
plan to enable it somehow it is not needed. In any case we should try
to use the ns16550 driver instead as it has the same code.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/serial/Makefile | 1 -
drivers/serial/serial_tegra2.c | 77 ----------------------------------------
drivers/serial/serial_tegra2.h | 29 ---------------
3 files changed, 0 insertions(+), 107 deletions(-)
delete mode 100644 drivers/serial/serial_tegra2.c
delete mode 100644 drivers/serial/serial_tegra2.h
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 6309549..616b857 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -55,7 +55,6 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
-COBJS-$(CONFIG_TEGRA2) += serial_tegra2.o
ifndef CONFIG_SPL_BUILD
COBJS-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_tegra2.c b/drivers/serial/serial_tegra2.c
deleted file mode 100644
index 8ff34ea..0000000
--- a/drivers/serial/serial_tegra2.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ns16550.h>
-#include <asm/io.h>
-#include <asm/arch/tegra2.h>
-#include "serial_tegra2.h"
-
-static void setup_uart(struct uart_ctlr *u)
-{
- u32 reg;
-
- /* Prepare the divisor value */
- reg = NVRM_PLLP_FIXED_FREQ_KHZ * 1000 / NV_DEFAULT_DEBUG_BAUD / 16;
-
- /* Set up UART parameters */
- writel(UART_LCR_DLAB, &u->uart_lcr);
- writel(reg, &u->uart_thr_dlab_0);
- writel(0, &u->uart_ier_dlab_0);
- writel(0, &u->uart_lcr); /* clear DLAB */
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN | \
- UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR), &u->uart_iir_fcr);
- writel(0, &u->uart_ier_dlab_0);
- writel(UART_LCR_WLS_8, &u->uart_lcr); /* 8N1 */
- writel(UART_MCR_RTS, &u->uart_mcr);
- writel(0, &u->uart_msr);
- writel(0, &u->uart_spr);
- writel(0, &u->uart_irda_csr);
- writel(0, &u->uart_asr);
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN), &u->uart_iir_fcr);
-
- /* Flush any old characters out of the RX FIFO */
- reg = readl(&u->uart_lsr);
-
- while (reg & UART_LSR_DR) {
- reg = readl(&u->uart_thr_dlab_0);
- reg = readl(&u->uart_lsr);
- }
-}
-
-/*
- * Routine: uart_init
- * Description: init the UART clocks, muxes, and baudrate/parity/etc.
- */
-void uart_init(void)
-{
- struct uart_ctlr *uart = (struct uart_ctlr *)NV_PA_APB_UARTD_BASE;
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
- uart = (struct uart_ctlr *)NV_PA_APB_UARTA_BASE;
-
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
-}
diff --git a/drivers/serial/serial_tegra2.h b/drivers/serial/serial_tegra2.h
deleted file mode 100644
index 5704800..0000000
--- a/drivers/serial/serial_tegra2.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SERIAL_TEGRA_H_
-#define _SERIAL_TEGRA_H_
-
-#include <asm/arch/uart.h>
-
-#endif /* _SERIAL_TEGRA_H_ */
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 5/8] tegra2: Remove unneeded config option
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
CONFIG_ENABLE_CORTEXA9 and CONFIG_SKIP_RELOCATE_UBOOT are not needed,
so remove them. Also we don't need to skip low-level init anymore.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/tegra2-common.h | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index bdf7eab..8a0ae20 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -36,7 +36,6 @@
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
-#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
#include <asm/arch/tegra2.h> /* get chip and board defs */
@@ -46,9 +45,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_SKIP_RELOCATE_UBOOT
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_OF_LIBFDT /* enable passing of devicetree */
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 4/8] tegra2: Remove unneeded boot code
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
Since we have cache support built in we can remove Tegra's existing cache
initialization code amd other related dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v2:
- Keep Tegra's config.mk file around so we can set the armv4t flags
Changes in v3:
- Add lowlevel_init function back in (though it does nothing)
arch/arm/cpu/armv7/start.S | 12 ---
arch/arm/cpu/armv7/tegra2/ap20.h | 7 +--
arch/arm/cpu/armv7/tegra2/board.c | 8 --
arch/arm/cpu/armv7/tegra2/config.mk | 3 -
arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 115 +----------------------------
5 files changed, 2 insertions(+), 143 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 528585f..1794475 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -81,18 +81,6 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#ifdef CONFIG_TEGRA2
-/*
- * Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
- * U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
- * muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
- * to pick up its reset vector, which points here.
- */
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.h b/arch/arm/cpu/armv7/tegra2/ap20.h
index 1bb48d6..a4b4d73 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.h
+++ b/arch/arm/cpu/armv7/tegra2/ap20.h
@@ -95,13 +95,8 @@
#define HALT_COP_EVENT_IRQ_1 (1 << 11)
#define HALT_COP_EVENT_FIQ_1 (1 << 9)
-/* Prototypes */
-
+/* Start up the tegra2 SOC */
void tegra2_start(void);
-void uart_init(void);
-void udelay(unsigned long);
-void cold_boot(void);
-void cache_configure(void);
/* This is the main entry into U-Boot, used by the Cortex-A9 */
extern void _start(void);
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
index 4530194..e6fe4fd 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -55,14 +55,6 @@ unsigned int query_sdram_size(void)
}
}
-void s_init(void)
-{
-#ifndef CONFIG_ICACHE_OFF
- icache_enable();
-#endif
- invalidate_dcache();
-}
-
int dram_init(void)
{
unsigned long rs;
diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra2/config.mk
index f84fdc8..8f9bdc9 100644
--- a/arch/arm/cpu/armv7/tegra2/config.mk
+++ b/arch/arm/cpu/armv7/tegra2/config.mk
@@ -24,9 +24,6 @@
# MA 02111-1307 USA
#
-# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI.
-PLATFORM_CPPFLAGS += -march=armv4
-
# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this
# file with compatible flags
ifdef CONFIG_TEGRA2
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index f24a2ff..df1bb6e 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -26,14 +26,6 @@
#include <config.h>
#include <version.h>
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config file
-
-.global invalidate_dcache
-invalidate_dcache:
- mov pc, lr
-
.align 5
.global reset_cpu
reset_cpu:
@@ -50,110 +42,5 @@ rstctl:
.globl lowlevel_init
lowlevel_init:
- ldr sp, SRAM_STACK
- str ip, [sp]
- mov ip, lr
- bl s_init @ go setup pll, mux & memory
- ldr ip, [sp]
- mov lr, ip
-
+ @ Nothing to do here
mov pc, lr @ back to arch calling code
-
-
-.globl startup_cpu
-startup_cpu:
- @ Initialize the AVP, clocks, and memory controller
- @ SDRAM is guaranteed to be on at this point
-
- ldr r0, =cold_boot @ R0 = reset vector for CPU
- bl start_cpu @ start the CPU
-
- @ Transfer control to the AVP code
- bl halt_avp
-
- @ Should never get here
-_loop_forever2:
- b _loop_forever2
-
-.globl cache_configure
-cache_configure:
- stmdb r13!,{r14}
- @ invalidate instruction cache
- mov r1, #0
- mcr p15, 0, r1, c7, c5, 0
-
- @ invalidate the i&d tlb entries
- mcr p15, 0, r1, c8, c5, 0
- mcr p15, 0, r1, c8, c6, 0
-
- @ enable instruction cache
- mrc p15, 0, r1, c1, c0, 0
- orr r1, r1, #(1<<12)
- mcr p15, 0, r1, c1, c0, 0
-
- bl enable_scu
-
- @ enable SMP mode and FW for CPU0, by writing to Auxiliary Ctl reg
- mrc p15, 0, r0, c1, c0, 1
- orr r0, r0, #0x41
- mcr p15, 0, r0, c1, c0, 1
-
- @ Now flush the Dcache
- mov r0, #0
- @ 256 cache lines
- mov r1, #256
-
-invalidate_loop:
- add r1, r1, #-1
- mov r0, r1, lsl #5
- @ invalidate d-cache using line (way0)
- mcr p15, 0, r0, c7, c6, 2
-
- orr r2, r0, #(1<<30)
- @ invalidate d-cache using line (way1)
- mcr p15, 0, r2, c7, c6, 2
-
- orr r2, r0, #(2<<30)
- @ invalidate d-cache using line (way2)
- mcr p15, 0, r2, c7, c6, 2
-
- orr r2, r0, #(3<<30)
- @ invalidate d-cache using line (way3)
- mcr p15, 0, r2, c7, c6, 2
- cmp r1, #0
- bne invalidate_loop
-
- @ FIXME: should have ap20's L2 disabled too?
-invalidate_done:
- ldmia r13!,{pc}
-
-.globl cold_boot
-cold_boot:
- msr cpsr_c, #0xD3
- @ Check current processor: CPU or AVP?
- @ If CPU, go to CPU boot code, else continue on AVP path
-
- ldr r0, =NV_PA_PG_UP_BASE
- ldr r1, [r0]
- ldr r2, =PG_UP_TAG_AVP
-
- @ are we the CPU?
- ldr sp, CPU_STACK
- cmp r1, r2
- @ yep, we are the CPU
- bne _armboot_start
-
- @ AVP initialization follows this path
- ldr sp, AVP_STACK
- @ Init AVP and start CPU
- b startup_cpu
-
- @ the literal pools origin
- .ltorg
-
-SRAM_STACK:
- .word LOW_LEVEL_SRAM_STACK
-AVP_STACK:
- .word EARLY_AVP_STACK
-CPU_STACK:
- .word EARLY_CPU_STACK
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 3/8] arm: Only do CP15 init on ARMv7
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
Some SOCs have do not start up with their 'main' CPU. The first U-Boot
code may then be executed with a CPU which does not have a CP15.
Here we split the initialization of CP15 into a separate call, and only
do it if we detect an ARMv7 chip.
The test for ARMv7 cannot use CP15, since this may trigger an undefined
instruction exception on an ARM7TDMI, so we check for a Q bit in the
APSR instead.
An alternative to this is to make boards set CONFIG_SKIP_LOWLEVEL_INIT
and then call cpu_init_cp15() later. However after much discussion on
the U-Boot mailing list this was rejected as undesirable.
See: http://patchwork.ozlabs.org/patch/119621/
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v3:
- Update comment and also make it match style
- Fix cpu_init_cp15() name
- Remove exporting of cpu_init_cp15() from start.S
- Add test for ARMv7 CPU and skip CP15 init if not found
arch/arm/cpu/armv7/start.S | 45 ++++++++++++++++++++++++-------------------
1 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index db8e9d2..528585f 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -168,7 +168,23 @@ next:
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
+ @ Try to set the Q bit in the APSR. If this fails, we are not ARMv7
+ @ An ARM7TDMI will see APSR_nzcvq as CPSR_f (they are equivalent)
+ @ and we use that syntax to be kind to older tool chains
+ msr CPSR_f, #0x08000000 @ set Q bit
+ mrs r0, CPSR @ see if it is still there
+ tst r0, #0x08000000
+ blne cpu_init_cp15 @ if so, we are ARMv7, so init it!
+
+ msr CPSR_f, #0x00 @ clear Q bit
+
+ /*
+ * Jump to board specific initialization...
+ * The Mask ROM will have already initialized
+ * basic memory. Go here to bump up clock rate and handle
+ * wake up conditions.
+ */
+ bl lowlevel_init @ go setup pll,mux,memory
#endif
/* Set stackpointer in internal RAM to call board_init_f */
@@ -307,15 +323,14 @@ _board_init_r_ofs:
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-/*************************************************************************
- *
- * CPU_init_critical registers
- *
- * setup important registers
- * setup memory timing
+/*
+ * cpu_init_cp15
*
- *************************************************************************/
-cpu_init_crit:
+ * Setup CP15 registers (cache, MMU, TLBs) to initial reset values. The MMU
+ * and D-cache are turned off. The I-cache is turned on unless
+ * CONFIG_SYS_ICACHE_OFF is defined.
+ */
+cpu_init_cp15:
/*
* Invalidate L1 I/D
*/
@@ -340,18 +355,8 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache
#endif
mcr p15, 0, r0, c1, c0, 0
-
- /*
- * Jump to board specific initialization...
- * The Mask ROM will have already initialized
- * basic memory. Go here to bump up clock rate and handle
- * wake up conditions.
- */
- mov ip, lr @ persevere link reg across call
- bl lowlevel_init @ go setup pll,mux,memory
- mov lr, ip @ restore link
mov pc, lr @ back to my caller
-#endif
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
#ifndef CONFIG_SPL_BUILD
/*
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 2/8] tegra2: Simplify tegra_start() boot path
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
The Tegra2 boot path is more complicated than it needs to be. Since we want
to move to building most of U-Boot with ARMv7 and only a small part with
ARMv4T (for AVP) it should be as simple as possible.
This makes tegra2_start() into a simple function which either does AVP
init or A9 init depending on which core is running it. Both cores now
following the same init path, beginning at _start, and the special Tegra2
boot path code is no longer required.
Only two files need to be built for ARMv4T, and this is handled in the
Tegra2 CPU Makefile.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/cpu/armv7/tegra2/Makefile | 5 +++
arch/arm/cpu/armv7/tegra2/ap20.c | 54 +++++++++++++++++++----------------
arch/arm/cpu/armv7/tegra2/ap20.h | 3 ++
3 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra2/Makefile
index f0dc2ff..955c3b6 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -23,6 +23,11 @@
# MA 02111-1307 USA
#
+# The AVP is ARMv4T architecture so we must use special compiler
+# flags for any startup files it might use.
+CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t
+CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t
+
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 5cb4b1b..4c44bb3 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -31,7 +31,12 @@
#include <asm/arch/scu.h>
#include <common.h>
-u32 s_first_boot = 1;
+/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */
+static int ap20_cpu_is_cortexa9(void)
+{
+ u32 id = readb(NV_PA_PG_UP_BASE + PG_UP_TAG_0);
+ return id == (PG_UP_TAG_0_PID_CPU & 0xff);
+}
void init_pllx(void)
{
@@ -283,38 +288,37 @@ void init_pmc_scratch(void)
writel(CONFIG_SYS_BOARD_ODMDATA, &pmc->pmc_scratch20);
}
-void cpu_start(void)
+void tegra2_start(void)
{
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
- /* enable JTAG */
- writel(0xC0, &pmt->pmt_cfg_ctl);
+ /* If we are the AVP, start up the first Cortex-A9 */
+ if (!ap20_cpu_is_cortexa9()) {
+ /* enable JTAG */
+ writel(0xC0, &pmt->pmt_cfg_ctl);
- if (s_first_boot) {
/*
- * Need to set this before cold-booting,
- * otherwise we'll end up in an infinite loop.
- */
- s_first_boot = 0;
- cold_boot();
+ * If we are ARM7 - give it a different stack. We are about to
+ * start up the A9 which will want to use this one.
+ */
+ asm volatile("ldr sp, =%c0\n"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
+
+ start_cpu((u32)_start);
+ halt_avp();
+ /* not reached */
}
-}
-void tegra2_start()
-{
- if (s_first_boot) {
- /* Init Debug UART Port (115200 8n1) */
- uart_init();
+ /* Init PMC scratch memory */
+ init_pmc_scratch();
- /* Init PMC scratch memory */
- init_pmc_scratch();
- }
+ enable_scu();
-#ifdef CONFIG_ENABLE_CORTEXA9
- /* take the mpcore out of reset */
- cpu_start();
+ /* enable SMP mode and FW for CPU0, by writing to Auxiliary Ctl reg */
+ asm volatile(
+ "mrc p15, 0, r0, c1, c0, 1\n"
+ "orr r0, r0, #0x41\n"
+ "mcr p15, 0, r0, c1, c0, 1\n");
- /* configure cache */
- cache_configure();
-#endif
+ /* FIXME: should have ap20's L2 disabled too? */
}
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.h b/arch/arm/cpu/armv7/tegra2/ap20.h
index 49fe340..1bb48d6 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.h
+++ b/arch/arm/cpu/armv7/tegra2/ap20.h
@@ -102,3 +102,6 @@ void uart_init(void);
void udelay(unsigned long);
void cold_boot(void);
void cache_configure(void);
+
+/* This is the main entry into U-Boot, used by the Cortex-A9 */
+extern void _start(void);
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 1/8] tegra2: Add arch_cpu_init() to fire up Cortex-A9
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320098592-21425-1-git-send-email-sjg@chromium.org>
We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.
The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v2:
- Move Makefile armv4t flags from arch/arm/lib to Tegra's config.mk
arch/arm/cpu/armv7/tegra2/board.c | 15 +++++++++++++++
arch/arm/cpu/armv7/tegra2/config.mk | 6 ++++++
board/nvidia/common/board.c | 3 ---
board/nvidia/common/board.h | 1 -
include/configs/tegra2-common.h | 1 +
5 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c
index 751102d..4530194 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -23,6 +23,7 @@
#include <common.h>
#include <asm/io.h>
+#include "ap20.h"
#include <asm/arch/sys_proto.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/pmc.h>
@@ -86,3 +87,17 @@ int checkboard(void)
return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */
+
+#ifdef CONFIG_ARCH_CPU_INIT
+/*
+ * Note this function is executed by the ARM7TDMI AVP. It does not return
+ * in this case. It is also called once the A9 starts up, but does nothing in
+ * that case.
+ */
+int arch_cpu_init(void)
+{
+ /* Fire up the Cortex A9 */
+ tegra2_start();
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra2/config.mk
index 96c0795..f84fdc8 100644
--- a/arch/arm/cpu/armv7/tegra2/config.mk
+++ b/arch/arm/cpu/armv7/tegra2/config.mk
@@ -26,3 +26,9 @@
# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI.
PLATFORM_CPPFLAGS += -march=armv4
+
+# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this
+# file with compatible flags
+ifdef CONFIG_TEGRA2
+CFLAGS_arch/arm/lib/board.o += -march=armv4t
+endif
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 0f12de2..56850cc 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -125,9 +125,6 @@ int board_early_init_f(void)
/* Initialize periph GPIOs */
gpio_config_uart();
-
- /* Init UART, scratch regs, and start CPU */
- tegra2_start();
return 0;
}
#endif /* EARLY_INIT */
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 35acbca..1f57086 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -24,7 +24,6 @@
#ifndef _BOARD_H_
#define _BOARD_H_
-void tegra2_start(void);
void gpio_config_uart(void);
int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index a9c665c..bdf7eab 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -35,6 +35,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
#include <asm/arch/tegra2.h> /* get chip and board defs */
--
1.7.3.1
^ permalink raw reply related
* [U-Boot] [PATCH v3 0/8] tegra2: Tidy up boot path
From: Simon Glass @ 2011-10-31 22:03 UTC (permalink / raw)
To: u-boot
On Tegra2 the AVP runs the normal U-Boot code to a point, then halts and
the A9 takes over. The current Tegra2 boot path is fairly complex, since it
has a separate path and code for the Cortex-A9 and the AVP. In fact, they
can largely execute the same code path.
This series cleans up this logic and removes some parallel and un-needed
code.
Changes in v2:
- Move Makefile armv4t flags from arch/arm/lib to Tegra's config.mk
- Keep Tegra's config.mk file around so we can set the armv4t flags
Changes in v3:
- Update comment and also make it match style
- Fix cpu_init_cp15() name
- Remove exporting of cpu_init_cp15() from start.S
- Add test for ARMv7 CPU and skip CP15 init if not found
- Add lowlevel_init function back in (though it does nothing)
- Remove later CP15 init in board.c since this is not needed now
- Rebase against master (due to CONFIG_SYS_CACHELINE_SIZE series)
Simon Glass (8):
tegra2: Add arch_cpu_init() to fire up Cortex-A9
tegra2: Simplify tegra_start() boot path
arm: Only do CP15 init on ARMv7
tegra2: Remove unneeded boot code
tegra2: Remove unneeded config option
tegra2: Remove unused low-level Tegra2 UART code
tegra2: Remove unneeded 'dynamic ram size' message
tegra2: Don't use board pointer before it is set up
arch/arm/cpu/armv7/start.S | 57 ++++++--------
arch/arm/cpu/armv7/tegra2/Makefile | 5 +
arch/arm/cpu/armv7/tegra2/ap20.c | 54 +++++++------
arch/arm/cpu/armv7/tegra2/ap20.h | 10 +--
arch/arm/cpu/armv7/tegra2/board.c | 35 ++++-----
arch/arm/cpu/armv7/tegra2/config.mk | 7 +-
arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 115 +----------------------------
board/nvidia/common/board.c | 3 -
board/nvidia/common/board.h | 1 -
drivers/serial/Makefile | 1 -
drivers/serial/serial_tegra2.c | 77 -------------------
drivers/serial/serial_tegra2.h | 29 -------
include/configs/tegra2-common.h | 5 +-
13 files changed, 86 insertions(+), 313 deletions(-)
delete mode 100644 drivers/serial/serial_tegra2.c
delete mode 100644 drivers/serial/serial_tegra2.h
--
1.7.3.1
^ permalink raw reply
* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Simon Glass @ 2011-10-31 21:49 UTC (permalink / raw)
To: u-boot
In-Reply-To: <CAOZdJXWjSMK0ZWxbfoww_8ZcWghicgt=tPnPtDYM7hsV2KZZ8Q@mail.gmail.com>
On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 <B04825@freescale.com> wrote:
> On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger <vapier@gentoo.org> wrote:
>>
>>
>> -static void print_num(const char *, ulong);
>> +__maybe_unused
>> +static void print_num(const char *name, ulong value)
>> +{
>> + ? ? ? printf("%-12s= 0x%08lX\n", name, value);
>> +}
>>
>
> Will the linker remove the functions from the binary if they are unusued?
If built with -ffunction-sections and --gc-sections,, then the linker
can do this sort of thing. Otherwise it can't, but the compiler can. I
just tested Mike's code on my ARM compiler to make sure and it happily
removed print_eth() when it was not used.
Regards,
Simon
>
> --
> Timur Tabi
> Linux kernel developer at Freescale
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
^ permalink raw reply
* [U-Boot] [PATCH 3/9] arm: Move CP15 init out of cpu_init_crit()
From: Simon Glass @ 2011-10-31 21:44 UTC (permalink / raw)
To: u-boot
In-Reply-To: <4EAD23E9.3090605@aribaud.net>
Hi Albert,
On Sun, Oct 30, 2011 at 3:16 AM, Albert ARIBAUD
<albert.u.boot@aribaud.net> wrote:
> Hi Simon,
>
> Le 29/10/2011 02:36, Simon Glass a ?crit :
>>
>> Hi Albert,
>>
>> On Thu, Oct 27, 2011 at 10:09 PM, Albert ARIBAUD
>> <albert.u.boot@aribaud.net> ?wrote:
>>>
>>> Le 28/10/2011 03:43, Simon Glass a ?crit :
>>>
>>>> The test was
>>>>
>>>> ? ? ? ?mrc ? ? p15, 0, r0, c0, c0, 0 ? @ get ID register
>>>> ? ? ? ?and ? ? r0, r0, #0xf0000 ? ? ? ?@ get architecture
>>>> ? ? ? ?cmp ? ? r0, #0xf0000 ? ? ? ? ? ?@ check for> ? ?ARMv6
>>>> ? ? ? ?movne ? pc, lr ? ? ? ? ? ? ? ? ?@ else skip cache init
>>>>
>>>> Unfortunately I think it is a plain ARM7TDMI with no CP15.
>>>
>>> What about other fields in r0 right after mrc?
>>
>> I don't really understand that sentence, sorry.
>>
>> The ARM7TDMI does not have a CP15 and aborts if I try to access it.
>> Just in case there is something odd going on I checked with DSTREAM /
>> RVdebug and it definitely doesn't have a CP15. [as Ford Prefect would
>> say, I counted them twice]
>
> Ok, so debug tools do not show cp15. But tools can be tailored to what tool
> makes think is needed -- I could tell about some debugging tools that will
> not let me see all I want a core because the debug designers had finite
> resources and what I wanted was not a priority to them.
Ye of little faith...
>
> OTOH, according to ARM, ARM7DTMI is an ARMv4T architecture, and indeed cp15
> is mandatory only for ARMv6 and up, but ARM also states cp15 support was a
> de facto standard already for ARMv4.
Yes it is de facto when you have a core with that support - typically
an MMU and caches. But in that case it would have three digits, as in
ARM720T, rather than ARM7TDMI. It is definitely an ARM7TDMI (actually
-S) core in the datasheet, and there is no external CP15 block shown,
etc. (Although I can see a cache!)
>
> So I am left with the question: would the Tegra2 AVP be the only ARM
> implementation supported by U-Boot that does not have a cp15? That is
> possible, but I want direct testimony from Nividia.
No there are lots and lots of ARM7TDMIs out there, just not that many
that run U-Boot - and Linux is hard without an MMU. But even in the
U-Boot tree we have the s3c44b0 cpu which seems to be a plain
ARM7TDMI.
In terms of direct testimony, two engineers are on this thread and may
wish to chime in. The datasheet is pretty clear to me...
>
> This is why I asked about the Tegra2 TRM, or whatever Nvidia calls it, in
> case it would explicitely state if AVP has cp15 support or not. Failing
See above, it clearly states ARM7TDMI-S.
> that, I'd be ok with experimenting but through the AVP, not through
> debugging tools -- encoding a cp15 MIDR read in the U-Boot startup code,
> step through it with the debugger and see if it causes an UND or not, and if
> not, what is the hex value of r0 -- maybe that is exactly what you did, but
> I am not 100% sure it is, hence my insistence.
OK I have done this, and yes the AVP definitely takes the undef
exception when you execute:
mrc p15, 0, r0, c0, c0, 0
>
> I am especially surprised that a recent core be synthesized without a means
> for run-time core identification, especially in a design with two ARM cores.
The -S means synthesized. It does have its own method of
identification as I mentioned. There is a Tegra-specific register that
I can read.
>
>> The simplest thing I have been able to think of that does not involve
>> exceptions, differing instruction behaviour, doing the init later or
>> putting in some Tegra-specific code is to check for the existence of
>> the Q bit in the CPSR (actually APSR on ARMv7). This does seem to work
>> and I have verified both in my old 1996 ARM ARM DDI 0100B and the
>> ARMv7-A one (DDI 0406B) that from an architecture point of view this
>> should work. The Q bit is RAZ on ARMv4T.
>
> This could hep if we really cannot access the Main ID Register on the AVP.
OK, well I will send a patch set up with this change.
>
>> I believe this will cope with the Cortex-A7 / A-15 combinations and
>> possibly even Cortex-R4 / A-15 although I have not tested this. I
>> suppose we can deal with this when it becomes an issue.
>>
>> So I have redone this one patch with that in mind, and adjusted the
>> series slightly to fit with this. I will resend it when it completes
>> MAKEALL.
>>
>> I hope that this resolves the matter, but if not(!), I would very much
>> appreciate it if you could send through some actual pseudo code
>> showing what you are looking for, to avoid any confusion.
>
> Well, I just want to see if the MIDR is accessible and what its value is, so
> I want the AVP to execute
>
> ? ? ? ?mrc ? ? p15, 0, r0, c0, c0, 0
>
> The ending 0 is what selects MIDR rather than other cp15 registers -- other
> values can cause UND (and I would gladly understand that AVP goes UND for
> reading cp15 CTR for instance).
>
> The simplest test would be to insert the exact instruction above in the
> reset sequence in start.S right after SVC32 switch, debug the reset
> execution path, see if the mrc above goes UND or else check r0's contents
> after mrc is done.
OK see above, I have done this. What I meant was for you to provide a
code sequence that you want in start.S. Hopefully my patch will fit
the bill.
I am very happy for this to be rewritten/changed down the track. But
for now, and assuming you don't want to call a function to find out
whether or not CP15 exists, I have created something which seems to
solve the problem. There are many other problems to solve. I feel that
this one has had its fair share of attention!
Regards,
Simon
>
>> Thanks,
>> Simon
>
> Amicalement,
> --
> Albert.
>
^ permalink raw reply
* [U-Boot] [PATCH v2] arm: Correct build error introduced by getenv_ulong() patch
From: Mike Frysinger @ 2011-10-31 21:40 UTC (permalink / raw)
To: u-boot
In-Reply-To: <CAPnjgZ04KHxvyYebLHiFYta6bpqrpiGU=TJV9X6D94QnZQnFVw@mail.gmail.com>
On Monday 31 October 2011 17:06:46 Simon Glass wrote:
> On Sun, Oct 30, 2011 at 5:44 PM, Mike Frysinger wrote:
> > On Sunday 23 October 2011 23:44:35 Simon Glass wrote:
> >> --- a/arch/arm/lib/board.c
> >> +++ b/arch/arm/lib/board.c
> >>
> >> flash_size = flash_init();
> >> if (flash_size > 0) {
> >> # ifdef CONFIG_SYS_FLASH_CHECKSUM
> >> + char *s = getenv("flashchecksum");
> >> +
> >> print_size(flash_size, "");
> >> /*
> >> * Compute and print flash CRC if flashchecksum is set to
> >> 'y' *
> >> * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
> >> */
> >> - s = getenv("flashchecksum");
> >> if (s && (*s == 'y')) {
> >> printf(" CRC: %08X", crc32(0,
> >> (const unsigned char *)
> >> CONFIG_SYS_FLASH_BASE, @@ -566,9 +567,12 @@ void board_init_r(gd_t *id,
> >> ulong dest_addr) /* Initialize from environment */
> >> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> >> #if defined(CONFIG_CMD_NET)
> >> - s = getenv("bootfile");
> >> - if (s != NULL)
> >> - copy_filename(BootFile, s, sizeof(BootFile));
> >> + {
> >> + char *s = getenv("bootfile");
> >> +
> >> + if (s != NULL)
> >> + copy_filename(BootFile, s, sizeof(BootFile));
> >> + }
> >> #endif
> >
> > seems like a better solution would be to use at the top:
> > __maybe_unused char *s;
> >
> > also, shouldn't these be "const char *s" ?
>
> We can certainly do this and I agree it is easier than #ifdefs. Does
> it introduce the possibility that one day the code will stop using the
> variable but it will still be declared? Is the fact that we need the
> #ifdefs an indication that the function should be too long and should
> be refactored? it in fact better to have these explicit so we can see
> them for the ugliness they are?
yes, you're right that it does leave the door open to the variable being
declared, never used, and gcc not emitting a warning about it.
both setups suck, but i'd lean towards the less-ifdef state ... wonder if
Wolfgang has a preference.
-mike
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^ permalink raw reply
* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Mike Frysinger @ 2011-10-31 21:38 UTC (permalink / raw)
To: u-boot
In-Reply-To: <CAPnjgZ0Scvb2WyxcydL1PFC=x5Xggj44OCFpDPutd-XRgUWO-g@mail.gmail.com>
On Monday 31 October 2011 16:47:08 Simon Glass wrote:
> On Mon, Oct 31, 2011 at 1:44 PM, Mike Frysinger wrote:
> > On Monday 31 October 2011 15:11:35 Simon Glass wrote:
> >> On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger wrote:
> >> > If we move the local funcs to the top of the file, and use the
> >> > __maybe_unused define, we can drop a lot of ugly ifdef logic and
> >> > duplicated prototypes.
> >> >
> >> > Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> >>
> >> This is much cleaner - is the correct style to put attribute tags on
> >> the previous line?
> >
> > when responding to add your own, there isn't any real protocol. just
> > normal e-mail etiquette (no top posting/etc...). patchwork/humans will
> > do the right thing when manually updating the changelog.
>
> Actually I meant the __maybe_unused tag before the function name.
ah. i'm not sure there is a hard rule here. i did that because one line
would make the func def too long to fit.
-mike
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^ permalink raw reply
* [U-Boot] [PATCH 1/2] nand_spl_simple: Add omap3 DMA usage to SPL
From: Scott Wood @ 2011-10-31 21:22 UTC (permalink / raw)
To: u-boot
In-Reply-To: <4EAE62D6.5030109@gmail.com>
On 10/31/2011 03:56 AM, Simon Schwarz wrote:
> Dear Scott,
>
> On 10/25/2011 08:24 PM, Scott Wood wrote:
>> On 10/16/2011 05:10 AM, Simon Schwarz wrote:
>>> This adds DMA copy for the nand spl implementation. If CONFIG_SPL_DMA_SUPPORT
>>> is defined the DMA is used.
>>>
>>> Based on DMA driver patch:
>>> http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/109744/focus=109747
>>
>> As Wolfgang pointed out, this doesn't belong here. Create your own
>> alternate SPL driver if your hardware doesn't work with the simple one
>> (similar to the not-yet-migrated nand_spl/nand_boot_fsl_elbc.c,
>> nand_spl/nand_boot_fsl_ifc.c, etc).
>>
>
> Hm. The naming of the functions was a fault. Will rename the calls in
> nand_spl_simple to remove omap parts. So
> omap3_dma_wait_for_transfer
> will become
> dma_wait_for_transfer
> etc.
>
> So a board which intents to use DMA in SPL can implement these
> functions. Would this be ok?
What would the semantics of a generic dma_wait_for_transfer() be?
I just don't see how this is generic at all, whatever the name.
> A whole new driver is IMHO not the right thing as there is too much
> duplicated code then.
So factor the common bits out into a separate file.
>>> @@ -46,11 +59,11 @@ static int nand_command(int block, int page, uint32_t offs,
>>> this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
>>> this->cmd_ctrl(&mtd, page_addr& 0xff, NAND_CTRL_ALE); /* A[16:9] */
>>> this->cmd_ctrl(&mtd, (page_addr>> 8)& 0xff,
>>> - NAND_CTRL_ALE); /* A[24:17] */
>>> + NAND_CTRL_ALE); /* A[24:17] */
>>> #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
>>> /* One more address cycle for devices> 32MiB */
>>> this->cmd_ctrl(&mtd, (page_addr>> 16)& 0x0f,
>>> - NAND_CTRL_ALE); /* A[28:25] */
>>> + NAND_CTRL_ALE); /* A[28:25] */
>>> #endif
>>
>> Please refrain from making random unrelated whitespace changes in a
>> patch that also makes functional changes, particularly when they are
>> extensive enough to make it hard to spot the functional changes.
>>
>> In this particular case, I think the whitespace was fine the way it was;
>> the continuation lines were nicely aligned.
>
>
> If I remember right I changed these because of checkpatch errors.
I believe checkpatch only complains when you have 8 or more spaces in a
row, which isn't the case here. I don't think there's any prohibition
on lining things up with single-column granularity.
Further, checkpatch should not be complaining about lines that you don't
touch.
Where reformatting is warranted, it should be a separate patch.
-Scott
^ permalink raw reply
* [U-Boot] (no subject)
From: Tahani Kalender @ 2011-10-31 21:21 UTC (permalink / raw)
To: u-boot
Congratulation Your Email Address Have Won ?1,000,000.00 From The ICC CRICKET WORLD CUP-2011 for prize claims Contact Dr Dennis Smith on Email: iccwcluk2 at hotmail.co.uk
Tel:+447010050861
^ permalink raw reply
* [U-Boot] [PATCH] image: Allow images to indicate they're loadable at any address
From: Simon Glass @ 2011-10-31 21:20 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1319464779-23571-1-git-send-email-swarren@nvidia.com>
On Mon, Oct 24, 2011 at 6:59 AM, Stephen Warren <swarren@nvidia.com> wrote:
> The legacy uImage format includes an absolute load and entry-
> point address. When presented with a uImage in memory that
> isn't loaded at the address in the image's load address,
> U-Boot will relocate the image to its address in the header.
>
> Some payloads can actually be loaded and used at any arbitrary
> address. An example is an ARM Linux kernel zImage file. This
> is useful when sharing a single zImage across multiple boards
> with different memory layouts, or U-Boot builds with different
> ${load_addr} since sharing a single absolute load address may
> not be possible.
>
> With this config option enabled, an image header may contain a
> load address of -1/0xffffffff. This indicates the image can
> operate at any load address, and U-Boot will avoid automtically
> copying it anywhere. In this case, the entry-point field is
> specified relative to the start of the image payload.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
> ---
> Wolfgang,
>
> This is an much simpler and less invasive alternative to my previous
> IH_TYPE_KERNEL_REL patch. If it's OK, you can ignore that patch.
>
> u-boot.bin sizes for Tegra Seaboard without/with this config option on:
>
> ? text ? ?data ? ? bss ? ? dec ? ? hex filename
> ?165858 ? ?3565 ?217016 ?386439 ? 5e587 ./u-boot
>
> with:
>
> ? text ? ?data ? ? bss ? ? dec ? ? hex filename
> ?165950 ? ?3565 ?217012 ?386527 ? 5e5df ./u-boot
>
> ?README ? ? ? ? ? ? | ? 23 +++++++++++++++++++++++
> ?common/cmd_bootm.c | ? ?4 ++++
> ?common/image.c ? ? | ? 27 +++++++++++++++++++++++++++
> ?include/image.h ? ?| ? ?4 ++++
> ?4 files changed, 58 insertions(+), 0 deletions(-)
>
^ permalink raw reply
* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Tabi Timur-B04825 @ 2011-10-31 21:15 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1320022463-26410-1-git-send-email-vapier@gentoo.org>
On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger <vapier@gentoo.org> wrote:
>
>
> -static void print_num(const char *, ulong);
> +__maybe_unused
> +static void print_num(const char *name, ulong value)
> +{
> + ? ? ? printf("%-12s= 0x%08lX\n", name, value);
> +}
>
Will the linker remove the functions from the binary if they are unusued?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* [U-Boot] Hello
From: sonia emmedy Nnu @ 2011-10-31 21:11 UTC (permalink / raw)
To: u-boot
Hello My Dear,
I am interested in you, My name is Miss Sonia, i am 24 years old young
girl,I will want us to be friends for something important which I would like
to share with you, and we will get to know each other better, I hope you
don't mind being my friend. l want you to send an email to me to my email
address so that l can give you my picture for you to know whom l am.
please i am waiting for your responds to my email address, Remember that
distance or colour does not matter but love matters a lot in life,
Your New Friend,
Miss Sonia.
.
^ permalink raw reply
* [U-Boot] [PATCH v2] arm: Correct build error introduced by getenv_ulong() patch
From: Simon Glass @ 2011-10-31 21:06 UTC (permalink / raw)
To: u-boot
In-Reply-To: <201110302044.09233.vapier@gentoo.org>
Hi Mike,
On Sun, Oct 30, 2011 at 5:44 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Sunday 23 October 2011 23:44:35 Simon Glass wrote:
>> --- a/arch/arm/lib/board.c
>> +++ b/arch/arm/lib/board.c
>>
>> ? ? ? flash_size = flash_init();
>> ? ? ? if (flash_size > 0) {
>> ?# ifdef CONFIG_SYS_FLASH_CHECKSUM
>> + ? ? ? ? ? ? char *s = getenv("flashchecksum");
>> +
>> ? ? ? ? ? ? ? print_size(flash_size, "");
>> ? ? ? ? ? ? ? /*
>> ? ? ? ? ? ? ? ?* Compute and print flash CRC if flashchecksum is set to 'y'
>> ? ? ? ? ? ? ? ?*
>> ? ? ? ? ? ? ? ?* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
>> ? ? ? ? ? ? ? ?*/
>> - ? ? ? ? ? ? s = getenv("flashchecksum");
>> ? ? ? ? ? ? ? if (s && (*s == 'y')) {
>> ? ? ? ? ? ? ? ? ? ? ? printf(" ?CRC: %08X", crc32(0,
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (const unsigned char *) CONFIG_SYS_FLASH_BASE,
>> @@ -566,9 +567,12 @@ void board_init_r(gd_t *id, ulong dest_addr)
>> ? ? ? /* Initialize from environment */
>> ? ? ? load_addr = getenv_ulong("loadaddr", 16, load_addr);
>> ?#if defined(CONFIG_CMD_NET)
>> - ? ? s = getenv("bootfile");
>> - ? ? if (s != NULL)
>> - ? ? ? ? ? ? copy_filename(BootFile, s, sizeof(BootFile));
>> + ? ? {
>> + ? ? ? ? ? ? char *s = getenv("bootfile");
>> +
>> + ? ? ? ? ? ? if (s != NULL)
>> + ? ? ? ? ? ? ? ? ? ? copy_filename(BootFile, s, sizeof(BootFile));
>> + ? ? }
>> ?#endif
>
> seems like a better solution would be to use at the top:
> ? ? ? ?__maybe_unused char *s;
>
> also, shouldn't these be "const char *s" ?
> -mike
>
We can certainly do this and I agree it is easier than #ifdefs. Does
it introduce the possibility that one day the code will stop using the
variable but it will still be declared? Is the fact that we need the
#ifdefs an indication that the function should be too long and should
be refactored? it in fact better to have these explicit so we can see
them for the ugliness they are?
I'm not sure, but thought I should ask.
Regards,
Simon
^ permalink raw reply
* [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
From: Simon Glass @ 2011-10-31 20:47 UTC (permalink / raw)
To: u-boot
In-Reply-To: <201110311644.02847.vapier@gentoo.org>
Hi Mike,
On Mon, Oct 31, 2011 at 1:44 PM, Mike Frysinger <vapier@gentoo.org> wrote:
> On Monday 31 October 2011 15:11:35 Simon Glass wrote:
>> On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger <vapier@gentoo.org> wrote:
>> > If we move the local funcs to the top of the file, and use the
>> > __maybe_unused define, we can drop a lot of ugly ifdef logic and
>> > duplicated prototypes.
>> >
>> > Signed-off-by: Mike Frysinger <vapier@gentoo.org>
>>
>> This is much cleaner - is the correct style to put attribute tags on
>> the previous line?
>
> when responding to add your own, there isn't any real protocol. ?just normal
> e-mail etiquette (no top posting/etc...). ?patchwork/humans will do the right
> thing when manually updating the changelog.
> -mike
>
Actually I meant the __maybe_unused tag before the function name.
Regards,
Simon
^ permalink raw reply
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