From: Leo Liang <ycliang@andestech.com>
To: Yao Zi <ziyao@disroot.org>
Cc: Rick Chen <rick@andestech.com>, Tom Rini <trini@konsulko.com>,
Wei Fu <wefu@redhat.com>, Yixun Lan <dlan@gentoo.org>,
Maksim Kiselev <bigunclemax@gmail.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
Simon Glass <sjg@chromium.org>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
"Ilias Apalodimas" <ilias.apalodimas@linaro.org>,
Neha Malcom Francis <n-francis@ti.com>,
Jayesh Choudhary <j-choudhary@ti.com>,
Wadim Egorov <w.egorov@phytec.de>,
Vaishnav Achath <vaishnav.a@ti.com>, Andrew Davis <afd@ti.com>,
Chia-Wei Wang <chiawei_wang@aspeedtech.com>,
<u-boot@lists.denx.de>, Han Gao <rabenda.cn@gmail.com>,
Han Gao <gaohan@iscas.ac.cn>
Subject: Re: [PATCH 08/10] riscv: dts: th1520: Add binman configuration
Date: Tue, 13 May 2025 02:04:38 +0800 [thread overview]
Message-ID: <aCI4NhTRLfaif2GP@swlinux02> (raw)
In-Reply-To: <20250426170059.35571-5-ziyao@disroot.org>
On Sat, Apr 26, 2025 at 05:00:57PM +0000, Yao Zi wrote:
> [EXTERNAL MAIL]
>
> Add binman configuration for TH1520 SoC, whose BROM loads the image
> combined into SRAM and directly jumps to it. The configuration creates
> u-boot-with-spl.bin where the SPL code locates at the start and the DDR
> firmware is shipped.
>
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
> arch/riscv/dts/thead-th1520-binman.dtsi | 55 +++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 arch/riscv/dts/thead-th1520-binman.dtsi
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
next prev parent reply other threads:[~2025-05-12 18:05 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-26 16:56 [PATCH 00/10] Initial SPL support for T-Head TH1520 SoC Yao Zi
2025-04-26 16:56 ` [PATCH 01/10] riscv: lib: Split out support for T-Head cache management operations Yao Zi
2025-05-12 9:56 ` Leo Liang
2025-04-26 16:56 ` [PATCH 02/10] riscv: dts: th1520: Add clock-frequency for UART0 Yao Zi
2025-05-12 9:57 ` Leo Liang
2025-05-12 11:53 ` e
2025-05-13 4:06 ` Yao Zi
2025-04-26 16:56 ` [PATCH 03/10] riscv: cpu: Add TH1520 CPU support Yao Zi
2025-05-12 9:59 ` Leo Liang
2025-04-26 16:56 ` [PATCH 04/10] ram: thead: Add initial DDR controller support for TH1520 Yao Zi
2025-04-26 17:09 ` Yao Zi
2025-05-12 17:55 ` Leo Liang
2025-05-12 17:47 ` Leo Liang
2025-05-24 19:16 ` Drew Fustini
2025-04-26 17:00 ` Yao Zi
2025-04-26 17:00 ` [PATCH 05/10] riscv: dts: th1520: Preserve necessary devices for SPL Yao Zi
2025-05-12 18:02 ` Leo Liang
2025-04-26 17:00 ` [PATCH 06/10] riscv: dts: lichee-module-4a: Preserve memory node " Yao Zi
2025-05-12 18:03 ` Leo Liang
2025-04-26 17:00 ` [PATCH 07/10] riscv: dts: th1520: Add DRAM controller Yao Zi
2025-05-12 18:04 ` Leo Liang
2025-04-26 17:00 ` [PATCH 08/10] riscv: dts: th1520: Add binman configuration Yao Zi
2025-05-12 18:04 ` Leo Liang [this message]
2025-04-26 17:03 ` [PATCH 09/10] board: thead: licheepi4a: Enable SPL support Yao Zi
2025-05-12 18:05 ` Leo Liang
2025-04-26 17:03 ` [PATCH 10/10] doc: thead: lpi4a: Update documentation Yao Zi
2025-05-12 18:06 ` Leo Liang
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