* [PATCH v2 01/12] usb: dwc3: Look up reference clock DT phandle in both controller DT nodes
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 02/12] usb: dwc3-generic: Allow different controller DT node pattern Kunihiko Hayashi
` (10 subsequent siblings)
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
From: Marek Vasut <marex@denx.de>
There are currently four disparate placement possibilities of DWC3
reference clock phandle in SoC DTs:
- in top level glue node, with generic subnode without clock (ZynqMP)
- in top level generic node, with no subnode (i.MX8MQ)
- in generic subnode, with other clock in top level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/usb/dwc3/dwc3-generic.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 78966718d0..42e92478f2 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -68,10 +68,27 @@ static int dwc3_generic_probe(struct udevice *dev,
#if CONFIG_IS_ENABLED(OF_CONTROL)
dwc3_of_parse(dwc3);
+ /*
+ * There are currently four disparate placement possibilities of DWC3
+ * reference clock phandle in SoC DTs:
+ * - in top level glue node, with generic subnode without clock (ZynqMP)
+ * - in top level generic node, with no subnode (i.MX8MQ)
+ * - in generic subnode, with other clock in top level node (i.MX8MP)
+ * - in both top level node and generic subnode (Rockchip)
+ * Cover all the possibilities here by looking into both nodes, start
+ * with the top level node as that seems to be used in majority of DTs
+ * to reference the clock.
+ */
node = dev_ofnode(dev->parent);
index = ofnode_stringlist_search(node, "clock-names", "ref");
if (index < 0)
index = ofnode_stringlist_search(node, "clock-names", "ref_clk");
+ if (index < 0) {
+ node = dev_ofnode(dev);
+ index = ofnode_stringlist_search(node, "clock-names", "ref");
+ if (index < 0)
+ index = ofnode_stringlist_search(node, "clock-names", "ref_clk");
+ }
if (index >= 0)
dwc3->ref_clk = &glue->clks.clks[index];
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 02/12] usb: dwc3-generic: Allow different controller DT node pattern
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 01/12] usb: dwc3: Look up reference clock DT phandle in both controller DT nodes Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 21:49 ` Marek Vasut
2023-02-01 1:13 ` [PATCH v2 03/12] usb: dwc3-generic: Add clock initialization in child DT node Kunihiko Hayashi
` (9 subsequent siblings)
11 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
The most of devicetree has the following USB node structure.
The controller node is placed as a child node of the glue node.
Current dwc3-generic driver works on this premise.
glue {
/* glue node */
usb {
/* controller node */
};
};
However, UniPhier original devicetree has the following USB node structure.
The controller node is separately placed from the glue node.
usb {
/* controller node */
};
glue {
/* glue node */
};
In dwc_glue_bind(), this patch provides .glue_get_ctrl_dev() callback to
get such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/usb/dwc3/dwc3-generic.c | 93 ++++++++++++++++++++-------------
1 file changed, 57 insertions(+), 36 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 42e92478f2..e32003d68e 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -276,6 +276,7 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
#endif
struct dwc3_glue_ops {
+ int (*glue_get_ctrl_dev)(struct udevice *parent, ofnode *node);
void (*glue_configure)(struct udevice *dev, int index,
enum usb_dr_mode mode);
};
@@ -415,54 +416,74 @@ struct dwc3_glue_ops ti_ops = {
.glue_configure = dwc3_ti_glue_configure,
};
-static int dwc3_glue_bind(struct udevice *parent)
+static int dwc3_glue_bind_common(struct udevice *parent, ofnode node)
{
- ofnode node;
- int ret;
+ const char *name = ofnode_get_name(node);
+ const char *driver = NULL;
enum usb_dr_mode dr_mode;
+ struct udevice *dev;
+ int ret;
- dr_mode = usb_get_dr_mode(dev_ofnode(parent));
-
- ofnode_for_each_subnode(node, dev_ofnode(parent)) {
- const char *name = ofnode_get_name(node);
- struct udevice *dev;
- const char *driver = NULL;
-
- debug("%s: subnode name: %s\n", __func__, name);
+ debug("%s: subnode name: %s\n", __func__, name);
- /* if the parent node doesn't have a mode check the leaf */
- if (!dr_mode)
- dr_mode = usb_get_dr_mode(node);
+ /* if the parent node doesn't have a mode check the leaf */
+ dr_mode = usb_get_dr_mode(dev_ofnode(parent));
+ if (!dr_mode)
+ dr_mode = usb_get_dr_mode(node);
- switch (dr_mode) {
- case USB_DR_MODE_PERIPHERAL:
- case USB_DR_MODE_OTG:
+ switch (dr_mode) {
+ case USB_DR_MODE_PERIPHERAL:
+ case USB_DR_MODE_OTG:
#if CONFIG_IS_ENABLED(DM_USB_GADGET)
- debug("%s: dr_mode: OTG or Peripheral\n", __func__);
- driver = "dwc3-generic-peripheral";
+ debug("%s: dr_mode: OTG or Peripheral\n", __func__);
+ driver = "dwc3-generic-peripheral";
#endif
- break;
+ break;
#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
- case USB_DR_MODE_HOST:
- debug("%s: dr_mode: HOST\n", __func__);
- driver = "dwc3-generic-host";
- break;
+ case USB_DR_MODE_HOST:
+ debug("%s: dr_mode: HOST\n", __func__);
+ driver = "dwc3-generic-host";
+ break;
#endif
- default:
- debug("%s: unsupported dr_mode\n", __func__);
- return -ENODEV;
- };
+ default:
+ debug("%s: unsupported dr_mode\n", __func__);
+ return -ENODEV;
+ };
- if (!driver)
- continue;
+ if (!driver)
+ return -ENXIO;
+
+ ret = device_bind_driver_to_node(parent, driver, name,
+ node, &dev);
+ if (ret) {
+ debug("%s: not able to bind usb device mode\n",
+ __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dwc3_glue_bind(struct udevice *parent)
+{
+ struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent);
+ ofnode node;
+ int ret;
- ret = device_bind_driver_to_node(parent, driver, name,
- node, &dev);
- if (ret) {
- debug("%s: not able to bind usb device mode\n",
- __func__);
+ if (ops && ops->glue_get_ctrl_dev) {
+ ret = ops->glue_get_ctrl_dev(parent, &node);
+ if (ret)
+ return ret;
+
+ return dwc3_glue_bind_common(parent, node);
+ }
+
+ ofnode_for_each_subnode(node, dev_ofnode(parent)) {
+ ret = dwc3_glue_bind_common(parent, node);
+ if (ret == -ENXIO)
+ continue;
+ if (ret)
return ret;
- }
}
return 0;
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH v2 02/12] usb: dwc3-generic: Allow different controller DT node pattern
2023-02-01 1:13 ` [PATCH v2 02/12] usb: dwc3-generic: Allow different controller DT node pattern Kunihiko Hayashi
@ 2023-02-01 21:49 ` Marek Vasut
0 siblings, 0 replies; 23+ messages in thread
From: Marek Vasut @ 2023-02-01 21:49 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> The most of devicetree has the following USB node structure.
> The controller node is placed as a child node of the glue node.
> Current dwc3-generic driver works on this premise.
>
> glue {
> /* glue node */
> usb {
> /* controller node */
> };
> };
>
> However, UniPhier original devicetree has the following USB node structure.
> The controller node is separately placed from the glue node.
>
> usb {
> /* controller node */
> };
> glue {
> /* glue node */
> };
>
> In dwc_glue_bind(), this patch provides .glue_get_ctrl_dev() callback to
> get such a controller node and binds the driver related to the node.
>
> If this callback isn't defined, dwc_glue_bind() looks for the controller
> nodes from the child nodes, as before.
>
> Suggested-by: Marek Vasut <marex@denx.de>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v2 03/12] usb: dwc3-generic: Add clock initialization in child DT node
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 01/12] usb: dwc3: Look up reference clock DT phandle in both controller DT nodes Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 02/12] usb: dwc3-generic: Allow different controller DT node pattern Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 21:50 ` Marek Vasut
2023-02-01 1:13 ` [PATCH v2 04/12] usb: dwc3-generic: Export glue structures and functions Kunihiko Hayashi
` (8 subsequent siblings)
11 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/usb/dwc3/dwc3-generic.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index e32003d68e..8fa56e1ac1 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -572,6 +572,12 @@ static int dwc3_glue_probe(struct udevice *dev)
if (ret)
return ret;
+ if (glue->clks.count == 0) {
+ ret = dwc3_glue_clk_init(child, glue);
+ if (ret)
+ return ret;
+ }
+
if (glue->resets.count == 0) {
ret = dwc3_glue_reset_init(child, glue);
if (ret)
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH v2 03/12] usb: dwc3-generic: Add clock initialization in child DT node
2023-02-01 1:13 ` [PATCH v2 03/12] usb: dwc3-generic: Add clock initialization in child DT node Kunihiko Hayashi
@ 2023-02-01 21:50 ` Marek Vasut
0 siblings, 0 replies; 23+ messages in thread
From: Marek Vasut @ 2023-02-01 21:50 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> Same as the reset cotnrol, should add a clock initialization in child DT
> node, if the glue node doesn't have any clocks.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v2 04/12] usb: dwc3-generic: Export glue structures and functions
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (2 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 03/12] usb: dwc3-generic: Add clock initialization in child DT node Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 05/12] usb: dwc3-generic: Add the size of regs property to glue structure Kunihiko Hayashi
` (7 subsequent siblings)
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
In order to allow external SoC-dependent glue drivers to use dwc3-generic
functions, push the glue structures and export the functions to a header
file.
The exported structures and functions are:
- struct dwc3_glue_data
- struct dwc3_glue_ops
- dwc3_glue_bind()
- dwc3_glue_probe()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
drivers/usb/dwc3/dwc3-generic.c | 18 ++++--------------
drivers/usb/dwc3/dwc3-generic.h | 32 ++++++++++++++++++++++++++++++++
2 files changed, 36 insertions(+), 14 deletions(-)
create mode 100644 drivers/usb/dwc3/dwc3-generic.h
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 8fa56e1ac1..4576390ec7 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -28,11 +28,7 @@
#include <usb/xhci.h>
#include <asm/gpio.h>
-struct dwc3_glue_data {
- struct clk_bulk clks;
- struct reset_ctl_bulk resets;
- fdt_addr_t regs;
-};
+#include "dwc3-generic.h"
struct dwc3_generic_plat {
fdt_addr_t base;
@@ -275,12 +271,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
};
#endif
-struct dwc3_glue_ops {
- int (*glue_get_ctrl_dev)(struct udevice *parent, ofnode *node);
- void (*glue_configure)(struct udevice *dev, int index,
- enum usb_dr_mode mode);
-};
-
void dwc3_imx8mp_glue_configure(struct udevice *dev, int index,
enum usb_dr_mode mode)
{
@@ -464,7 +454,7 @@ static int dwc3_glue_bind_common(struct udevice *parent, ofnode node)
return 0;
}
-static int dwc3_glue_bind(struct udevice *parent)
+int dwc3_glue_bind(struct udevice *parent)
{
struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent);
ofnode node;
@@ -531,7 +521,7 @@ static int dwc3_glue_clk_init(struct udevice *dev,
return 0;
}
-static int dwc3_glue_probe(struct udevice *dev)
+int dwc3_glue_probe(struct udevice *dev)
{
struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
struct dwc3_glue_data *glue = dev_get_plat(dev);
@@ -597,7 +587,7 @@ static int dwc3_glue_probe(struct udevice *dev)
return 0;
}
-static int dwc3_glue_remove(struct udevice *dev)
+int dwc3_glue_remove(struct udevice *dev)
{
struct dwc3_glue_data *glue = dev_get_plat(dev);
diff --git a/drivers/usb/dwc3/dwc3-generic.h b/drivers/usb/dwc3/dwc3-generic.h
new file mode 100644
index 0000000000..824f678841
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-generic.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * dwc3-generic.h - Generic DWC3 Glue layer header
+ *
+ * Copyright (C) 2016 - 2018 Xilinx, Inc.
+ * Copyright (C) 2023 Socionext Inc.
+ */
+
+#ifndef __DRIVERS_USB_DWC3_GENERIC_H
+#define __DRIVERS_USB_DWC3_GENERIC_H
+
+#include <clk.h>
+#include <reset.h>
+#include <dwc3-uboot.h>
+
+struct dwc3_glue_data {
+ struct clk_bulk clks;
+ struct reset_ctl_bulk resets;
+ fdt_addr_t regs;
+};
+
+struct dwc3_glue_ops {
+ int (*glue_get_ctrl_dev)(struct udevice *parent, ofnode *node);
+ void (*glue_configure)(struct udevice *dev, int index,
+ enum usb_dr_mode mode);
+};
+
+int dwc3_glue_bind(struct udevice *parent);
+int dwc3_glue_probe(struct udevice *dev);
+int dwc3_glue_remove(struct udevice *dev);
+
+#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 05/12] usb: dwc3-generic: Add the size of regs property to glue structure
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (3 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 04/12] usb: dwc3-generic: Export glue structures and functions Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 06/12] usb: dwc3-uniphier: Use dwc3-generic instead of xhci-dwc3 Kunihiko Hayashi
` (6 subsequent siblings)
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
drivers/usb/dwc3/dwc3-generic.c | 2 +-
drivers/usb/dwc3/dwc3-generic.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 4576390ec7..acbf7acb19 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -542,7 +542,7 @@ int dwc3_glue_probe(struct udevice *dev)
phy.dev = NULL;
}
- glue->regs = dev_read_addr(dev);
+ glue->regs = dev_read_addr_size_index(dev, 0, &glue->size);
ret = dwc3_glue_clk_init(dev, glue);
if (ret)
diff --git a/drivers/usb/dwc3/dwc3-generic.h b/drivers/usb/dwc3/dwc3-generic.h
index 824f678841..40902c8923 100644
--- a/drivers/usb/dwc3/dwc3-generic.h
+++ b/drivers/usb/dwc3/dwc3-generic.h
@@ -17,6 +17,7 @@ struct dwc3_glue_data {
struct clk_bulk clks;
struct reset_ctl_bulk resets;
fdt_addr_t regs;
+ fdt_size_t size;
};
struct dwc3_glue_ops {
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 06/12] usb: dwc3-uniphier: Use dwc3-generic instead of xhci-dwc3
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (4 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 05/12] usb: dwc3-generic: Add the size of regs property to glue structure Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 07/12] reset: uniphier: Add USB glue reset support Kunihiko Hayashi
` (5 subsequent siblings)
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
drivers/usb/dwc3/Kconfig | 3 +-
drivers/usb/dwc3/dwc3-uniphier.c | 116 ++++++++++++++++++++-----------
2 files changed, 77 insertions(+), 42 deletions(-)
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index f010291d02..69801eeb81 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -55,7 +55,8 @@ config USB_DWC3_MESON_GXL
config USB_DWC3_UNIPHIER
bool "DesignWare USB3 Host Support on UniPhier Platforms"
- depends on ARCH_UNIPHIER && USB_XHCI_DWC3
+ depends on ARCH_UNIPHIER && USB_DWC3
+ select USB_DWC3_GENERIC
help
Support of USB2/3 functionality in Socionext UniPhier platforms.
Say 'Y' here if you have one such device.
diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c
index 54b52dcd66..ab85428a70 100644
--- a/drivers/usb/dwc3/dwc3-uniphier.c
+++ b/drivers/usb/dwc3/dwc3-uniphier.c
@@ -4,14 +4,17 @@
*
* Copyright (C) 2016-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*/
#include <dm.h>
-#include <dm/device_compat.h>
+#include <dm/lists.h>
#include <linux/bitops.h>
-#include <linux/errno.h>
-#include <linux/io.h>
-#include <linux/sizes.h>
+#include <linux/usb/gadget.h>
+
+#include "core.h"
+#include "gadget.h"
+#include "dwc3-generic.h"
#define UNIPHIER_PRO4_DWC3_RESET 0x40
#define UNIPHIER_PRO4_DWC3_RESET_XIOMMU BIT(5)
@@ -27,8 +30,11 @@
#define UNIPHIER_PXS2_DWC3_RESET 0x00
#define UNIPHIER_PXS2_DWC3_RESET_XLINK BIT(15)
-static int uniphier_pro4_dwc3_init(void __iomem *regs)
+static void uniphier_pro4_dwc3_init(struct udevice *dev, int index,
+ enum usb_dr_mode mode)
{
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
u32 tmp;
tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
@@ -36,11 +42,14 @@ static int uniphier_pro4_dwc3_init(void __iomem *regs)
tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);
- return 0;
+ unmap_physmem(regs, MAP_NOCACHE);
}
-static int uniphier_pro5_dwc3_init(void __iomem *regs)
+static void uniphier_pro5_dwc3_init(struct udevice *dev, int index,
+ enum usb_dr_mode mode)
{
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
u32 tmp;
tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET);
@@ -49,72 +58,97 @@ static int uniphier_pro5_dwc3_init(void __iomem *regs)
tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU;
writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET);
- return 0;
+ unmap_physmem(regs, MAP_NOCACHE);
}
-static int uniphier_pxs2_dwc3_init(void __iomem *regs)
+static void uniphier_pxs2_dwc3_init(struct udevice *dev, int index,
+ enum usb_dr_mode mode)
{
+ struct dwc3_glue_data *glue = dev_get_plat(dev);
+ void *regs = map_physmem(glue->regs, glue->size, MAP_NOCACHE);
u32 tmp;
tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET);
tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK;
writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET);
- return 0;
+ unmap_physmem(regs, MAP_NOCACHE);
}
-static int uniphier_dwc3_probe(struct udevice *dev)
+static int dwc3_uniphier_glue_get_ctrl_dev(struct udevice *dev, ofnode *node)
{
- fdt_addr_t base;
- void __iomem *regs;
- int (*init)(void __iomem *regs);
- int ret;
+ struct udevice *child;
+ const char *name;
+ ofnode subnode;
+
+ /*
+ * "controller reset" belongs to glue logic, and it should be
+ * accessible in .glue_configure() before access to the controller
+ * begins.
+ */
+ ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
+ name = ofnode_get_name(subnode);
+ if (!strncmp(name, "reset", 5))
+ device_bind_driver_to_node(dev, "uniphier-reset",
+ name, subnode, &child);
+ }
+
+ /* Get controller node that is placed separately from the glue node */
+ *node = ofnode_by_compatible(dev_ofnode(dev->parent),
+ "socionext,uniphier-dwc3");
- base = dev_read_addr(dev);
- if (base == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- regs = ioremap(base, SZ_32K);
- if (!regs)
- return -ENOMEM;
+ return 0;
+}
- init = (typeof(init))dev_get_driver_data(dev);
- ret = init(regs);
- if (ret)
- dev_err(dev, "failed to init glue layer\n");
+static const struct dwc3_glue_ops uniphier_pro4_dwc3_ops = {
+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
+ .glue_configure = uniphier_pro4_dwc3_init,
+};
- iounmap(regs);
+static const struct dwc3_glue_ops uniphier_pro5_dwc3_ops = {
+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
+ .glue_configure = uniphier_pro5_dwc3_init,
+};
- return ret;
-}
+static const struct dwc3_glue_ops uniphier_pxs2_dwc3_ops = {
+ .glue_get_ctrl_dev = dwc3_uniphier_glue_get_ctrl_dev,
+ .glue_configure = uniphier_pxs2_dwc3_init,
+};
static const struct udevice_id uniphier_dwc3_match[] = {
{
- .compatible = "socionext,uniphier-pro4-dwc3",
- .data = (ulong)uniphier_pro4_dwc3_init,
+ .compatible = "socionext,uniphier-pro4-dwc3-glue",
+ .data = (ulong)&uniphier_pro4_dwc3_ops,
+ },
+ {
+ .compatible = "socionext,uniphier-pro5-dwc3-glue",
+ .data = (ulong)&uniphier_pro5_dwc3_ops,
},
{
- .compatible = "socionext,uniphier-pro5-dwc3",
- .data = (ulong)uniphier_pro5_dwc3_init,
+ .compatible = "socionext,uniphier-pxs2-dwc3-glue",
+ .data = (ulong)&uniphier_pxs2_dwc3_ops,
},
{
- .compatible = "socionext,uniphier-pxs2-dwc3",
- .data = (ulong)uniphier_pxs2_dwc3_init,
+ .compatible = "socionext,uniphier-ld20-dwc3-glue",
+ .data = (ulong)&uniphier_pxs2_dwc3_ops,
},
{
- .compatible = "socionext,uniphier-ld20-dwc3",
- .data = (ulong)uniphier_pxs2_dwc3_init,
+ .compatible = "socionext,uniphier-pxs3-dwc3-glue",
+ .data = (ulong)&uniphier_pxs2_dwc3_ops,
},
{
- .compatible = "socionext,uniphier-pxs3-dwc3",
- .data = (ulong)uniphier_pxs2_dwc3_init,
+ .compatible = "socionext,uniphier-nx1-dwc3-glue",
+ .data = (ulong)&uniphier_pxs2_dwc3_ops,
},
{ /* sentinel */ }
};
-U_BOOT_DRIVER(usb_xhci) = {
+U_BOOT_DRIVER(dwc3_uniphier_wrapper) = {
.name = "uniphier-dwc3",
.id = UCLASS_SIMPLE_BUS,
.of_match = uniphier_dwc3_match,
- .probe = uniphier_dwc3_probe,
+ .bind = dwc3_glue_bind,
+ .probe = dwc3_glue_probe,
+ .remove = dwc3_glue_remove,
+ .plat_auto = sizeof(struct dwc3_glue_data),
};
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 07/12] reset: uniphier: Add USB glue reset support
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (5 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 06/12] usb: dwc3-uniphier: Use dwc3-generic instead of xhci-dwc3 Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 21:51 ` Marek Vasut
2023-02-01 1:13 ` [PATCH v2 08/12] clk: uniphier: Add missing USB SS-PHY clocks Kunihiko Hayashi
` (4 subsequent siblings)
11 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/reset/reset-uniphier.c | 78 +++++++++++++++++++++++++++++++++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 7adae51873..35e3ccebd7 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -2,6 +2,7 @@
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*/
#include <common.h>
@@ -9,6 +10,8 @@
#include <log.h>
#include <malloc.h>
#include <reset-uclass.h>
+#include <clk.h>
+#include <reset.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/io.h>
@@ -178,10 +181,17 @@ static const struct uniphier_reset_data uniphier_pro4_peri_reset_data[] = {
UNIPHIER_RESET_END,
};
+/* Glue reset data */
+static const struct uniphier_reset_data uniphier_pro4_usb3_reset_data[] = {
+ UNIPHIER_RESETX(15, 0, 15)
+};
+
/* core implementaton */
struct uniphier_reset_priv {
void __iomem *base;
const struct uniphier_reset_data *data;
+ struct clk_bulk clks;
+ struct reset_ctl_bulk rsts;
};
static int uniphier_reset_update(struct reset_ctl *reset_ctl, int assert)
@@ -233,10 +243,47 @@ static const struct reset_ops uniphier_reset_ops = {
.rst_deassert = uniphier_reset_deassert,
};
+static int uniphier_reset_rst_init(struct udevice *dev)
+{
+ struct uniphier_reset_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = reset_get_bulk(dev, &priv->rsts);
+ if (ret == -ENOSYS || ret == -ENOENT)
+ return 0;
+ else if (ret)
+ return ret;
+
+ ret = reset_deassert_bulk(&priv->rsts);
+ if (ret)
+ reset_release_bulk(&priv->rsts);
+
+ return ret;
+}
+
+static int uniphier_reset_clk_init(struct udevice *dev)
+{
+ struct uniphier_reset_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = clk_get_bulk(dev, &priv->clks);
+ if (ret == -ENOSYS || ret == -ENOENT)
+ return 0;
+ if (ret)
+ return ret;
+
+ ret = clk_enable_bulk(&priv->clks);
+ if (ret)
+ clk_release_bulk(&priv->clks);
+
+ return ret;
+}
+
static int uniphier_reset_probe(struct udevice *dev)
{
struct uniphier_reset_priv *priv = dev_get_priv(dev);
fdt_addr_t addr;
+ int ret;
addr = dev_read_addr(dev->parent);
if (addr == FDT_ADDR_T_NONE)
@@ -248,7 +295,11 @@ static int uniphier_reset_probe(struct udevice *dev)
priv->data = (void *)dev_get_driver_data(dev);
- return 0;
+ ret = uniphier_reset_clk_init(dev);
+ if (ret)
+ return ret;
+
+ return uniphier_reset_rst_init(dev);
}
static const struct udevice_id uniphier_reset_match[] = {
@@ -355,6 +406,31 @@ static const struct udevice_id uniphier_reset_match[] = {
.compatible = "socionext,uniphier-pxs3-peri-reset",
.data = (ulong)uniphier_pro4_peri_reset_data,
},
+ /* USB glue reset */
+ {
+ .compatible = "socionext,uniphier-pro4-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro5-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs2-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld20-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs3-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
+ {
+ .compatible = "socionext,uniphier-nx1-usb3-reset",
+ .data = (ulong)uniphier_pro4_usb3_reset_data,
+ },
{ /* sentinel */ }
};
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH v2 07/12] reset: uniphier: Add USB glue reset support
2023-02-01 1:13 ` [PATCH v2 07/12] reset: uniphier: Add USB glue reset support Kunihiko Hayashi
@ 2023-02-01 21:51 ` Marek Vasut
2023-02-02 5:38 ` Kunihiko Hayashi
0 siblings, 1 reply; 23+ messages in thread
From: Marek Vasut @ 2023-02-01 21:51 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> Add reset control support in USB glue logic. This needs to control
> the external clocks and resets for the logic before accessing the
> glue logic.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
With the very little knowledge I have of this platform:
Reviewed-by: Marek Vasut <marex@denx.de>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v2 07/12] reset: uniphier: Add USB glue reset support
2023-02-01 21:51 ` Marek Vasut
@ 2023-02-02 5:38 ` Kunihiko Hayashi
2023-02-02 12:54 ` Marek Vasut
0 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-02 5:38 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
Hi Marek,
On 2023/02/02 6:51, Marek Vasut wrote:
> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>> Add reset control support in USB glue logic. This needs to control
>> the external clocks and resets for the logic before accessing the
>> glue logic.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>
> With the very little knowledge I have of this platform:
> Reviewed-by: Marek Vasut <marex@denx.de>
I see. I should make some explanation.
The dm tree for usb is the following.
glue
+-- controller (need controller-reset)
+-- controller-reset (need syscon-reset)
+-- phy
The controller needs to deassert "controller-reset" in the glue.
The glue needs to deassert "syscon-reset".
The glue node itself doesn't have "resets" property, so
the controller-reset controls "syscon-reset" instead.
This patch adds the reset control for "controller-reset".
Thank you,
---
Best Regards
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH v2 07/12] reset: uniphier: Add USB glue reset support
2023-02-02 5:38 ` Kunihiko Hayashi
@ 2023-02-02 12:54 ` Marek Vasut
0 siblings, 0 replies; 23+ messages in thread
From: Marek Vasut @ 2023-02-02 12:54 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/2/23 06:38, Kunihiko Hayashi wrote:
> Hi Marek,
Hello Hayashi-san,
> On 2023/02/02 6:51, Marek Vasut wrote:
>> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>>> Add reset control support in USB glue logic. This needs to control
>>> the external clocks and resets for the logic before accessing the
>>> glue logic.
>>>
>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>
>> With the very little knowledge I have of this platform:
>> Reviewed-by: Marek Vasut <marex@denx.de>
>
> I see. I should make some explanation.
>
> The dm tree for usb is the following.
>
> glue
> +-- controller (need controller-reset)
> +-- controller-reset (need syscon-reset)
> +-- phy
>
> The controller needs to deassert "controller-reset" in the glue.
> The glue needs to deassert "syscon-reset".
>
> The glue node itself doesn't have "resets" property, so
> the controller-reset controls "syscon-reset" instead.
>
> This patch adds the reset control for "controller-reset".
Thank you for the clarification.
I think there are a few things which still require V3, but it is
starting to look very good.
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v2 08/12] clk: uniphier: Add missing USB SS-PHY clocks
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (6 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 07/12] reset: uniphier: Add USB glue reset support Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver Kunihiko Hayashi
` (3 subsequent siblings)
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
drivers/clk/uniphier/clk-uniphier-sys.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c
index ff5d364f59..3b8595fe61 100644
--- a/drivers/clk/uniphier/clk-uniphier-sys.c
+++ b/drivers/clk/uniphier/clk-uniphier-sys.c
@@ -28,7 +28,10 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = {
UNIPHIER_CLK_GATE_SIMPLE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */
UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */
UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */
+ UNIPHIER_CLK_RATE(17, 25000000), /* usb30-phy2 (PXs2) */
+ UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy3 (PXs2) */
UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */
+ UNIPHIER_CLK_RATE(21, 25000000), /* usb31-phy2 (PXs2) */
UNIPHIER_CLK_GATE_SIMPLE(24, 0x2108, 2), /* pcie (Pro5) */
{ /* sentinel */ }
#endif
@@ -44,6 +47,8 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = {
UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */
UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */
UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */
+ UNIPHIER_CLK_RATE(18, 25000000), /* usb30-phy2 (LD20) */
+ UNIPHIER_CLK_RATE(19, 25000000), /* usb30-phy3 (LD20) */
UNIPHIER_CLK_GATE_SIMPLE(24, 0x210c, 4), /* pcie */
{ /* sentinel */ }
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (7 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 08/12] clk: uniphier: Add missing USB SS-PHY clocks Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 21:54 ` Marek Vasut
2023-02-01 1:13 ` [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node Kunihiko Hayashi
` (2 subsequent siblings)
11 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
Add USB3 PHY driver support to control clocks and resets for the phy.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
configs/uniphier_v8_defconfig | 1 +
drivers/phy/socionext/Kconfig | 7 ++
drivers/phy/socionext/Makefile | 1 +
drivers/phy/socionext/phy-uniphier-usb3.c | 89 +++++++++++++++++++++++
4 files changed, 98 insertions(+)
create mode 100644 drivers/phy/socionext/phy-uniphier-usb3.c
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 6a0e2666cf..5cfa9fc01d 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -78,3 +78,4 @@ CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_UNIPHIER=y
CONFIG_PANIC_HANG=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+CONFIG_PHY_UNIPHIER_USB3=y
diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig
index bcd579e98e..fc63f4c042 100644
--- a/drivers/phy/socionext/Kconfig
+++ b/drivers/phy/socionext/Kconfig
@@ -10,3 +10,10 @@ config PHY_UNIPHIER_PCIE
help
Enable this to support PHY implemented in PCIe controller
on UniPhier SoCs.
+
+config PHY_UNIPHIER_USB3
+ bool "UniPhier USB3 PHY driver"
+ depends on PHY && ARCH_UNIPHIER
+ help
+ Enable this to support PHY implemented in USB3 controller
+ on UniPhier SoCs.
diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile
index 5484360b70..94d3aa68cf 100644
--- a/drivers/phy/socionext/Makefile
+++ b/drivers/phy/socionext/Makefile
@@ -4,3 +4,4 @@
#
obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o
+obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3.o
diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c
new file mode 100644
index 0000000000..a2e44a52c1
--- /dev/null
+++ b/drivers/phy/socionext/phy-uniphier-usb3.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * phy_uniphier_usb3.c - Socionext UniPhier Usb3 PHY driver
+ * Copyright 2019-2021 Socionext, Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+
+#include <clk.h>
+#include <reset.h>
+
+struct uniphier_usb3phy_priv {
+ struct clk_bulk clks;
+ struct reset_ctl_bulk rsts;
+};
+
+static int uniphier_usb3phy_init(struct phy *phy)
+{
+ struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev);
+ int ret;
+
+ ret = clk_enable_bulk(&priv->clks);
+ if (ret) {
+ clk_release_bulk(&priv->clks);
+ return ret;
+ }
+
+ ret = reset_deassert_bulk(&priv->rsts);
+ if (ret) {
+ reset_release_bulk(&priv->rsts);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int uniphier_usb3phy_probe(struct udevice *dev)
+{
+ struct uniphier_usb3phy_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = clk_get_bulk(dev, &priv->clks);
+ if (ret) {
+ if (ret != -ENOSYS && ret != -ENOENT) {
+ printf("Failed to get clocks\n");
+ return ret;
+ }
+ }
+
+ ret = reset_get_bulk(dev, &priv->rsts);
+ if (ret) {
+ if (ret != -ENOSYS && ret != -ENOENT) {
+ printf("Failed to get resets\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static struct phy_ops uniphier_usb3phy_ops = {
+ .init = uniphier_usb3phy_init,
+};
+
+static const struct udevice_id uniphier_usb3phy_ids[] = {
+ { .compatible = "socionext,uniphier-pro4-usb3-ssphy" },
+ { .compatible = "socionext,uniphier-pro5-usb3-hsphy" },
+ { .compatible = "socionext,uniphier-pro5-usb3-ssphy" },
+ { .compatible = "socionext,uniphier-pxs2-usb3-hsphy" },
+ { .compatible = "socionext,uniphier-pxs2-usb3-ssphy" },
+ { .compatible = "socionext,uniphier-ld20-usb3-hsphy" },
+ { .compatible = "socionext,uniphier-ld20-usb3-ssphy" },
+ { .compatible = "socionext,uniphier-pxs3-usb3-hsphy" },
+ { .compatible = "socionext,uniphier-pxs3-usb3-ssphy" },
+ { .compatible = "socionext,uniphier-nx1-usb3-hsphy" },
+ { .compatible = "socionext,uniphier-nx1-usb3-ssphy" },
+ { }
+};
+
+U_BOOT_DRIVER(uniphier_usb3_phy) = {
+ .name = "uniphier-usb3-phy",
+ .id = UCLASS_PHY,
+ .of_match = uniphier_usb3phy_ids,
+ .ops = &uniphier_usb3phy_ops,
+ .probe = uniphier_usb3phy_probe,
+ .priv_auto = sizeof(struct uniphier_usb3phy_priv),
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver
2023-02-01 1:13 ` [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver Kunihiko Hayashi
@ 2023-02-01 21:54 ` Marek Vasut
2023-02-02 5:13 ` Kunihiko Hayashi
0 siblings, 1 reply; 23+ messages in thread
From: Marek Vasut @ 2023-02-01 21:54 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> Add USB3 PHY driver support to control clocks and resets for the phy.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> configs/uniphier_v8_defconfig | 1 +
> drivers/phy/socionext/Kconfig | 7 ++
> drivers/phy/socionext/Makefile | 1 +
> drivers/phy/socionext/phy-uniphier-usb3.c | 89 +++++++++++++++++++++++
> 4 files changed, 98 insertions(+)
> create mode 100644 drivers/phy/socionext/phy-uniphier-usb3.c
>
> diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
> index 6a0e2666cf..5cfa9fc01d 100644
> --- a/configs/uniphier_v8_defconfig
> +++ b/configs/uniphier_v8_defconfig
> @@ -78,3 +78,4 @@ CONFIG_USB_DWC3=y
> CONFIG_USB_DWC3_UNIPHIER=y
> CONFIG_PANIC_HANG=y
> CONFIG_FDT_FIXUP_PARTITIONS=y
> +CONFIG_PHY_UNIPHIER_USB3=y
This should be in 12/12 patch, right ?
> diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig
> index bcd579e98e..fc63f4c042 100644
> --- a/drivers/phy/socionext/Kconfig
> +++ b/drivers/phy/socionext/Kconfig
> @@ -10,3 +10,10 @@ config PHY_UNIPHIER_PCIE
> help
> Enable this to support PHY implemented in PCIe controller
> on UniPhier SoCs.
> +
> +config PHY_UNIPHIER_USB3
> + bool "UniPhier USB3 PHY driver"
> + depends on PHY && ARCH_UNIPHIER
Maybe 'default y if SOMETHING' here, so you won't need to adjust defconfig ?
> + help
> + Enable this to support PHY implemented in USB3 controller
> + on UniPhier SoCs.
> diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile
> index 5484360b70..94d3aa68cf 100644
> --- a/drivers/phy/socionext/Makefile
> +++ b/drivers/phy/socionext/Makefile
> @@ -4,3 +4,4 @@
> #
>
> obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o
> +obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3.o
> diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c
> new file mode 100644
> index 0000000000..a2e44a52c1
> --- /dev/null
> +++ b/drivers/phy/socionext/phy-uniphier-usb3.c
> @@ -0,0 +1,89 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * phy_uniphier_usb3.c - Socionext UniPhier Usb3 PHY driver
> + * Copyright 2019-2021 Socionext, Inc.
2023 instead of 2021 .
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <generic-phy.h>
> +
> +#include <clk.h>
> +#include <reset.h>
> +
> +struct uniphier_usb3phy_priv {
> + struct clk_bulk clks;
> + struct reset_ctl_bulk rsts;
> +};
> +
> +static int uniphier_usb3phy_init(struct phy *phy)
> +{
> + struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev);
> + int ret;
> +
> + ret = clk_enable_bulk(&priv->clks);
> + if (ret) {
> + clk_release_bulk(&priv->clks);
> + return ret;
> + }
> +
> + ret = reset_deassert_bulk(&priv->rsts);
> + if (ret) {
> + reset_release_bulk(&priv->rsts);
You have to disable clock here too.
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int uniphier_usb3phy_probe(struct udevice *dev)
> +{
> + struct uniphier_usb3phy_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = clk_get_bulk(dev, &priv->clks);
> + if (ret) {
> + if (ret != -ENOSYS && ret != -ENOENT) {
> + printf("Failed to get clocks\n");
> + return ret;
> + }
> + }
> +
> + ret = reset_get_bulk(dev, &priv->rsts);
> + if (ret) {
> + if (ret != -ENOSYS && ret != -ENOENT) {
> + printf("Failed to get resets\n");
You have to release resets here too (use fail path, i.e. goto err_clock).
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
[...]
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver
2023-02-01 21:54 ` Marek Vasut
@ 2023-02-02 5:13 ` Kunihiko Hayashi
0 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-02 5:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
Hi Marek,
Thank you for reviewing.
On 2023/02/02 6:54, Marek Vasut wrote:
> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>> Add USB3 PHY driver support to control clocks and resets for the phy.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>> configs/uniphier_v8_defconfig | 1 +
>> drivers/phy/socionext/Kconfig | 7 ++
>> drivers/phy/socionext/Makefile | 1 +
>> drivers/phy/socionext/phy-uniphier-usb3.c | 89 +++++++++++++++++++++++
>> 4 files changed, 98 insertions(+)
>> create mode 100644 drivers/phy/socionext/phy-uniphier-usb3.c
>>
>> diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
>> index 6a0e2666cf..5cfa9fc01d 100644
>> --- a/configs/uniphier_v8_defconfig
>> +++ b/configs/uniphier_v8_defconfig
>> @@ -78,3 +78,4 @@ CONFIG_USB_DWC3=y
>> CONFIG_USB_DWC3_UNIPHIER=y
>> CONFIG_PANIC_HANG=y
>> CONFIG_FDT_FIXUP_PARTITIONS=y
>> +CONFIG_PHY_UNIPHIER_USB3=y
>
> This should be in 12/12 patch, right ?
Yes, this should be.
>> diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig
>> index bcd579e98e..fc63f4c042 100644
>> --- a/drivers/phy/socionext/Kconfig
>> +++ b/drivers/phy/socionext/Kconfig
>> @@ -10,3 +10,10 @@ config PHY_UNIPHIER_PCIE
>> help
>> Enable this to support PHY implemented in PCIe controller
>> on UniPhier SoCs.
>> +
>> +config PHY_UNIPHIER_USB3
>> + bool "UniPhier USB3 PHY driver"
>> + depends on PHY && ARCH_UNIPHIER
>
> Maybe 'default y if SOMETHING' here, so you won't need to adjust defconfig ?
OK. this phy is mandatory for the controller.
>> + help
>> + Enable this to support PHY implemented in USB3 controller
>> + on UniPhier SoCs.
>> diff --git a/drivers/phy/socionext/Makefile
>> b/drivers/phy/socionext/Makefile
>> index 5484360b70..94d3aa68cf 100644
>> --- a/drivers/phy/socionext/Makefile
>> +++ b/drivers/phy/socionext/Makefile
>> @@ -4,3 +4,4 @@
>> #
>>
>> obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o
>> +obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3.o
>> diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c
>> b/drivers/phy/socionext/phy-uniphier-usb3.c
>> new file mode 100644
>> index 0000000000..a2e44a52c1
>> --- /dev/null
>> +++ b/drivers/phy/socionext/phy-uniphier-usb3.c
>> @@ -0,0 +1,89 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * phy_uniphier_usb3.c - Socionext UniPhier Usb3 PHY driver
>> + * Copyright 2019-2021 Socionext, Inc.
>
> 2023 instead of 2021 .
I'll fix it.
>> + */
>> +
>> +#include <common.h>
>> +#include <dm.h>
>> +#include <generic-phy.h>
>> +
>> +#include <clk.h>
>> +#include <reset.h>
>> +
>> +struct uniphier_usb3phy_priv {
>> + struct clk_bulk clks;
>> + struct reset_ctl_bulk rsts;
>> +};
>> +
>> +static int uniphier_usb3phy_init(struct phy *phy)
>> +{
>> + struct uniphier_usb3phy_priv *priv = dev_get_priv(phy->dev);
>> + int ret;
>> +
>> + ret = clk_enable_bulk(&priv->clks);
>> + if (ret) {
>> + clk_release_bulk(&priv->clks);
>> + return ret;
>> + }
>> +
>> + ret = reset_deassert_bulk(&priv->rsts);
>> + if (ret) {
>> + reset_release_bulk(&priv->rsts);
>
> You have to disable clock here too.
Yes. I'll add it.
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int uniphier_usb3phy_probe(struct udevice *dev)
>> +{
>> + struct uniphier_usb3phy_priv *priv = dev_get_priv(dev);
>> + int ret;
>> +
>> + ret = clk_get_bulk(dev, &priv->clks);
>> + if (ret) {
>> + if (ret != -ENOSYS && ret != -ENOENT) {
>> + printf("Failed to get clocks\n");
>> + return ret;
>> + }
>> + }
>> +
>> + ret = reset_get_bulk(dev, &priv->rsts);
>> + if (ret) {
>> + if (ret != -ENOSYS && ret != -ENOENT) {
>> + printf("Failed to get resets\n");
>
> You have to release resets here too (use fail path, i.e. goto err_clock).
I see. I'll consider adding release or using "devm" function.
Thank you,
---
Best Regards
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (8 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 09/12] phy: socionext: Add UniPhier USB3 PHY driver Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 21:55 ` Marek Vasut
2023-02-01 1:13 ` [PATCH v2 11/12] ARM: dts: uniphier: Switch USB node to the original Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 12/12] uniphier_defconfig: Disable USB_XHCI_DWC3 Kunihiko Hayashi
11 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
The node name should follow the generic name list in DT specification.
This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
in the USB glue node.
And the node should have reg property to define the register region.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
arch/arm/dts/uniphier-pro4.dtsi | 7 ++++---
arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
5 files changed, 42 insertions(+), 35 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 4549935c42..21a431ab7f 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -765,11 +765,12 @@
usb-glue@65b00000 {
compatible = "socionext,uniphier-ld20-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65b00000 0x400>;
- usb_rst: reset@0 {
+ usb_rst: reset-controller@0 {
compatible = "socionext,uniphier-ld20-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -815,7 +816,7 @@
resets = <&sys_rst 14>;
};
- usb_hsphy0: hs-phy@200 {
+ usb_hsphy0: phy@200 {
compatible = "socionext,uniphier-ld20-usb3-hsphy";
reg = <0x200 0x10>;
#phy-cells = <0>;
@@ -829,7 +830,7 @@
<&usb_hs_i0>;
};
- usb_hsphy1: hs-phy@210 {
+ usb_hsphy1: phy@210 {
compatible = "socionext,uniphier-ld20-usb3-hsphy";
reg = <0x210 0x10>;
#phy-cells = <0>;
@@ -843,7 +844,7 @@
<&usb_hs_i0>;
};
- usb_hsphy2: hs-phy@220 {
+ usb_hsphy2: phy@220 {
compatible = "socionext,uniphier-ld20-usb3-hsphy";
reg = <0x220 0x10>;
#phy-cells = <0>;
@@ -857,7 +858,7 @@
<&usb_hs_i2>;
};
- usb_hsphy3: hs-phy@230 {
+ usb_hsphy3: phy@230 {
compatible = "socionext,uniphier-ld20-usb3-hsphy";
reg = <0x230 0x10>;
#phy-cells = <0>;
@@ -871,7 +872,7 @@
<&usb_hs_i2>;
};
- usb_ssphy0: ss-phy@300 {
+ usb_ssphy0: phy@300 {
compatible = "socionext,uniphier-ld20-usb3-ssphy";
reg = <0x300 0x10>;
#phy-cells = <0>;
@@ -882,7 +883,7 @@
vbus-supply = <&usb_vbus0>;
};
- usb_ssphy1: ss-phy@310 {
+ usb_ssphy1: phy@310 {
compatible = "socionext,uniphier-ld20-usb3-ssphy";
reg = <0x310 0x10>;
#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 9dae4e9b23..0e0a30ab40 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -521,6 +521,7 @@
usb-glue@65b00000 {
compatible = "socionext,uniphier-pro4-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65b00000 0x100>;
@@ -534,7 +535,7 @@
resets = <&sys_rst 12>, <&sys_rst 14>;
};
- usb0_ssphy: ss-phy@10 {
+ usb0_ssphy: phy@10 {
compatible = "socionext,uniphier-pro4-usb3-ssphy";
reg = <0x10 0x10>;
#phy-cells = <0>;
@@ -545,7 +546,7 @@
vbus-supply = <&usb0_vbus>;
};
- usb0_rst: reset@40 {
+ usb0_rst: reset-controller@40 {
compatible = "socionext,uniphier-pro4-usb3-reset";
reg = <0x40 0x4>;
#reset-cells = <1>;
@@ -606,7 +607,7 @@
resets = <&sys_rst 12>, <&sys_rst 15>;
};
- usb1_rst: reset@40 {
+ usb1_rst: reset-controller@40 {
compatible = "socionext,uniphier-pro4-usb3-reset";
reg = <0x40 0x4>;
#reset-cells = <1>;
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 19848e36fa..6122ee6164 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -483,11 +483,12 @@
usb-glue@65b00000 {
compatible = "socionext,uniphier-pro5-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65b00000 0x400>;
- usb0_rst: reset@0 {
+ usb0_rst: reset-controller@0 {
compatible = "socionext,uniphier-pro5-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -506,7 +507,7 @@
resets = <&sys_rst 12>, <&sys_rst 14>;
};
- usb0_hsphy0: hs-phy@280 {
+ usb0_hsphy0: phy@280 {
compatible = "socionext,uniphier-pro5-usb3-hsphy";
reg = <0x280 0x10>;
#phy-cells = <0>;
@@ -517,7 +518,7 @@
vbus-supply = <&usb0_vbus0>;
};
- usb0_ssphy0: ss-phy@380 {
+ usb0_ssphy0: phy@380 {
compatible = "socionext,uniphier-pro5-usb3-ssphy";
reg = <0x380 0x10>;
#phy-cells = <0>;
@@ -551,7 +552,7 @@
#size-cells = <1>;
ranges = <0 0x65d00000 0x400>;
- usb1_rst: reset@0 {
+ usb1_rst: reset-controller@0 {
compatible = "socionext,uniphier-pro5-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -579,7 +580,7 @@
resets = <&sys_rst 12>, <&sys_rst 15>;
};
- usb1_hsphy0: hs-phy@280 {
+ usb1_hsphy0: phy@280 {
compatible = "socionext,uniphier-pro5-usb3-hsphy";
reg = <0x280 0x10>;
#phy-cells = <0>;
@@ -590,7 +591,7 @@
vbus-supply = <&usb1_vbus0>;
};
- usb1_hsphy1: hs-phy@290 {
+ usb1_hsphy1: phy@290 {
compatible = "socionext,uniphier-pro5-usb3-hsphy";
reg = <0x290 0x10>;
#phy-cells = <0>;
@@ -601,7 +602,7 @@
vbus-supply = <&usb1_vbus1>;
};
- usb1_ssphy0: ss-phy@380 {
+ usb1_ssphy0: phy@380 {
compatible = "socionext,uniphier-pro5-usb3-ssphy";
reg = <0x380 0x10>;
#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 7a8b6c10f4..cafa14e22e 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -612,11 +612,12 @@
usb-glue@65b00000 {
compatible = "socionext,uniphier-pxs2-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65b00000 0x400>;
- usb0_rst: reset@0 {
+ usb0_rst: reset-controller@0 {
compatible = "socionext,uniphier-pxs2-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -644,7 +645,7 @@
resets = <&sys_rst 14>;
};
- usb0_hsphy0: hs-phy@200 {
+ usb0_hsphy0: phy@200 {
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
reg = <0x200 0x10>;
#phy-cells = <0>;
@@ -655,7 +656,7 @@
vbus-supply = <&usb0_vbus0>;
};
- usb0_hsphy1: hs-phy@210 {
+ usb0_hsphy1: phy@210 {
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
reg = <0x210 0x10>;
#phy-cells = <0>;
@@ -666,7 +667,7 @@
vbus-supply = <&usb0_vbus1>;
};
- usb0_ssphy0: ss-phy@300 {
+ usb0_ssphy0: phy@300 {
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
reg = <0x300 0x10>;
#phy-cells = <0>;
@@ -677,7 +678,7 @@
vbus-supply = <&usb0_vbus0>;
};
- usb0_ssphy1: ss-phy@310 {
+ usb0_ssphy1: phy@310 {
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
reg = <0x310 0x10>;
#phy-cells = <0>;
@@ -726,11 +727,12 @@
usb-glue@65d00000 {
compatible = "socionext,uniphier-pxs2-dwc3-glue",
"simple-mfd";
+ reg = <0x65d00000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65d00000 0x400>;
- usb1_rst: reset@0 {
+ usb1_rst: reset-controller@0 {
compatible = "socionext,uniphier-pxs2-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -758,7 +760,7 @@
resets = <&sys_rst 15>;
};
- usb1_hsphy0: hs-phy@200 {
+ usb1_hsphy0: phy@200 {
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
reg = <0x200 0x10>;
#phy-cells = <0>;
@@ -769,7 +771,7 @@
vbus-supply = <&usb1_vbus0>;
};
- usb1_hsphy1: hs-phy@210 {
+ usb1_hsphy1: phy@210 {
compatible = "socionext,uniphier-pxs2-usb3-hsphy";
reg = <0x210 0x10>;
#phy-cells = <0>;
@@ -780,7 +782,7 @@
vbus-supply = <&usb1_vbus1>;
};
- usb1_ssphy0: ss-phy@300 {
+ usb1_ssphy0: phy@300 {
compatible = "socionext,uniphier-pxs2-usb3-ssphy";
reg = <0x300 0x10>;
#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index 004656c992..1b0f49e00d 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -614,11 +614,12 @@
usb-glue@65b00000 {
compatible = "socionext,uniphier-pxs3-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65b00000 0x400>;
- usb0_rst: reset@0 {
+ usb0_rst: reset-controller@0 {
compatible = "socionext,uniphier-pxs3-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -646,7 +647,7 @@
resets = <&sys_rst 12>;
};
- usb0_hsphy0: hs-phy@200 {
+ usb0_hsphy0: phy@200 {
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
reg = <0x200 0x10>;
#phy-cells = <0>;
@@ -660,7 +661,7 @@
<&usb_hs_i0>;
};
- usb0_hsphy1: hs-phy@210 {
+ usb0_hsphy1: phy@210 {
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
reg = <0x210 0x10>;
#phy-cells = <0>;
@@ -674,7 +675,7 @@
<&usb_hs_i0>;
};
- usb0_ssphy0: ss-phy@300 {
+ usb0_ssphy0: phy@300 {
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
reg = <0x300 0x10>;
#phy-cells = <0>;
@@ -685,7 +686,7 @@
vbus-supply = <&usb0_vbus0>;
};
- usb0_ssphy1: ss-phy@310 {
+ usb0_ssphy1: phy@310 {
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
reg = <0x310 0x10>;
#phy-cells = <0>;
@@ -735,11 +736,12 @@
usb-glue@65d00000 {
compatible = "socionext,uniphier-pxs3-dwc3-glue",
"simple-mfd";
+ reg = <0x65b00000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x65d00000 0x400>;
- usb1_rst: reset@0 {
+ usb1_rst: reset-controller@0 {
compatible = "socionext,uniphier-pxs3-usb3-reset";
reg = <0x0 0x4>;
#reset-cells = <1>;
@@ -767,7 +769,7 @@
resets = <&sys_rst 13>;
};
- usb1_hsphy0: hs-phy@200 {
+ usb1_hsphy0: phy@200 {
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
reg = <0x200 0x10>;
#phy-cells = <0>;
@@ -782,7 +784,7 @@
<&usb_hs_i2>;
};
- usb1_hsphy1: hs-phy@210 {
+ usb1_hsphy1: phy@210 {
compatible = "socionext,uniphier-pxs3-usb3-hsphy";
reg = <0x210 0x10>;
#phy-cells = <0>;
@@ -797,7 +799,7 @@
<&usb_hs_i2>;
};
- usb1_ssphy0: ss-phy@300 {
+ usb1_ssphy0: phy@300 {
compatible = "socionext,uniphier-pxs3-usb3-ssphy";
reg = <0x300 0x10>;
#phy-cells = <0>;
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node
2023-02-01 1:13 ` [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node Kunihiko Hayashi
@ 2023-02-01 21:55 ` Marek Vasut
2023-02-02 5:13 ` Kunihiko Hayashi
0 siblings, 1 reply; 23+ messages in thread
From: Marek Vasut @ 2023-02-01 21:55 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> The node name should follow the generic name list in DT specification.
> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
> in the USB glue node.
>
> And the node should have reg property to define the register region.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
> arch/arm/dts/uniphier-pro4.dtsi | 7 ++++---
> arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
> arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
> arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
> 5 files changed, 42 insertions(+), 35 deletions(-)
I don't mind this patch, but would it make sense to later, in a separate
patch, synchronize the .dtsi with Linux kernel fully ?
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node
2023-02-01 21:55 ` Marek Vasut
@ 2023-02-02 5:13 ` Kunihiko Hayashi
2023-02-02 12:53 ` Marek Vasut
0 siblings, 1 reply; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-02 5:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
Hi Marek,
On 2023/02/02 6:55, Marek Vasut wrote:
> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>> The node name should follow the generic name list in DT specification.
>> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
>> in the USB glue node.
>>
>> And the node should have reg property to define the register region.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>> arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
>> arch/arm/dts/uniphier-pro4.dtsi | 7 ++++---
>> arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
>> arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
>> arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
>> 5 files changed, 42 insertions(+), 35 deletions(-)
>
> I don't mind this patch, but would it make sense to later, in a separate
> patch, synchronize the .dtsi with Linux kernel fully ?
I see.
I also think I should to synchronize the devicetree with Linux, so
I'll separate this patch from this series in the next.
Thank you,
---
Best Regards
Kunihiko Hayashi
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node
2023-02-02 5:13 ` Kunihiko Hayashi
@ 2023-02-02 12:53 ` Marek Vasut
0 siblings, 0 replies; 23+ messages in thread
From: Marek Vasut @ 2023-02-02 12:53 UTC (permalink / raw)
To: Kunihiko Hayashi, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot
On 2/2/23 06:13, Kunihiko Hayashi wrote:
> Hi Marek,
Hello Hayashi-san,
> On 2023/02/02 6:55, Marek Vasut wrote:
>> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>>> The node name should follow the generic name list in DT specification.
>>> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
>>> in the USB glue node.
>>>
>>> And the node should have reg property to define the register region.
>>>
>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>> ---
>>> arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
>>> arch/arm/dts/uniphier-pro4.dtsi | 7 ++++---
>>> arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
>>> arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
>>> arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
>>> 5 files changed, 42 insertions(+), 35 deletions(-)
>>
>> I don't mind this patch, but would it make sense to later, in a separate
>> patch, synchronize the .dtsi with Linux kernel fully ?
>
> I see.
>
> I also think I should to synchronize the devicetree with Linux, so
> I'll separate this patch from this series in the next.
I am fine if you do the full DT synchronization in a separate patch.
Feel free to keep this smaller DT update as part of this series to keep
the USB functional.
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v2 11/12] ARM: dts: uniphier: Switch USB node to the original
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (9 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
2023-02-01 1:13 ` [PATCH v2 12/12] uniphier_defconfig: Disable USB_XHCI_DWC3 Kunihiko Hayashi
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.
After switching USB node, synchronization of USB node with Linux becomes
possible.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/dts/uniphier-ld20.dtsi | 21 +----------------
arch/arm/dts/uniphier-pro4.dtsi | 42 ++-------------------------------
arch/arm/dts/uniphier-pxs2.dtsi | 42 ++-------------------------------
arch/arm/dts/uniphier-pxs3.dtsi | 42 ++-------------------------------
4 files changed, 7 insertions(+), 140 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 21a431ab7f..9155b39dfa 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -744,7 +744,7 @@
};
};
- _usb: usb@65a00000 {
+ usb: usb@65a00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
@@ -895,25 +895,6 @@
};
};
- /* FIXME: U-Boot own node */
- usb: usb@65b00000 {
- compatible = "socionext,uniphier-ld20-dwc3";
- reg = <0x65b00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>,
- <&pinctrl_usb2>, <&pinctrl_usb3>;
- dwc3@65a00000 {
- compatible = "snps,dwc3";
- reg = <0x65a00000 0x10000>;
- interrupts = <0 134 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
pcie: pcie@66000000 {
compatible = "socionext,uniphier-pcie", "snps,dw-pcie";
status = "disabled";
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 0e0a30ab40..3412c800e3 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -503,7 +503,7 @@
};
};
- _usb0: usb@65a00000 {
+ usb0: usb@65a00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
@@ -557,26 +557,7 @@
};
};
- /* FIXME: U-Boot own node */
- usb0: usb@65b00000 {
- compatible = "socionext,uniphier-pro4-dwc3";
- status = "disabled";
- reg = <0x65b00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0>;
- dwc3@65a00000 {
- compatible = "snps,dwc3";
- reg = <0x65a00000 0x10000>;
- interrupts = <0 134 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
- _usb1: usb@65c00000 {
+ usb1: usb@65c00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65c00000 0xcd00>;
@@ -618,25 +599,6 @@
};
};
- /* FIXME: U-Boot own node */
- usb1: usb@65d00000 {
- compatible = "socionext,uniphier-pro4-dwc3";
- status = "disabled";
- reg = <0x65d00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1>;
- dwc3@65c00000 {
- compatible = "snps,dwc3";
- reg = <0x65c00000 0x10000>;
- interrupts = <0 137 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index cafa14e22e..da855e3f71 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -593,7 +593,7 @@
};
};
- _usb0: usb@65a00000 {
+ usb0: usb@65a00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
@@ -690,26 +690,7 @@
};
};
- /* FIXME: U-Boot own node */
- usb0: usb@65b00000 {
- compatible = "socionext,uniphier-pxs2-dwc3";
- status = "disabled";
- reg = <0x65b00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
- dwc3@65a00000 {
- compatible = "snps,dwc3";
- reg = <0x65a00000 0x10000>;
- interrupts = <0 134 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
- _usb1: usb@65c00000 {
+ usb1: usb@65c00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65c00000 0xcd00>;
@@ -794,25 +775,6 @@
};
};
- /* FIXME: U-Boot own node */
- usb1: usb@65d00000 {
- compatible = "socionext,uniphier-pxs2-dwc3";
- status = "disabled";
- reg = <0x65d00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
- dwc3@65c00000 {
- compatible = "snps,dwc3";
- reg = <0x65c00000 0x10000>;
- interrupts = <0 137 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index 1b0f49e00d..059a66b782 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -595,7 +595,7 @@
};
};
- _usb0: usb@65a00000 {
+ usb0: usb@65a00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65a00000 0xcd00>;
@@ -698,26 +698,7 @@
};
};
- /* FIXME: U-Boot own node */
- usb0: usb@65b00000 {
- compatible = "socionext,uniphier-pxs3-dwc3";
- status = "disabled";
- reg = <0x65b00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
- dwc3@65a00000 {
- compatible = "snps,dwc3";
- reg = <0x65a00000 0x10000>;
- interrupts = <0 134 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
- _usb1: usb@65c00000 {
+ usb1: usb@65c00000 {
compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
reg = <0x65c00000 0xcd00>;
@@ -812,25 +793,6 @@
};
};
- /* FIXME: U-Boot own node */
- usb1: usb@65d00000 {
- compatible = "socionext,uniphier-pxs3-dwc3";
- status = "disabled";
- reg = <0x65d00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
- dwc3@65c00000 {
- compatible = "snps,dwc3";
- reg = <0x65c00000 0x10000>;
- interrupts = <0 137 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
- };
-
pcie: pcie@66000000 {
compatible = "socionext,uniphier-pcie", "snps,dw-pcie";
status = "disabled";
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH v2 12/12] uniphier_defconfig: Disable USB_XHCI_DWC3
2023-02-01 1:13 [PATCH v2 00/12] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier Kunihiko Hayashi
` (10 preceding siblings ...)
2023-02-01 1:13 ` [PATCH v2 11/12] ARM: dts: uniphier: Switch USB node to the original Kunihiko Hayashi
@ 2023-02-01 1:13 ` Kunihiko Hayashi
11 siblings, 0 replies; 23+ messages in thread
From: Kunihiko Hayashi @ 2023-02-01 1:13 UTC (permalink / raw)
To: Marek Vasut, Michal Simek, Sean Anderson, Angus Ainslie,
Lukasz Majewski, T Karthik Reddy, Jan Kiszka
Cc: u-boot, Kunihiko Hayashi
Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
configs/uniphier_v7_defconfig | 1 -
configs/uniphier_v8_defconfig | 1 -
2 files changed, 2 deletions(-)
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index d626968c76..03feb04b93 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -82,7 +82,6 @@ CONFIG_DM_SPI=y
CONFIG_UNIPHIER_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 5cfa9fc01d..93520e01a1 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -71,7 +71,6 @@ CONFIG_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
--
2.25.1
^ permalink raw reply related [flat|nested] 23+ messages in thread