From: Andrei Lalaev <andrey.lalaev@gmail.com>
To: Hiago De Franco <hfranco@baylibre.com>,
u-boot@lists.u-boot-project.org, Yao Zi <me@ziyao.cc>
Cc: Tom Rini <trini@konsulko.com>, Simon Glass <sjg@chromium.org>,
Alper Nebi Yasak <alpernebiyasak@gmail.com>,
Marek Vasut <marex@nabladev.com>,
Tim Ouyang <tim609@andestech.com>,
Leo Liang <leo.liang@sifive.com>,
Kongyang Liu <seashell11234455@gmail.com>,
Neha Malcom Francis <n-francis@ti.com>, Bin Liu <b-liu@ti.com>,
Quentin Schulz <quentin.schulz@cherry.de>,
Zhuxu Ran <zhuxu_ran@zohomail.com>, Udit Kumar <u-kumar1@ti.com>
Subject: Re: [PATCH 0/8] riscv: sophgo: add SPL support for the Milk-V Duo
Date: Sun, 25 Oct 2026 18:33:24 +0100 [thread overview]
Message-ID: <c8c19841-ed29-42df-bb64-b9161b57df39@gmail.com> (raw)
In-Reply-To: <20261021-milkv-duo-spl-v1-0-ee7618860237@baylibre.com>
Hi Hiago,
On 21.10.26 14:54, Hiago De Franco wrote:
> This series adds SPL support for the Milk-V Duo (Sophgo CV1800B, 64 MiB
> DDR2), so the board no longer needs the vendor FSBL to bring up DDR,
> configure the PLLs and hand off to OpenSBI and U-Boot proper.
>
> Currently this board only builds a bare u-boot.bin that depends on the
> vendor FSBL (and the vendor fiptool) to do all of the early hardware
> bring-up before U-Boot starts. With this series:
>
> - The SPL is loaded directly by the BootROM from fip.bin, built by a new
> binman entry type that reproduces the fiptool image layout (param1
> header + BL2 header) without depending on the vendor tool.
> - SPL enables the C906 caches and T-HEAD ISA extensions, brings up and
> trains the DDR2 controller/PHY, and initializes the PLLs, all ported
> from the Sophgo FSBL sources [1] (plat/cv180x).
> - SPL also takes over the RTC power domain configuration for shutdown,
> warm reset, power-cycle and watchdog reset, matching what the vendor
> FSBL used to configure.
> - SPL then loads the FIT image (OpenSBI, U-Boot and the DT) placed at
> offset 0x40000 of fip.bin via the BootROM ROMAPI, and hands off to
> OpenSBI, which starts U-Boot in S-mode.
> - Board documentation is updated.
>
> Tested by booting a Milk-V Duo board from an SD card (fip.bin on the FAT
> partition) built with this series (SPL -> OpenSBI -> U-Boot -> Linux).
>
> This series used the help of Claude Opus 5.5 to read the FSBL and turn
> it into U-Boot SPL.
>
> [1] https://github.com/sophgo/fsbl.git
>
> Signed-off-by: Hiago De Franco <hfranco@baylibre.com>
> ---
> Hiago De Franco (8):
> binman: add Sophgo CV18xx FIP entry type
> riscv: cv1800b: add SPL support
> ram: sophgo: add CV180x DDR2 driver
> board: sophgo: milkv_duo: add SPL support
> board: sophgo: milkv_duo: initialize PLLs in SPL
> board: sophgo: milkv_duo: enable RTC power and reset
> doc: board: sophgo: milkv_duo: update documentation
> doc: board: sophgo: milkv_duo: document the SPL boot flow
>
> arch/riscv/cpu/cv1800b/Kconfig | 2 +
> arch/riscv/cpu/cv1800b/Makefile | 4 +
> arch/riscv/cpu/cv1800b/spl.c | 31 +
> arch/riscv/dts/cv1800b-milkv-duo-u-boot.dtsi | 92 +++
> arch/riscv/include/asm/arch-cv1800b/rom_api.h | 36 ++
> board/sophgo/milkv_duo/Kconfig | 5 +
> board/sophgo/milkv_duo/MAINTAINERS | 6 +-
> board/sophgo/milkv_duo/Makefile | 1 +
> board/sophgo/milkv_duo/spl.c | 250 ++++++++
> configs/milkv_duo_defconfig | 18 +
> doc/board/sophgo/milkv_duo.rst | 76 ++-
> drivers/ram/Kconfig | 1 +
> drivers/ram/Makefile | 1 +
> drivers/ram/sophgo/Kconfig | 6 +
> drivers/ram/sophgo/Makefile | 6 +
> drivers/ram/sophgo/cv180x_ddr.c | 140 +++++
> drivers/ram/sophgo/cvx16_pinmux.c | 54 ++
> drivers/ram/sophgo/ddr_patch_regs.c | 39 ++
> drivers/ram/sophgo/ddr_pkg_info.c | 110 ++++
> drivers/ram/sophgo/ddr_sys.c | 635 +++++++++++++++++++++
> drivers/ram/sophgo/ddr_sys.h | 108 ++++
> drivers/ram/sophgo/ddrc_init.c | 476 +++++++++++++++
> drivers/ram/sophgo/phy_init.c | 193 +++++++
> tools/binman/etype/sophgo_cv18xx_fip.py | 89 +++
> tools/binman/ftest.py | 54 ++
> tools/binman/test/vendor/sophgo_cv18xx_fip.dts | 18 +
> .../test/vendor/sophgo_cv18xx_fip_bad_offset.dts | 16 +
> .../test/vendor/sophgo_cv18xx_fip_collection.dts | 19 +
> 28 files changed, 2454 insertions(+), 32 deletions(-)
> ---
> base-commit: a58e2b7af42c179ace2c6210de0a219fa3f3cf3c
> change-id: 20261017-milkv-duo-spl-2e2fae6858f1
> prerequisite-change-id: 20260929-milkv-duo-bootstd-14de5e4e03ef:v2
> prerequisite-patch-id: 0aaa37872f2b82c2abfc84364f9256c7cb3394fe
> prerequisite-patch-id: 927c8bc825dd9897467da6b194ae8c7c411ec874
> prerequisite-patch-id: 7c0fedb64aabab799b72eef81efc8becec8f44cd
>
> Best regards,
> --
> Hiago
>
Thank you for your work. Works as expected :)
For the whole series:
Tested-by: Andrei Lalaev <andrey.lalaev@gmail.com>
--
Best regards,
Andrei Lalaev
prev parent reply other threads:[~2026-10-25 19:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 12:54 [PATCH 0/8] riscv: sophgo: add SPL support for the Milk-V Duo Hiago De Franco
2026-10-21 12:54 ` [PATCH 1/8] binman: add Sophgo CV18xx FIP entry type Hiago De Franco
2026-11-03 14:54 ` Simon Glass
2026-10-21 12:54 ` [PATCH 2/8] riscv: cv1800b: add SPL support Hiago De Franco
2026-11-03 13:53 ` Yao Zi
2026-10-21 12:54 ` [PATCH 3/8] ram: sophgo: add CV180x DDR2 driver Hiago De Franco
2026-10-21 12:54 ` [PATCH 4/8] board: sophgo: milkv_duo: add SPL support Hiago De Franco
2026-11-04 3:56 ` Yao Zi
2026-10-21 12:54 ` [PATCH 5/8] board: sophgo: milkv_duo: initialize PLLs in SPL Hiago De Franco
2026-11-04 4:19 ` Yao Zi
2026-10-21 12:54 ` [PATCH 6/8] board: sophgo: milkv_duo: enable RTC power and reset Hiago De Franco
2026-11-03 17:31 ` João Paulo Gonçalves
2026-11-04 3:59 ` Yao Zi
2026-10-21 12:54 ` [PATCH 7/8] doc: board: sophgo: milkv_duo: update documentation Hiago De Franco
2026-10-21 12:54 ` [PATCH 8/8] doc: board: sophgo: milkv_duo: document the SPL boot flow Hiago De Franco
2026-10-25 17:33 ` Andrei Lalaev [this message]
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