From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board support
Date: Sat, 19 Sep 2020 21:18:34 +0200 [thread overview]
Message-ID: <eb7b5236-df96-a4ac-cfcc-7658b09c1a4c@gmail.com> (raw)
In-Reply-To: <TYBPR01MB5309C859F5340B84DE997CF3863C0@TYBPR01MB5309.jpnprd01.prod.outlook.com>
On 9/19/20 8:38 PM, Biju Das wrote:
[...]
>>>>> +int dram_init(void)
>>>>> +{
>>>>> +return fdtdec_setup_mem_size_base(); }
>>>>> +
>>>>> +int dram_init_banksize(void)
>>>>> +{
>>>>> +return fdtdec_setup_memory_banksize(); }
>>>>> +
>>>>> +void reset_cpu(ulong addr)
>>>>> +{
>>>>> +writel(RST_CODE, RST_CA57RESCNT);
>>>>> +}
>>>>
>>>> Isn't there CA53 core in the RZG2 too ?
>>>
>>> Yes, big little CPU 2xCA57 + 4 xCA53. Do you want me to add reset code for
>> in case of CA53 boot mode???
>>
>> I think if you can start U-Boot on either core, then the reset function should
>> handle both, yes.
>
> OK. Will fix this in V3.
Thanks
next prev parent reply other threads:[~2020-09-19 19:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-18 16:03 [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC Biju Das
2020-09-18 16:03 ` [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board support Biju Das
2020-09-19 2:48 ` Marek Vasut
2020-09-19 12:18 ` Biju Das
2020-09-19 13:04 ` Marek Vasut
2020-09-19 18:38 ` Biju Das
2020-09-19 19:18 ` Marek Vasut [this message]
2020-09-19 2:47 ` [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC Marek Vasut
2020-09-19 11:37 ` Biju Das
2020-09-19 13:00 ` Marek Vasut
2020-09-19 18:35 ` Biju Das
2020-09-19 19:18 ` Marek Vasut
2020-09-21 10:30 ` Biju Das
2020-09-21 16:23 ` Marek Vasut
2020-09-21 17:29 ` Biju Das
2020-09-22 6:08 ` Biju Das
2020-09-22 11:11 ` Biju Das
2020-09-22 13:11 ` Marek Vasut
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