From: Eric Auger <eric.auger@redhat.com>
To: Khushit Shah <khushit.shah@nutanix.com>
Cc: "eric.auger.pro@gmail.com" <eric.auger.pro@gmail.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
Shaju Abraham <shaju.abraham@nutanix.com>,
"yangjinqian1@huawei.com" <yangjinqian1@huawei.com>,
"cohuck@redhat.com" <cohuck@redhat.com>,
"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
"sebott@redhat.com" <sebott@redhat.com>,
"skolothumtho@nvidia.com" <skolothumtho@nvidia.com>,
"philmd@oss.qualcomm.com" <philmd@oss.qualcomm.com>,
"maz@kernel.org" <maz@kernel.org>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"armbru@redhat.com" <armbru@redhat.com>,
"berrange@redhat.com" <berrange@redhat.com>,
"abologna@redhat.com" <abologna@redhat.com>,
"jdenemar@redhat.com" <jdenemar@redhat.com>
Subject: Re: [PATCH v9 16/26] target/arm/kvm: Apply SYSREG props to the final vcpu
Date: Fri, 9 Oct 2026 12:02:15 +0200 [thread overview]
Message-ID: <00d6c513-b5ae-45d1-a31b-9729e2ca6451@redhat.com> (raw)
In-Reply-To: <9E461CD6-E877-495A-BC4F-FB3AA32CB198@nutanix.com>
On 10/8/26 11:45 AM, Khushit Shah wrote:
>
>> On 8 Oct 2026, at 1:22 PM, Eric Auger <eric.auger@redhat.com> wrote:
>>
>> !-------------------------------------------------------------------|
>> CAUTION: External Email
>>
>> |-------------------------------------------------------------------!
>>
>>
>>
>> On 9/30/26 9:54 AM, Khushit Shah wrote:
>>>> On 16 Sep 2026, at 8:15 PM, Eric Auger <eric.auger@redhat.com> wrote:
>>>>
>>>> !-------------------------------------------------------------------|
>>>> CAUTION: External Email
>>>>
>>>> |-------------------------------------------------------------------!
>>>>
>>>> SYSREG prop settings were recorded in a hashtable but they
>>>> are not yet injected on guest. Iterate over all set fields and
>>>> apply the new value through KVM_SET_ONE_REG. The new field
>>>> value overrides the current observable vcpu register value.
>>>>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>> ---
>>>> target/arm/kvm.c | 65 +++++++++++++++++++++++++++++++++++++++++
>>>> target/arm/trace-events | 1 +
>>>> 2 files changed, 66 insertions(+)
>>>>
>>>> diff --git a/target/arm/kvm.c b/target/arm/kvm.c
>>>> index 3ec2618cc1..ddf320d0e6 100644
>>>> --- a/target/arm/kvm.c
>>>> +++ b/target/arm/kvm.c
>>>> @@ -343,6 +343,9 @@ static ARM64SysRegField *get_field(int i, ARM64SysReg *reg)
>>>> #define MAKE_IDREG_KEY(reg_idx, field_shift) \
>>>> (((uint64_t)(reg_idx) << 8) | ((uint64_t)(field_shift) & 0xFF))
>>>>
>>>> +#define KEY_TO_REG_IDX(key) ((uint32_t)(((uint64_t)(key)) >> 8))
>>>> +#define KEY_TO_SHIFT(key) ((uint8_t)(((uint64_t)(key)) & 0xFF))
>>>> +
>>>> static void set_sysreg_prop(Object *obj, Visitor *v,
>>>> const char *name, void *opaque,
>>>> Error **errp)
>>>> @@ -2215,6 +2218,63 @@ int kvm_arch_pre_create_vcpu(CPUState *cpu, Error **errp)
>>>> return 0;
>>>> }
>>>>
>>>> +static int kvm_arm_apply_sysreg_props(ARMCPU *cpu, Error **errp)
>>>> +{
>>>> + uint64_t *idregs = cpu->isar.idregs;
>>>> + gpointer key_ptr, value_ptr;
>>>> + CPUState *cs = CPU(cpu);
>>>> + GHashTableIter iter;
>>>> +
>>>> + g_hash_table_iter_init(&iter, cpu->sysreg_props);
>>>> +
>>>> + while (g_hash_table_iter_next(&iter, &key_ptr, &value_ptr)) {
>>>> + uint64_t key = (uint64_t)key_ptr;
>>>> + uint64_t value = (uint64_t)value_ptr;
>>>> + uint32_t reg_idx = KEY_TO_REG_IDX(key);
>>>> + uint8_t lower = KEY_TO_SHIFT(key);
>>>> + ARM64SysReg *reg = &arm64_id_regs[reg_idx];
>>>> + struct kvm_one_reg kvm_reg;
>>>> + uint64_t current, old, mask;
>>>> + uint64_t kvm_idx;
>>>> + ARM64SysRegField *field = get_field(lower, reg);
>>>> + int length = field->length;
>>>> + uint64_t oldfv;
>>>> + int ret;
>>>> +
>>>> + mask = MAKE_64BIT_MASK(lower, length);
>>>> + value = value << lower;
>>>> +
>>>> + old = idregs[reg_idx];
>>>> +
>>>> + kvm_idx = idregs_sysreg_to_kvm_reg(id_register_sysreg[reg_idx]);
>>>> + ret = read_sys_reg64(cs->kvm_fd, ¤t, kvm_idx);
>>>> + if (ret) {
>>>> + error_setg(errp, "failed to read the current value of %s",
>>>> + reg->name);
>>>> + return ret;
>>>> + }
>>>> + oldfv = (current & mask) >> lower;
>>>> +
>>>> + idregs[reg_idx] = current & ~mask;
>>>> + idregs[reg_idx] |= value;
>>>> +
>>>> + kvm_reg.id = kvm_idx;
>>>> + kvm_reg.addr = (uintptr_t)&idregs[reg_idx];
>>>> +
>>>> + ret = ioctl(cs->kvm_fd, KVM_SET_ONE_REG, &kvm_reg);
>>>> + if (ret) {
>>>> + error_setg(errp, "failed to apply new value 0x%"PRIx64" for field %s.%s "
>>>> + "(previous is 0x%"PRIx64"): %m", idregs[reg_idx],
>>>> + reg->name, field->name, oldfv);
>>>> + return ret;
>>>> + }
>>> Hi Eric,
>>>
>>> The above is the only KVM-related code here. Can we split this into
>>> 1. Apply SYSREG_ props callback which resides in cpu64.c?
>>> 2. The previous writeback to cpregs function that writes back ID registers to KVM?
>> the problem is the previous method was copying all the idregs that
>> changed back to cpregs. But those idregs were populated from the "max"
>> vcpu which in some cases led to inconsistency with the final vcpu
>> setting. The setter now registers the new field value in a hash table.
>> Maybe we can just rely on an arch callback to apply them on the guest
>>
> Yes, this is what I am suggesting.
>
> What I was thinking is a KVM-specific code (kvm_arch_init_vcpu) will call callback to cpu64.c to set the property values after the vCPUs are init, and after the callback finishes, the values are written back to cpregs.
>
> With this the inconsistency problem does not arise as we will only call the callback after we properly setup the vCPU.
I have moved most of the code in cpu64, ie. hash table lookup and
cpu->isar.idregs[] update on success. The functional uses an
acceleration specific callback to apply the field value on guest vcpu.
However the arch agnostic function is still called in kvm so that the
kvmlist is synced to cpregs afterwards.
Let's see in v10 if it matches your expectations
Thanks
Eric
>
> FWIU, you are suggesting the same thing?
>
> Thanks,
> Khushit
>> Thanks
>>
>> Eric
>>> The reason being the SYSREG_ props otherwise do not work with any other accelerator.
>>> We are already trying to make the SYSREG_ getter/setter accel-agnostic.
>>>
>>> The above method still has the nicety that -cpu host without any SYSREG_ prop should
>>> behave the same as previous :)
>>>
>>> Side note:
>>> While we don’t target TCG support currently, I tried your v8 + named models on TCG
>>> (quick hack; ~20 LOC), and SYSREG_ props/named models works almost out of the box
>>> there (very minimal testing), which was cool.
>>>
>>> Thanks,
>>> Khushit
>>>
>>>> +
>>>> + trace_apply_sysreg_prop(reg->name, field->name, old, current,
>>>> + mask, value, idregs[reg_idx]);
>>>> + }
>>>> + return 0;
>>>> +}
>>>> +
>>>> int kvm_arch_init_vcpu(CPUState *cs, Error **errp)
>>>> {
>>>> int ret;
>>>> @@ -2315,6 +2375,11 @@ int kvm_arch_init_vcpu(CPUState *cs, Error **errp)
>>>> }
>>>> cpu->mp_affinity = mpidr & ARM64_AFFINITY_MASK;
>>>>
>>>> + ret = kvm_arm_apply_sysreg_props(cpu, errp);
>>>> + if (ret) {
>>>> + return ret;
>>>> + }
>>>> +
>>>> return kvm_arm_init_cpreg_list(cpu);
>>>> }
>>>>
>>>> diff --git a/target/arm/trace-events b/target/arm/trace-events
>>>> index d72ad6b671..b4d2b45a7d 100644
>>>> --- a/target/arm/trace-events
>>>> +++ b/target/arm/trace-events
>>>> @@ -18,6 +18,7 @@ kvm_arm_writable_idregs_to_cpreg_list(const char *name, uint64_t previous, uint6
>>>> decode_idreg_writemap(const char* name, int lower, int upper, char *prop_name) "%s [%d:%d] is writable (prop %s)"
>>>> get_sysreg_prop(const char *name, uint64_t value) "%s 0x%"PRIx64
>>>> set_sysreg_prop(const char *name, uint64_t old, uint64_t mask, uint64_t field_value, uint64_t new) "%s old reg value=0x%"PRIx64" mask=0x%"PRIx64" new field value=0x%"PRIx64" new reg value=0x%"PRIx64
>>>> +apply_sysreg_prop(const char *reg_name, const char *field_name, uint64_t old, uint64_t current, uint64_t mask, uint64_t field_value, uint64_t new) "%s.%s old=0x%"PRIx64" current=0x%"PRIx64" mask=0x%"PRIx64" new field value=0x%"PRIx64" new=0x%"PRIx64
>>>> nb_sysreg_props(const char *name, int count) "%s: %d SYSREG properties"
>>>>
>>>> # cpu.c
>>>> --
>>>> 2.53.0
>
next prev parent reply other threads:[~2026-10-09 10:03 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-16 14:45 [PATCH v9 00/26] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-09-16 14:45 ` [PATCH v9 01/26] scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py Eric Auger
2026-09-23 7:08 ` Khushit Shah
2026-09-23 14:22 ` Eric Auger
2026-09-24 10:24 ` Khushit Shah
2026-09-29 12:31 ` Eric Auger
2026-09-29 14:28 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 02/26] target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order Eric Auger
2026-09-16 14:45 ` [PATCH v9 03/26] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-09-23 9:13 ` Khushit Shah
2026-09-23 14:31 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 04/26] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2026-09-24 10:01 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 05/26] scripts: Introduce scripts/aarch64_sysreg_helpers module Eric Auger
2026-09-24 10:18 ` Khushit Shah
2026-09-24 10:23 ` Khushit Shah
2026-09-29 15:14 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 06/26] scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py Eric Auger
2026-09-25 9:29 ` Khushit Shah
2026-10-02 12:59 ` Eric Auger
2026-10-05 5:37 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 07/26] target/arm/cpu-idregs.h.inc: generate with script Eric Auger
2026-09-25 11:19 ` Khushit Shah
2026-09-29 16:55 ` Eric Auger
2026-09-30 5:40 ` Khushit Shah
2026-09-30 6:34 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 08/26] target/arm/cpu-idregs.h.inc: Generate enum values Eric Auger
2026-09-25 11:59 ` Khushit Shah
2026-10-02 16:05 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 09/26] target/arm/cpu_idregs: generate tables for Arm64 ID registers and fields Eric Auger
2026-09-25 12:16 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 10/26] target/arm/kvm: Retrieve writable ID reg map Eric Auger
2026-09-25 12:37 ` Khushit Shah
2026-09-28 12:34 ` Eric Auger
2026-09-28 13:23 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 11/26] hw/arm/virt: Make sure virt_get_caches() keeps on reading CLIDR_EL1 as 0 Eric Auger
2026-09-25 12:46 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 12/26] arm/kvm: Initialize isar.idregs[] with all writable host ID regs Eric Auger
2026-09-25 13:27 ` Khushit Shah
2026-09-28 17:34 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 13/26] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Eric Auger
2026-09-24 6:26 ` Khushit Shah
2026-09-24 6:42 ` Eric Auger
2026-09-28 15:21 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 14/26] target/arm/kvm: Implement SYSREG property setter and getter Eric Auger
2026-09-28 9:28 ` Khushit Shah
2026-09-28 11:49 ` Eric Auger
2026-09-28 13:20 ` Khushit Shah
2026-09-28 13:32 ` Eric Auger
2026-09-28 13:42 ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 15/26] target/arm/kvm: Pass an Error handle to kvm_arch_init_vcpu Eric Auger
2026-09-16 14:45 ` [PATCH v9 16/26] target/arm/kvm: Apply SYSREG props to the final vcpu Eric Auger
2026-09-28 10:44 ` Khushit Shah
2026-09-30 15:08 ` Eric Auger
2026-10-08 9:56 ` Khushit Shah
2026-09-30 15:11 ` Eric Auger
2026-09-30 7:54 ` Khushit Shah
2026-10-08 7:52 ` Eric Auger
2026-10-08 9:45 ` Khushit Shah
2026-10-09 10:02 ` Eric Auger [this message]
2026-09-16 14:45 ` [PATCH v9 17/26] target/arm/kvm: Add consistency checking for SYSREG props Eric Auger
2026-09-28 12:53 ` Khushit Shah
2026-09-29 12:13 ` Eric Auger
2026-09-30 7:34 ` Khushit Shah
2026-10-08 7:48 ` Eric Auger
2026-10-08 9:36 ` Khushit Shah
2026-10-08 16:36 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 18/26] target/arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model Eric Auger
2026-09-28 13:26 ` Khushit Shah
2026-09-28 13:35 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 19/26] target/arm/cpu-idregs.h.inc: Generate reserved fields Eric Auger
2026-09-16 14:45 ` [PATCH v9 20/26] target/arm/kvm: Ignore and trace unexpected writable " Eric Auger
2026-09-16 14:45 ` [PATCH v9 21/26] target/arm/kvm: add helper to test SYSREG props against a scratch vcpu Eric Auger
2026-09-28 13:34 ` Khushit Shah
2026-09-30 17:43 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 22/26] target/arm/kvm: Add an error handle to kvm_arm_create_scratch_host_vcpu Eric Auger
2026-09-16 14:45 ` [PATCH v9 23/26] target/arm/kvm: Introduce kvm_arm_vcpu_prepare_init_features helper Eric Auger
2026-09-16 14:45 ` [PATCH v9 24/26] target/arm/kvm: Introduce kvm_arm_create_init_scratch_vcpu() Eric Auger
2026-09-16 14:45 ` [PATCH v9 25/26] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-09-28 14:39 ` Khushit Shah
2026-10-07 14:27 ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 26/26] arm/cpu-features: document ID reg properties Eric Auger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=00d6c513-b5ae-45d1-a31b-9729e2ca6451@redhat.com \
--to=eric.auger@redhat.com \
--cc=abologna@redhat.com \
--cc=armbru@redhat.com \
--cc=berrange@redhat.com \
--cc=cohuck@redhat.com \
--cc=eric.auger.pro@gmail.com \
--cc=jdenemar@redhat.com \
--cc=khushit.shah@nutanix.com \
--cc=kvmarm@lists.linux.dev \
--cc=maz@kernel.org \
--cc=oliver.upton@linux.dev \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@oss.qualcomm.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=sebott@redhat.com \
--cc=shaju.abraham@nutanix.com \
--cc=skolothumtho@nvidia.com \
--cc=yangjinqian1@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.