All of lore.kernel.org
 help / color / mirror / Atom feed
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	kvmarm@lists.linux.dev, peter.maydell@linaro.org,
	shaju.abraham@nutanix.com, khushit.shah@nutanix.com,
	yangjinqian1@huawei.com, cohuck@redhat.com,
	richard.henderson@linaro.org, sebott@redhat.com,
	skolothumtho@nvidia.com, philmd@oss.qualcomm.com
Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,
	armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,
	jdenemar@redhat.com
Subject: [PATCH v9 21/26] target/arm/kvm: add helper to test SYSREG props against a scratch vcpu
Date: Wed, 16 Sep 2026 16:45:44 +0200	[thread overview]
Message-ID: <20260916144721.751810-22-eric.auger@redhat.com> (raw)
In-Reply-To: <20260916144721.751810-1-eric.auger@redhat.com>

Add kvm_idreg_write_scratch_vcpu helper that will be used
by qmp_query_cpu_model_expansion code to test SYSREG settings
against a scratch vcpu. Indeed when the expansion code is called
the actual vcpu has not been initialized so we use a scratch vcpu.
This latter has been initialized with features taken from
legacy compositive options (EL2, SVE, ...). So the trial is
very close to the final setup.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 target/arm/kvm_arm.h    |  4 ++++
 target/arm/kvm-stub.c   |  7 ++++++
 target/arm/kvm.c        | 51 +++++++++++++++++++++++++++++++++++++++++
 target/arm/trace-events |  1 +
 4 files changed, 63 insertions(+)

diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 2b3474cc36..bace69efed 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -14,6 +14,7 @@
 #include "qapi/qapi-types-misc-arm.h"
 #include "system/kvm.h"
 #include "target/arm/cpu-qom.h"
+#include "cpu-idregs.h"
 
 #define KVM_ARM_VGIC_V2   (1 << 0)
 #define KVM_ARM_VGIC_V3   (1 << 1)
@@ -250,4 +251,7 @@ void arm_gic_cap_kvm_probe(GICCapability *v2, GICCapability *v3);
  */
 char *kvm_print_register_name(uint64_t regidx);
 
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+                                  ARM64SysRegField *field, uint64_t newfv,
+                                  Error **errp);
 #endif
diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c
index 88cbe8d85c..8e6fae0a4d 100644
--- a/target/arm/kvm-stub.c
+++ b/target/arm/kvm-stub.c
@@ -119,3 +119,10 @@ char *kvm_print_register_name(uint64_t regidx)
 {
     g_assert_not_reached();
 }
+
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+                                  ARM64SysRegField *field, uint64_t newfv,
+                                  Error **errp)
+{
+    g_assert_not_reached();
+}
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 537673177a..f7ca0e0250 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -447,6 +447,57 @@ static bool kvm_arm_vcpu_validate_sysreg(ARMCPU *cpu, ARM64SysRegField *field,
 #define KEY_TO_REG_IDX(key)     ((uint32_t)(((uint64_t)(key)) >> 8))
 #define KEY_TO_SHIFT(key)       ((uint8_t)(((uint64_t)(key)) & 0xFF))
 
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+                                  ARM64SysRegField *field, uint64_t newfv,
+                                  Error **errp)
+{
+    uint64_t mask, old_reg_val, new_reg_val, oldfv;
+    struct kvm_one_reg reg;
+    int lower = field->shift;
+    int length = field->length;
+    int index = field->index;
+    uint64_t kidx;
+    int ret;
+
+    mask = MAKE_64BIT_MASK(lower, length);
+
+    if (!kvm_arm_vcpu_validate_sysreg(cpu, field, newfv, errp)) {
+        return false;
+    };
+
+    kidx = idregs_sysreg_to_kvm_reg(id_register_sysreg[index]);
+    ret = read_sys_reg64(cpufd, &old_reg_val, kidx);
+    if (ret) {
+        error_setg(errp, "failed to read the scratch vcpu value for field %s %m",
+                   field->name);
+        return false;
+    }
+    oldfv = (old_reg_val & mask) >> lower;
+
+    new_reg_val = old_reg_val & ~mask;
+    new_reg_val |= newfv << lower;
+
+    reg.id = kidx;
+    reg.addr = (uintptr_t)&new_reg_val;
+    ret = ioctl(cpufd, KVM_SET_ONE_REG, &reg);
+    if (ret) {
+        error_setg(errp, "failed to apply new value 0x%"PRIx64" for field %s "
+                   "(previous is 0x%"PRIx64"): %m", newfv, field->name, oldfv);
+        return false;
+    } else {
+        uint64_t check_val, actualfv;
+
+        ret = read_sys_reg64(cpufd, &check_val, kidx);
+        if (ret) {
+            error_setg(errp, "failed to read the new reg value: %m");
+            return false;
+        }
+        actualfv = (check_val & mask) >> lower;
+        trace_kvm_idreg_write_scratch_vcpu(field->name, oldfv, newfv, actualfv);
+    }
+    return true;
+}
+
 static void set_sysreg_prop(Object *obj, Visitor *v,
                             const char *name, void *opaque,
                             Error **errp)
diff --git a/target/arm/trace-events b/target/arm/trace-events
index 2a9cc67035..7a3f499a0e 100644
--- a/target/arm/trace-events
+++ b/target/arm/trace-events
@@ -21,6 +21,7 @@ set_sysreg_prop(const char *name, uint64_t old, uint64_t mask, uint64_t field_va
 apply_sysreg_prop(const char *reg_name, const char *field_name, uint64_t old, uint64_t current, uint64_t mask, uint64_t field_value, uint64_t new) "%s.%s old=0x%"PRIx64" current=0x%"PRIx64" mask=0x%"PRIx64" new field value=0x%"PRIx64" new=0x%"PRIx64
 nb_sysreg_props(const char *name, int count) "%s: %d SYSREG properties"
 unexpected_writable_reserved_field(const char *reg_name, const char *field_name, int lower, int upper) "Unexpected writable reserved field: %s.%s [%d,%d], skip it ..."
+kvm_idreg_write_scratch_vcpu(const char *name, uint64_t oldfv, uint64_t newfv, uint64_t actualfv) "successful dry-run for %s old=0x%"PRIx64" new=0x%"PRIx64" actual=0x%"PRIx64
 
 # cpu.c
 arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64
-- 
2.53.0



  parent reply	other threads:[~2026-09-16 14:50 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16 14:45 [PATCH v9 00/26] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-09-16 14:45 ` [PATCH v9 01/26] scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py Eric Auger
2026-09-23  7:08   ` Khushit Shah
2026-09-23 14:22     ` Eric Auger
2026-09-24 10:24   ` Khushit Shah
2026-09-29 12:31     ` Eric Auger
2026-09-29 14:28       ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 02/26] target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order Eric Auger
2026-09-16 14:45 ` [PATCH v9 03/26] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-09-23  9:13   ` Khushit Shah
2026-09-23 14:31     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 04/26] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2026-09-24 10:01   ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 05/26] scripts: Introduce scripts/aarch64_sysreg_helpers module Eric Auger
2026-09-24 10:18   ` Khushit Shah
2026-09-24 10:23     ` Khushit Shah
2026-09-29 15:14     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 06/26] scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py Eric Auger
2026-09-25  9:29   ` Khushit Shah
2026-10-02 12:59     ` Eric Auger
2026-10-05  5:37       ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 07/26] target/arm/cpu-idregs.h.inc: generate with script Eric Auger
2026-09-25 11:19   ` Khushit Shah
2026-09-29 16:55     ` Eric Auger
2026-09-30  5:40       ` Khushit Shah
2026-09-30  6:34         ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 08/26] target/arm/cpu-idregs.h.inc: Generate enum values Eric Auger
2026-09-25 11:59   ` Khushit Shah
2026-10-02 16:05     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 09/26] target/arm/cpu_idregs: generate tables for Arm64 ID registers and fields Eric Auger
2026-09-25 12:16   ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 10/26] target/arm/kvm: Retrieve writable ID reg map Eric Auger
2026-09-25 12:37   ` Khushit Shah
2026-09-28 12:34     ` Eric Auger
2026-09-28 13:23       ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 11/26] hw/arm/virt: Make sure virt_get_caches() keeps on reading CLIDR_EL1 as 0 Eric Auger
2026-09-25 12:46   ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 12/26] arm/kvm: Initialize isar.idregs[] with all writable host ID regs Eric Auger
2026-09-25 13:27   ` Khushit Shah
2026-09-28 17:34     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 13/26] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Eric Auger
2026-09-24  6:26   ` Khushit Shah
2026-09-24  6:42     ` Eric Auger
2026-09-28 15:21     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 14/26] target/arm/kvm: Implement SYSREG property setter and getter Eric Auger
2026-09-28  9:28   ` Khushit Shah
2026-09-28 11:49     ` Eric Auger
2026-09-28 13:20       ` Khushit Shah
2026-09-28 13:32         ` Eric Auger
2026-09-28 13:42           ` Khushit Shah
2026-09-16 14:45 ` [PATCH v9 15/26] target/arm/kvm: Pass an Error handle to kvm_arch_init_vcpu Eric Auger
2026-09-16 14:45 ` [PATCH v9 16/26] target/arm/kvm: Apply SYSREG props to the final vcpu Eric Auger
2026-09-28 10:44   ` Khushit Shah
2026-09-30 15:08     ` Eric Auger
2026-10-08  9:56       ` Khushit Shah
2026-09-30 15:11     ` Eric Auger
2026-09-30  7:54   ` Khushit Shah
2026-10-08  7:52     ` Eric Auger
2026-10-08  9:45       ` Khushit Shah
2026-10-09 10:02         ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 17/26] target/arm/kvm: Add consistency checking for SYSREG props Eric Auger
2026-09-28 12:53   ` Khushit Shah
2026-09-29 12:13     ` Eric Auger
2026-09-30  7:34   ` Khushit Shah
2026-10-08  7:48     ` Eric Auger
2026-10-08  9:36       ` Khushit Shah
2026-10-08 16:36         ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 18/26] target/arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model Eric Auger
2026-09-28 13:26   ` Khushit Shah
2026-09-28 13:35     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 19/26] target/arm/cpu-idregs.h.inc: Generate reserved fields Eric Auger
2026-09-16 14:45 ` [PATCH v9 20/26] target/arm/kvm: Ignore and trace unexpected writable " Eric Auger
2026-09-16 14:45 ` Eric Auger [this message]
2026-09-28 13:34   ` [PATCH v9 21/26] target/arm/kvm: add helper to test SYSREG props against a scratch vcpu Khushit Shah
2026-09-30 17:43     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 22/26] target/arm/kvm: Add an error handle to kvm_arm_create_scratch_host_vcpu Eric Auger
2026-09-16 14:45 ` [PATCH v9 23/26] target/arm/kvm: Introduce kvm_arm_vcpu_prepare_init_features helper Eric Auger
2026-09-16 14:45 ` [PATCH v9 24/26] target/arm/kvm: Introduce kvm_arm_create_init_scratch_vcpu() Eric Auger
2026-09-16 14:45 ` [PATCH v9 25/26] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-09-28 14:39   ` Khushit Shah
2026-10-07 14:27     ` Eric Auger
2026-09-16 14:45 ` [PATCH v9 26/26] arm/cpu-features: document ID reg properties Eric Auger

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260916144721.751810-22-eric.auger@redhat.com \
    --to=eric.auger@redhat.com \
    --cc=abologna@redhat.com \
    --cc=armbru@redhat.com \
    --cc=berrange@redhat.com \
    --cc=cohuck@redhat.com \
    --cc=eric.auger.pro@gmail.com \
    --cc=jdenemar@redhat.com \
    --cc=khushit.shah@nutanix.com \
    --cc=kvmarm@lists.linux.dev \
    --cc=maz@kernel.org \
    --cc=oliver.upton@linux.dev \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@oss.qualcomm.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=sebott@redhat.com \
    --cc=shaju.abraham@nutanix.com \
    --cc=skolothumtho@nvidia.com \
    --cc=yangjinqian1@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.