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From: "Jiawen Wu" <jiawenwu@trustnetic.com>
To: "'Russell King \(Oracle\)'" <linux@armlinux.org.uk>
Cc: "'Simon Horman'" <simon.horman@corigine.com>, <kabel@kernel.org>,
	<andrew@lunn.ch>, <hkallweit1@gmail.com>, <davem@davemloft.net>,
	<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
	<netdev@vger.kernel.org>
Subject: RE: [PATCH net] net: phy: marvell10g: fix 88x3310 power up
Date: Wed, 19 Jul 2023 11:53:31 +0800	[thread overview]
Message-ID: <019101d9b9f4$95cae080$c160a180$@trustnetic.com> (raw)
In-Reply-To: <017401d9b9e8$ddd1dd90$997598b0$@trustnetic.com>

> > Okay, so how about this for an alternative theory.
> >
> > The PHY is being probed, which places the PHY in power down mode.
> > Then your network driver (which?) gets probed, connects immediately
> > to the PHY, which attempts to power up the PHY - but maybe the PHY
> > hasn't finished powering down yet, and thus delays the powering up.
> >
> > However, according to the functional spec, placing the device in
> > power-down mode as we do is immediate.
> >
> > Please can you try experimenting with a delay in mv3310_config_init()
> > before the call to mv3310_power_up() to see whether that has any
> > beneficial effect?
> 
> I experimented with delays of 100ms to 1s, all reset timed out. Unfortunately,
> the theory doesn't seem to be true. :(

And I tried to add 100ms delay after mv3310_power_up() and before chip->get_mactype(phydev),
it showed that power down bit cleared while reading the reg in mv3310_get_mactype().
Then the reset executed successfully.


  reply	other threads:[~2023-07-19  3:55 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-12  6:26 [PATCH net] net: phy: marvell10g: fix 88x3310 power up Jiawen Wu
2023-07-13 10:26 ` Simon Horman
2023-07-13 10:35   ` Russell King (Oracle)
2023-07-13 10:45     ` Simon Horman
2023-07-13 10:53       ` Russell King (Oracle)
2023-07-13 11:30         ` Jiawen Wu
2023-07-13 11:41           ` Russell King (Oracle)
2023-07-13 11:50             ` Jiawen Wu
2023-07-17 10:51               ` Jiawen Wu
2023-07-17 12:22                 ` Russell King (Oracle)
2023-07-18  9:12                   ` Jiawen Wu
2023-07-18  9:49                     ` Russell King (Oracle)
2023-07-18  9:58                       ` Jiawen Wu
2023-07-18 11:47                         ` Russell King (Oracle)
2023-07-19  2:29                           ` Jiawen Wu
2023-07-19  3:53                             ` Jiawen Wu [this message]
2023-07-19  6:50                             ` Russell King (Oracle)
2023-07-19  7:57                               ` Jiawen Wu
2023-07-19  8:27                                 ` Russell King (Oracle)
2023-07-19  8:38                                   ` Jiawen Wu
2023-07-19  8:52                                     ` Russell King (Oracle)
2023-07-13 12:18         ` Simon Horman
2023-07-13 10:46 ` Russell King (Oracle)

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