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From: Simon Horman <simon.horman@corigine.com>
To: "Russell King (Oracle)" <linux@armlinux.org.uk>
Cc: Jiawen Wu <jiawenwu@trustnetic.com>,
	kabel@kernel.org, andrew@lunn.ch, hkallweit1@gmail.com,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, netdev@vger.kernel.org
Subject: Re: [PATCH net] net: phy: marvell10g: fix 88x3310 power up
Date: Thu, 13 Jul 2023 13:18:33 +0100	[thread overview]
Message-ID: <ZK/rmUFPTr2pPhNM@corigine.com> (raw)
In-Reply-To: <ZK/Xtg3df6n+Nj11@shell.armlinux.org.uk>

On Thu, Jul 13, 2023 at 11:53:42AM +0100, Russell King (Oracle) wrote:
> On Thu, Jul 13, 2023 at 11:45:59AM +0100, Simon Horman wrote:
> > On Thu, Jul 13, 2023 at 11:35:05AM +0100, Russell King (Oracle) wrote:
> > > On Thu, Jul 13, 2023 at 11:26:40AM +0100, Simon Horman wrote:
> > > > On Wed, Jul 12, 2023 at 02:26:34PM +0800, Jiawen Wu wrote:
> > > > > Clear MV_V2_PORT_CTRL_PWRDOWN bit to set power up for 88x3310 PHY,
> > > > > it sometimes does not take effect immediately. This will cause
> > > > > mv3310_reset() to time out, which will fail the config initialization.
> > > > > So add to poll PHY power up.
> > > > > 
> > > > > Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
> > > > 
> > > > Hi Jiawen Wu,
> > > > 
> > > > should this have the following?
> > > > 
> > > > Fixes: 0a5550b1165c ("bpftool: Use "fallthrough;" keyword instead of comments")
> > > 
> > > What is that commit? It doesn't appear to be in Linus' tree, it doesn't
> > > appear to be in the net tree, nor the net-next tree.
> > 
> > Hi Russell,
> > 
> > Sorry, it is bogus. Some sort of cut and paste error on my side
> > that pulled in the local commit of an unrelated patch.
> > 
> > What I should have said is:
> > 
> > Fixes: 8f48c2ac85ed ("net: marvell10g: soft-reset the PHY when coming out of low power")
> 
> Thanks, but I don't think that's appropriate either.
> 
> The commit adds a software reset after clearing the power down bit, but
> that doesn't have anything to do with mv3310_reset().
> 
> There are two places that mv3310_reset() is called, mv3310_config_mdix()
> and mv3310_set_edpd(). One of them is in the probe function, after we
> have powered up the PHY.
> 
> I think we need much more information from the reporter before we can
> guess which commit is a problem, if any.

Sure, it was just a suggestion from my side.

> When does the reset time out?
> What is the code path that we see mv3310_reset() timing out?
> Does the problem happen while resuming or probing?
> How soon after clearing the power down bit is mv3310_reset() called?

  parent reply	other threads:[~2023-07-13 12:18 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-12  6:26 [PATCH net] net: phy: marvell10g: fix 88x3310 power up Jiawen Wu
2023-07-13 10:26 ` Simon Horman
2023-07-13 10:35   ` Russell King (Oracle)
2023-07-13 10:45     ` Simon Horman
2023-07-13 10:53       ` Russell King (Oracle)
2023-07-13 11:30         ` Jiawen Wu
2023-07-13 11:41           ` Russell King (Oracle)
2023-07-13 11:50             ` Jiawen Wu
2023-07-17 10:51               ` Jiawen Wu
2023-07-17 12:22                 ` Russell King (Oracle)
2023-07-18  9:12                   ` Jiawen Wu
2023-07-18  9:49                     ` Russell King (Oracle)
2023-07-18  9:58                       ` Jiawen Wu
2023-07-18 11:47                         ` Russell King (Oracle)
2023-07-19  2:29                           ` Jiawen Wu
2023-07-19  3:53                             ` Jiawen Wu
2023-07-19  6:50                             ` Russell King (Oracle)
2023-07-19  7:57                               ` Jiawen Wu
2023-07-19  8:27                                 ` Russell King (Oracle)
2023-07-19  8:38                                   ` Jiawen Wu
2023-07-19  8:52                                     ` Russell King (Oracle)
2023-07-13 12:18         ` Simon Horman [this message]
2023-07-13 10:46 ` Russell King (Oracle)

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