Re: [PATCH v2 3/6] xen/riscv: make Svpbmt no longer a required extension

[Oleksii Kurochko <oleksii.kurochko@gmail.com>]

On 9/21/26 5:57 PM, Jan Beulich wrote:
> On 10.09.2026 11:34, Baptiste Le Duc wrote:
>> Without the Svpbmt extension, memory attributes (such as cacheability and
>> ordering) are strictly tied to physical address ranges and enforced by the
>> hardware's Physical Memory Attributes (PMA) checker.
>>
>> In this configuration, supervisor software relies on the platform's memory
>> map:
>>      - peripheral device registers (MMIO) are physically mapped into
>>        hardware-defined I/O regions (which are implicitly non-cacheable and
>>        strongly-ordered)
>>      - regular RAM is mapped as cacheable main memory.
>>
>> S-mode paging can safely map these physical ranges without specifying
>> page-based memory types in the PTEs, as the hardware MMU and PMA pipeline
>> will correctly bypass caches for MMIO accesses and use caches for RAM
>> accesses, based on the target physical address.
> Provided firmware got absolutely everything right.

Yes. S-mode has no standard way to discover PMAs, so it has to trust the
platform here. Note though that PMAs are in most implementations fixed
in hardware rather than programmed by M-mode firmware, so this is mostly
a matter of the platform's memory map being correct (and of the DT/ACPI
describing it correctly), which we rely on anyway.

> 
>> Furthermore, on platforms that either feature fully hardware-coherent DMA
>> or don't expose non-coherent DMA agents to the OS, page-level programmatic
>> cache control via Svpbmt is not required, making it safe to boot and run
>> when Svpbmt is absent.
> Yet a fully coherent platform should also be possible to somehow identify?

To some degree, yes, via firmware tables: on RISC-V DT devices are
treated as DMA-coherent unless marked with the "dma-noncoherent"
property, and with ACPI coherency is expressed via _CCA.

What matters for Svpbmt specifically is whether a non-coherent device
could be used at all: without Svpbmt no NC mapping can be established
through page tables, and without Zicbom there is no standard way to do
cache maintenance. If neither is available and the DT describes a
"dma-noncoherent" device, Xen will want to warn and refuse to assign 
such a device to a domain or something like that.

~ Oleksii