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From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: xen-devel@lists.xenproject.org, "Jan Beulich" <jbeulich@suse.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Julien Grall" <julien@xen.org>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Michal Orzel" <michal.orzel@amd.com>
Subject: Re: [PATCH v2 4/6] xen/riscv: make Zihintpause no longer a required extension
Date: Tue, 22 Sep 2026 16:50:12 +0200	[thread overview]
Message-ID: <69cdf366-06bc-4989-b060-935c9e0c8a4e@gmail.com> (raw)
In-Reply-To: <1789032898.8631fc262581453bbf619ec5b2062170.1a08aaba10f000c4f3@vates.tech>



On 9/10/26 11:34 AM, Baptiste Le Duc wrote:
> required_extensions[] panics at boot if Zihintpause is missing, but Xen
> never actually depends on it: cpu_relax() only emits the "pause" hint when
> the extension is implemented, otherwise it emits `0x0100000F`, a legally
> valid FENCE instruction (`FENCE W, 0`) rather than a native NOP. FENCE is
> guaranteed by the RISC-V base ISA, so it never raises an illegal
> instruction fault. With an empty successor set, it enforces no
> memory-ordering constraints and thus architecturally behaves as a NOP.
> 
> Drop it from required_extensions so hardware without Zihintpause
> still boots.
> 
> Assisted-by: Claude:claude-opus-5
> Signed-off-by: Baptiste Le Duc <baptiste.le-duc@vates.tech>
> ---
> Changes since v1:
> - rewrite commit message.
> ---
>   xen/arch/riscv/cpufeature.c | 1 -
>   1 file changed, 1 deletion(-)
> 
Please update also booting.txt?

Thanks.

~ Oleksii


  parent reply	other threads:[~2026-09-22 14:50 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-10  9:30 [PATCH v2 0/6] xen/riscv: fix boot on missing extensions and MMU setup bugs Baptiste Le Duc
2026-09-10  9:34 ` [PATCH v2 1/6] xen/riscv: fix Svade/Svadu A/D bit handling Baptiste Le Duc
2026-09-21 15:26   ` Jan Beulich
2026-09-21 17:03     ` Baptiste Le Duc
2026-09-22  6:24       ` Jan Beulich
2026-09-22  9:17         ` Baptiste Le Duc
2026-09-22 15:14           ` Oleksii Kurochko
2026-09-22 15:18             ` Baptiste Le Duc
2026-09-23  7:31           ` Oleksii Kurochko
2026-09-22 15:29   ` Oleksii Kurochko
2026-09-23 10:06     ` Baptiste Le Duc
2026-09-23 10:41       ` Oleksii Kurochko
2026-09-10  9:34 ` [PATCH v2 2/6] xen/riscv: set A/D bits in Xen's page-table mappings under Svade Baptiste Le Duc
2026-09-16  8:54   ` Zhang Zheng
2026-09-21 15:35   ` Jan Beulich
2026-09-22 15:05   ` Oleksii Kurochko
2026-09-10  9:34 ` [PATCH v2 3/6] xen/riscv: make Svpbmt no longer a required extension Baptiste Le Duc
2026-09-21 15:57   ` Jan Beulich
2026-09-22 14:38     ` Oleksii Kurochko
2026-09-28 13:21     ` Baptiste Le Duc
2026-09-22 14:48   ` Oleksii Kurochko
2026-09-10  9:34 ` [PATCH v2 4/6] xen/riscv: make Zihintpause " Baptiste Le Duc
2026-09-22 12:27   ` Jan Beulich
2026-09-22 14:26     ` Oleksii Kurochko
2026-09-22 15:10       ` Jan Beulich
2026-09-22 14:50   ` Oleksii Kurochko [this message]
2026-09-10  9:34 ` [PATCH v2 5/6] xen/riscv: flush speculatively cached Bare-mode TLB entries in turn_on_mmu() Baptiste Le Duc
2026-09-22 12:31   ` Jan Beulich
2026-09-22 14:21   ` Oleksii Kurochko
2026-09-10  9:34 ` [PATCH v2 6/6] xen/riscv: fix level_map_mask truncation on load_start Baptiste Le Duc
2026-09-16  8:54   ` Zhang Zheng
2026-09-22 12:43   ` Jan Beulich
2026-09-22 14:21   ` Oleksii Kurochko
2026-09-10  9:47 ` [PATCH v2 0/6] xen/riscv: fix boot on missing extensions and MMU setup bugs Jan Beulich
2026-09-10  9:56   ` Baptiste Le Duc

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