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From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: xen-devel@lists.xenproject.org,
	"Romain Caritey" <Romain.Caritey@microchip.com>,
	"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Julien Grall" <julien@xen.org>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>
Subject: Re: [PATCH v3 17/39] xen/riscv: add guest page fault handling stub
Date: Wed, 4 Nov 2026 12:33:51 +0100	[thread overview]
Message-ID: <0c5c754a-e072-4c95-9adb-85ad4ce5fddf@gmail.com> (raw)
In-Reply-To: <1792508386.8631fc262581453bbf619ec5b2062170.1a159d35ad4000f79f@vates.tech>



On 10/20/26 4:59 PM, Baptiste Le Duc wrote:
>> Add a handler for guest page faults and hook it into the trap path,
>> providing the trap-side entry point which will later feed the MMIO
>> dispatch.

Based on your comments below I will update here to:

  Add a handler for guest page faults and hook it into the trap path,
-providing the trap-side entry point which will later feed the MMIO
-dispatch.
+providing the trap-side entry point for the MMIO dispatch.

>>
>> This will be used, for example, to trap accesses to APLIC registers so
>> that a guest can initialize and drive an emulated interrupt controller.
>>
>> A G-stage (stage-2) fault has one of three causes, reported via scause:
>> - Fetch fault: guest tried to execute from a guest-physical address
>>    that is unmapped or that G-stage marks non-executable. Never
>>    emulatable (nothing to emulate a fetch into). On real hardware
>>    this raises an instruction access fault, so Xen reflects the same
>>    fault back to the guest. Decided here.
>>
>> - Load fault / Store fault: left undecided by this patch, this is
>>    where MMIO emulation will hook in later.
> Nit: should drop "in later" as it would be stale in the future. I'd
> suggest:
>    - Load fault / Store fault: this is where MMIO emulation will hook.
>      Not in scope of this patch.

I will re-use your option with small remark:

"this is where MMIO emulation *hooks in*. Not in scope of this patch."

'hooks in' instead of 'will hook'.

> 
>>
>> Any of these three faults can instead be reported via a pseudoinstruction
>> in htinst, when both:
>>
>> (a) the fault occurred on an implicit access Xen made to walk a
>>      VS-stage page table, and
> Xen doesn't access the VS-stage page tables here: the implicit access is
> done by the hardware page-table walker, while translating a guest access
> through the guest's VS-stage page tables. I'd suggest to use spec's
> wording. Moreover, "and" is not needed between both conditions as you said
> above "when both" which already indicates that both should be true.
> 
> Here is a proposition:
> ```
>      Any of these three faults can instead be reported via a
>      pseudoinstruction in htinst, when both:
>          (a) the fault is caused by an implicit memory access for VS-stage
>              address translation.
>          (b) htval holds a nonzero value: the guest-physical address of that
>              VS-stage PTE, not of the guest's original access.
> ```
This option better. I will use it.

>>
>> However, none of these paths consult the p2m first, and the future MMIO path
>> won't either: RISC-V has no populate-on-demand, no paging, and no
>> mem_access, so every guest mapping is established eagerly. A G-stage
>> fault therefore never indicates a mapping Xen could lazily resolve to
>> let the access complete.
>>
>> resolve_faulting_gpa() is a stub which always fails for now, so any guest
>> page fault other than one taken on an implicit access for VS-stage
>> translation currently crashes the domain. That one is reflected to the
>> guest through trap_redirect(), which is still a BUG_ON() placeholder
>> though, and so takes the host down. This is no worse than before this
>> patch, where these traps fell through to do_unexpected_trap() and die().
>>
>> Cache the "trap came from the guest" test in a local, as the guest page
>> fault case needs it too.
>>
>> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
>> +    default:
>> +        domain_crash(current->domain, "Impossible cause (%#lx) in %s?\n",
>> +                     gf->cause, __func__);
> Nit: please drop __func__, the message is unique enough to find where it
> comes from.

Agree, not to much sense. It will be dropped.

> 
>> +        return;
>> +    }
>> +
>> +    trap_redirect(&utrap);
>> +}
>> +
>> +void handle_guest_page_fault(struct cpu_user_regs *regs, unsigned long cause)
>> +{
>> +    struct guest_fault gf = {
>> +        .regs = regs,
>> +        .cause = cause,
>> +        .gpa = INVALID_PADDR,
>> +    };
>> +    int rc;
>> +
>> +    gf.htinst = csr_read(CSR_HTINST);
>> +    gf.htval = csr_read(CSR_HTVAL);
>> +    gf.stval = csr_read(CSR_STVAL);
>> +
>> +    /*
>> +     * A guest-page fault may arise due to an implicit memory access during
>> +     * first-stage (VS-stage) address translation, in which case a guest
>> +     * physical address written to htval is that of the implicit memory
>> +     * access that faulted - for example, the address of a VS-level page
>> +     * table entry that could not be read. (The guest physical address
>> +     * corresponding to the original virtual address is unknown when
>> +     * VS-stage translation fails to complete)
> Nit: I think this paragraph could be re-written by using what you said
> in the commit message.
> ```
>      htinst reports one of the special pseudoinstruction values when both:
>        (a) the fault is caused by an implicit memory access for VS-stage
>            address translation
>        (b) htval holds a nonzero value: the guest physical address of that
>            VS-stage PTE, not of the guest's original access, which is
>            unknown as VS-stage translation didn't complete.
> 
>      No access to emulate then: to match bare hardware behavior, inject an
>      access fault of the ORIGINAL access type (Instruction, Load, or
>      Store/AMO) that initiated the address translation.
> ```

I will use then your option.

> 
>> +     *
>> +     * In such cases htinst reports one of the pseudoinstructions recognized
>> +     * by htinst_is_pseudo(), and the fault requires separate handling (since
>> +     * G-stage translation failed on an unpopulated/unmapped guest physical
>> +     * address during a hardware page-table walk). To match bare hardware
>> +     * behavior, we must inject an access fault of the ORIGINAL access type
>> +     * (Instruction, Load, or Store/AMO) that initiated the address
>> +     * translation.
>> +     *
>> +     * FIXME: This assumes that guest page tables never reside in an emulated
>> +     * MMIO region, i.e. that an implicit access faulting at G-stage always
>> +     * targets an unpopulated GPA. Guests may (even transiently) place page
>> +     * tables in MMIO-backed memory, e.g. a video frame buffer. Supporting
>> +     * that would require walking the VS-stage page tables in software,
>> +     * accessing the PTEs (including A/D updates) through the MMIO handlers,
>> +     * and then emulating the original access, instead of injecting a fault.
>> +     */
>> +    if ( htinst_is_pseudo(gf.htinst) )
>> +    {
>> +        inject_access_fault(&gf);
>> +
>> +        return;
>> +    }
>> +
>> +    rc = resolve_faulting_gpa(&gf);
>> +    if ( rc )
>> +        goto out;
>> +
>> +    switch ( cause )
>> +    {
>> +    case CAUSE_LOAD_GUEST_PAGE_FAULT:
>> +        rc = emulate_load(&gf);
>> +        break;
>> +
>> +    case CAUSE_STORE_GUEST_PAGE_FAULT:
>> +        rc = emulate_store(&gf);
>> +        break;
>> +
>> +    case CAUSE_FETCH_GUEST_PAGE_FAULT:
>> +        /*
>> +         * Guest is trying to reach unmapped/unpopulated, or G-stage PTE doesn't
>> +         * allow execution (X=0). Generate fetch fault in this case.
>> +         */
>> +        inject_access_fault(&gf);
>> +        return;
>> +
>> +    default:
>> +        ASSERT_UNREACHABLE();
>> +        rc = -EOPNOTSUPP;
>> +
>> +        break;
>> +    }
>> +
>> + out:
>> +    if ( rc )
>> +        domain_crash(current->domain,
>> +                     "%s: unable to handle guest page fault (cause=%#lx) at gpa %#"PRIpaddr"\n",
>> +                     __func__, cause, gf.gpa);
> Probably __func__ can be dropped as the message is unique enough.

Agree with dropping of __func__.

> 
>> +}
>> diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c
>> @@ -193,6 +194,7 @@ void do_trap(struct cpu_user_regs *cpu_regs)
>>   {
>>       register_t pc = cpu_regs->sepc;
>>       unsigned long cause = csr_read(CSR_SCAUSE);
>> +    bool from_guest = cpu_regs->hstatus & HSTATUS_SPV;
>> @@ -275,3 +289,9 @@ enum mc_disposition arch_do_multicall_call(struct mc_state *state)
>> +
>> +/* Redirect trap to Guest. */
> This duplicates the comment on the prototype in traps.h, so I'd drop it
> here.
> 

Agree, it is enough to have the comment only in prototype.

Thanks!

~ Oleksii



  reply	other threads:[~2026-11-04 11:34 UTC|newest]

Thread overview: 152+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 16:18 [PATCH v3 00/39] [PATCH v2 00/39] [RISC-V] virtual interrupt controller (vAPLIC/vIMSIC) support Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 01/39] xen/riscv: drop INSN_{16,32}BIT_MASK and report unknown instruction lengths Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:35     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 02/39] xen/riscv: set the domain type for 64-bit kernel images Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:36     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 03/39] xen/riscv: introduce csr_volatile_read64() Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-09 13:29     ` Oleksii Kurochko
2026-10-08 14:46   ` Jan Beulich
2026-10-09 14:00     ` Oleksii Kurochko
2026-10-09 14:19       ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 04/39] xen/riscv: request a G-stage flush on vmenter when VMIDs are disabled Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:53     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 05/39] xen/riscv: use ~0 instead of ULONG_MAX to disable the VS-timer Oleksii Kurochko
2026-10-08 14:54   ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 06/39] xen/riscv: introduce device-agnostic MMIO emulation dispatch Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:57     ` Jan Beulich
2026-10-12 13:51       ` Oleksii Kurochko
2026-10-12 13:50     ` Oleksii Kurochko
2026-10-12 15:28   ` Jan Beulich
2026-10-14 10:51     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 07/39] xen/riscv: introduce CPU_NONE Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-12 14:27     ` Oleksii Kurochko
2026-10-12 15:40   ` Jan Beulich
2026-10-14 11:35     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 08/39] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-13 16:06     ` Oleksii Kurochko
2026-10-14  6:16       ` Jan Beulich
2026-10-14 11:45         ` Oleksii Kurochko
2026-10-14 13:52   ` Jan Beulich
2026-10-15 14:57     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 09/39] xen/riscv: build the target hart index via aplic_hart_index() Oleksii Kurochko
2026-10-06  9:02   ` Baptiste Le Duc
2026-10-14 13:42     ` Oleksii Kurochko
2026-10-14 14:03   ` Jan Beulich
2026-10-15  8:32     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 10/39] xen/riscv: add helper to check APLIC MSI mode Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 11/39] xen/riscv: implement vCPU context switching Oleksii Kurochko
2026-10-06 16:50   ` Baptiste Le Duc
2026-10-07  8:04     ` Jan Beulich
2026-10-07  8:27       ` Baptiste Le Duc
2026-10-14 14:05     ` Oleksii Kurochko
2026-11-10 15:52   ` Jan Beulich
2026-11-12 11:00     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 12/39] xen/riscv: save and restore vsiselect on vCPU context switch Oleksii Kurochko
2026-10-07  8:53   ` Baptiste Le Duc
2026-10-14 14:53     ` Oleksii Kurochko
2026-11-10 16:46     ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 13/39] xen/riscv: introduce vintc_ctxt_switch_{from,to}() Oleksii Kurochko
2026-10-07  9:11   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 14/39] xen/riscv: add IMSIC vCPU context switch handlers Oleksii Kurochko
2026-10-08  9:54   ` Baptiste Le Duc
2026-10-14 15:12     ` Oleksii Kurochko
2026-11-10 16:49   ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 15/39] xen/riscv: extend exception tables with type and data fields Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-04 11:00     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 16/39] xen/riscv: decouple INSN_PSEUDO_VS_* from the hypervisor's XLEN Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-10 16:52   ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 17/39] xen/riscv: add guest page fault handling stub Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-04 11:33     ` Oleksii Kurochko [this message]
2026-09-30 16:23 ` [PATCH v3 18/39] xen/riscv: implement trap redirection to a guest Oleksii Kurochko
2026-10-20 15:22   ` Baptiste Le Duc
     [not found]   ` <179250973602.489973.14893581320042795275.b4-review@b4>
2026-10-20 15:25     ` Baptiste Le Duc
2026-11-04 11:41       ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 19/39] xen/riscv: detect Shtvala Oleksii Kurochko
2026-10-20 15:26   ` Baptiste Le Duc
2026-11-10 16:53     ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 20/39] xen/riscv: resolve the faulting guest physical address Oleksii Kurochko
2026-10-21 11:45   ` Baptiste Le Duc
2026-11-04 11:49     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 21/39] xen/riscv: add guest memory read helper Oleksii Kurochko
2026-10-21 14:56   ` Baptiste Le Duc
2026-11-04 12:25     ` Oleksii Kurochko
2026-10-21 15:11   ` Baptiste Le Duc
2026-11-04 12:39     ` Oleksii Kurochko
2026-11-04 13:28       ` Jan Beulich
2026-11-04 15:25         ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 22/39] xen/riscv: look up the exception table for any trap taken in Xen context Oleksii Kurochko
2026-10-21 15:28   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 23/39] xen/riscv: add helpers for decoding a trapped load or store Oleksii Kurochko
2026-10-22 10:02   ` Baptiste Le Duc
2026-11-04 16:38     ` Oleksii Kurochko
2026-11-05  8:17       ` Jan Beulich
2026-11-05  8:48         ` Oleksii Kurochko
2026-11-05  9:35       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 24/39] xen/riscv: add guest load emulation for trapped MMIO accesses Oleksii Kurochko
2026-10-15 14:59   ` Oleksii Kurochko
2026-10-22 12:13     ` Baptiste Le Duc
2026-11-04 16:44       ` Oleksii Kurochko
2026-10-22 12:30     ` Baptiste Le Duc
2026-11-04 16:46       ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 25/39] xen/riscv: add guest store " Oleksii Kurochko
2026-10-22 12:37   ` Baptiste Le Duc
2026-11-04 16:51     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 26/39] xen/riscv: introduce arch_move_irqs() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 27/39] xen/riscv: handle the case when no vCPU migration is needed Oleksii Kurochko
2026-10-22 12:39   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 28/39] xen/riscv: introduce vaplic_reconfigure_target() Oleksii Kurochko
2026-10-22 13:38   ` Baptiste Le Duc
2026-11-05 11:43     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 29/39] xen/riscv: prepare new IMSIC VS-file Oleksii Kurochko
2026-10-23 12:55   ` Baptiste Le Duc
2026-11-05 12:49     ` Oleksii Kurochko
2026-11-05 15:27       ` Baptiste Le Duc
2026-11-05 16:41         ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 30/39] xen/riscv: implement APLIC-IMSIC-hart sync barrier for vCPU migration Oleksii Kurochko
2026-10-06 14:25   ` Oleksii Kurochko
2026-10-23 13:51     ` Baptiste Le Duc
2026-11-05 14:21       ` Oleksii Kurochko
2026-11-05 15:32         ` Baptiste Le Duc
2026-11-05 15:49           ` Oleksii Kurochko
2026-11-05 15:59             ` Baptiste Le Duc
2026-11-05 16:26               ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 31/39] xen/riscv: remap interrupts to new IMSIC VS-file Oleksii Kurochko
2026-10-26 14:06   ` Baptiste Le Duc
2026-11-05 16:57     ` Oleksii Kurochko
2026-11-06 13:26       ` Baptiste Le Duc
2026-11-09 10:19         ` Oleksii Kurochko
2026-11-09 15:01           ` Oleksii Kurochko
2026-11-09 15:22             ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 32/39] xen/riscv: save and clear the old IMSIC VS-file on vCPU migration Oleksii Kurochko
2026-11-03 16:02   ` Baptiste Le Duc
2026-11-06  9:52     ` Oleksii Kurochko
2026-11-06 13:31       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 33/39] xen/riscv: restore register state in the new IMSIC VS-file Oleksii Kurochko
2026-11-03 16:45   ` Baptiste Le Duc
2026-11-06 10:04     ` Oleksii Kurochko
2026-11-06 13:33       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 34/39] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 35/39] xen/riscv: wake up a descheduled vCPU on a guest external interrupt Oleksii Kurochko
2026-11-04 10:37   ` Baptiste Le Duc
2026-11-06 10:58     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 36/39] xen/riscv: map IMSIC interrupt file for vCPUs Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 37/39] xen/riscv: implement continue_new_vcpu() Oleksii Kurochko
2026-11-04 14:00   ` Baptiste Le Duc
2026-11-06 11:31     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 38/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL Oleksii Kurochko
2026-11-04 14:37   ` Baptiste Le Duc
2026-11-06 11:59     ` Oleksii Kurochko
2026-11-06 13:43       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 39/39] xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu Oleksii Kurochko
2026-11-04 15:06   ` Baptiste Le Duc
2026-11-06 12:31     ` Oleksii Kurochko

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