From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: xen-devel@lists.xenproject.org,
"Romain Caritey" <Romain.Caritey@microchip.com>,
"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Connor Davis" <connojdavis@gmail.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Jan Beulich" <jbeulich@suse.com>,
"Julien Grall" <julien@xen.org>,
"Roger Pau Monné" <roger@xenproject.org>,
"Stefano Stabellini" <sstabellini@kernel.org>
Subject: Re: [PATCH v3 38/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL
Date: Fri, 6 Nov 2026 12:59:57 +0100 [thread overview]
Message-ID: <ac014a57-5a77-41aa-a3e3-39e5764acf2f@gmail.com> (raw)
In-Reply-To: <1793803069.8631fc262581453bbf619ec5b2062170.1a1a6fea90d000403d@vates.tech>
On 11/4/26 3:37 PM, Baptiste Le Duc wrote:
>> [ ... 97 lines skipped ... ]
>> --- a/xen/arch/riscv/domain.c
>> +++ b/xen/arch/riscv/domain.c
>> @@ -51,6 +51,119 @@ static struct csr_masks __ro_after_init csr_masks;
>> #define HENVCFG_VALID_MASK 0xe0000003000000ffUL
>> #define HSTATEEN0_VALID_MASK 0xde00000000000007UL
>>
>> +/*
>> + * Return the hstatus.VSXL value encoding the guest's XLEN. Whether the
>> + * hardware can actually provide that width is a separate question, answered
>> + * by hstatus_vsxl_settable().
>> + *
>> + * The switch() deliberately has no default case, so that adding a new
>> + * domain_type (a 128-bit one, in particular) fails to build until this
>> + * mapping is updated.
>> + */
>> +unsigned int domain_vsxl(const struct domain *d)
>> +{
>> + switch ( d->type )
>> + {
>> + case DOMAIN_32BIT:
>> + return XLEN_FIELD_32;
>> +
>> + case DOMAIN_64BIT:
>> + return XLEN_FIELD_64;
> Couldn't we add to avoid having to explain why there is no default in
> the comment above, and to respect MISRA rules?
> default:
> break
I'd rather not: d->type is an enum, and for those Xen deliberately omits
the default label, as -Wall enables -Wswitch, which breaks the build
(-Werror) if one of the enum's values isn't handled. A default label
would silence exactly that check. MISRA-wise this is covered by the
R16.4 deviation for switches on enums.
I'll move the explanation into the switch() itself, though, and mention
-Wswitch there, which should make the intent clearer:
...
case DOMAIN_64BIT:
return XLEN_FIELD_64;
/*
* No default case: -Wswitch then fails the build should a new
* domain_type (a 128-bit one, in particular) be added without
* updating this mapping.
*/
}
...
>> + }
>> +
>> + ASSERT_UNREACHABLE();
>> +
>> + /* A reserved encoding, which hstatus_vsxl_settable() never accepts. */
>> + return 0;
> Could this get a name next to XLEN_FIELD_{32,64,128} in riscv_encoding.h,
> e.g.:
>
> #define XLEN_FIELD_RESERVED _UL(0)
> so the comment isn't the only thing explaining the 0?
Sure, I'll add XLEN_FIELD_RESERVED and return it there.
>> [ ... 88 lines skipped ... ]
>> +
>> void __init init_csr_masks(void)
>> {
>> /*
>> @@ -91,6 +204,10 @@ static void vcpu_csr_init(struct vcpu *v)
>> {
>> v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg;
>>
>> + /*
>> + * hstatus.VSXL is left zero here: the domain's type, and hence the
>> + * guest's XLEN, is only known once its kernel image has been probed.
>> + */
>
> "Probe" refers to two different things in this series: the hardware
> probe of the settable hstatus.VSXL values (init_hstatus_vsxl_settable_mask())
> and the guest kernel header parsing (kernel_probe()). This comment is
> about the latter, but it is easy to read it as the former, which already
> ran at boot. Could you name it explicitly and state the ordering that
> actually matters? I'd suggest:
>
> /*
> * hstatus.VSXL is left zero here: vCPU0 is created before
> * kernel_probe() reads the guest kernel header, so the domain's type,
> * and hence the guest's XLEN, is not known yet.
> */
>
Your suggested rewording looks good to me. I'll take your wording, and
name kernel_probe() in the commit message as well, which has the same
ambiguity.
Thanks.
~ Oleksii
next prev parent reply other threads:[~2026-11-06 12:00 UTC|newest]
Thread overview: 152+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 16:18 [PATCH v3 00/39] [PATCH v2 00/39] [RISC-V] virtual interrupt controller (vAPLIC/vIMSIC) support Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 01/39] xen/riscv: drop INSN_{16,32}BIT_MASK and report unknown instruction lengths Oleksii Kurochko
2026-10-05 10:01 ` Baptiste Le Duc
2026-10-08 14:35 ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 02/39] xen/riscv: set the domain type for 64-bit kernel images Oleksii Kurochko
2026-10-05 10:01 ` Baptiste Le Duc
2026-10-08 14:36 ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 03/39] xen/riscv: introduce csr_volatile_read64() Oleksii Kurochko
2026-10-05 10:01 ` Baptiste Le Duc
2026-10-09 13:29 ` Oleksii Kurochko
2026-10-08 14:46 ` Jan Beulich
2026-10-09 14:00 ` Oleksii Kurochko
2026-10-09 14:19 ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 04/39] xen/riscv: request a G-stage flush on vmenter when VMIDs are disabled Oleksii Kurochko
2026-10-05 10:01 ` Baptiste Le Duc
2026-10-08 14:53 ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 05/39] xen/riscv: use ~0 instead of ULONG_MAX to disable the VS-timer Oleksii Kurochko
2026-10-08 14:54 ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 06/39] xen/riscv: introduce device-agnostic MMIO emulation dispatch Oleksii Kurochko
2026-10-05 10:01 ` Baptiste Le Duc
2026-10-08 14:57 ` Jan Beulich
2026-10-12 13:51 ` Oleksii Kurochko
2026-10-12 13:50 ` Oleksii Kurochko
2026-10-12 15:28 ` Jan Beulich
2026-10-14 10:51 ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 07/39] xen/riscv: introduce CPU_NONE Oleksii Kurochko
2026-10-05 14:53 ` Baptiste Le Duc
2026-10-12 14:27 ` Oleksii Kurochko
2026-10-12 15:40 ` Jan Beulich
2026-10-14 11:35 ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 08/39] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-10-05 14:53 ` Baptiste Le Duc
2026-10-13 16:06 ` Oleksii Kurochko
2026-10-14 6:16 ` Jan Beulich
2026-10-14 11:45 ` Oleksii Kurochko
2026-10-14 13:52 ` Jan Beulich
2026-10-15 14:57 ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 09/39] xen/riscv: build the target hart index via aplic_hart_index() Oleksii Kurochko
2026-10-06 9:02 ` Baptiste Le Duc
2026-10-14 13:42 ` Oleksii Kurochko
2026-10-14 14:03 ` Jan Beulich
2026-10-15 8:32 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 10/39] xen/riscv: add helper to check APLIC MSI mode Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 11/39] xen/riscv: implement vCPU context switching Oleksii Kurochko
2026-10-06 16:50 ` Baptiste Le Duc
2026-10-07 8:04 ` Jan Beulich
2026-10-07 8:27 ` Baptiste Le Duc
2026-10-14 14:05 ` Oleksii Kurochko
2026-11-10 15:52 ` Jan Beulich
2026-11-12 11:00 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 12/39] xen/riscv: save and restore vsiselect on vCPU context switch Oleksii Kurochko
2026-10-07 8:53 ` Baptiste Le Duc
2026-10-14 14:53 ` Oleksii Kurochko
2026-11-10 16:46 ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 13/39] xen/riscv: introduce vintc_ctxt_switch_{from,to}() Oleksii Kurochko
2026-10-07 9:11 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 14/39] xen/riscv: add IMSIC vCPU context switch handlers Oleksii Kurochko
2026-10-08 9:54 ` Baptiste Le Duc
2026-10-14 15:12 ` Oleksii Kurochko
2026-11-10 16:49 ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 15/39] xen/riscv: extend exception tables with type and data fields Oleksii Kurochko
2026-10-20 14:59 ` Baptiste Le Duc
2026-11-04 11:00 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 16/39] xen/riscv: decouple INSN_PSEUDO_VS_* from the hypervisor's XLEN Oleksii Kurochko
2026-10-20 14:59 ` Baptiste Le Duc
2026-11-10 16:52 ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 17/39] xen/riscv: add guest page fault handling stub Oleksii Kurochko
2026-10-20 14:59 ` Baptiste Le Duc
2026-11-04 11:33 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 18/39] xen/riscv: implement trap redirection to a guest Oleksii Kurochko
2026-10-20 15:22 ` Baptiste Le Duc
[not found] ` <179250973602.489973.14893581320042795275.b4-review@b4>
2026-10-20 15:25 ` Baptiste Le Duc
2026-11-04 11:41 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 19/39] xen/riscv: detect Shtvala Oleksii Kurochko
2026-10-20 15:26 ` Baptiste Le Duc
2026-11-10 16:53 ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 20/39] xen/riscv: resolve the faulting guest physical address Oleksii Kurochko
2026-10-21 11:45 ` Baptiste Le Duc
2026-11-04 11:49 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 21/39] xen/riscv: add guest memory read helper Oleksii Kurochko
2026-10-21 14:56 ` Baptiste Le Duc
2026-11-04 12:25 ` Oleksii Kurochko
2026-10-21 15:11 ` Baptiste Le Duc
2026-11-04 12:39 ` Oleksii Kurochko
2026-11-04 13:28 ` Jan Beulich
2026-11-04 15:25 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 22/39] xen/riscv: look up the exception table for any trap taken in Xen context Oleksii Kurochko
2026-10-21 15:28 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 23/39] xen/riscv: add helpers for decoding a trapped load or store Oleksii Kurochko
2026-10-22 10:02 ` Baptiste Le Duc
2026-11-04 16:38 ` Oleksii Kurochko
2026-11-05 8:17 ` Jan Beulich
2026-11-05 8:48 ` Oleksii Kurochko
2026-11-05 9:35 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 24/39] xen/riscv: add guest load emulation for trapped MMIO accesses Oleksii Kurochko
2026-10-15 14:59 ` Oleksii Kurochko
2026-10-22 12:13 ` Baptiste Le Duc
2026-11-04 16:44 ` Oleksii Kurochko
2026-10-22 12:30 ` Baptiste Le Duc
2026-11-04 16:46 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 25/39] xen/riscv: add guest store " Oleksii Kurochko
2026-10-22 12:37 ` Baptiste Le Duc
2026-11-04 16:51 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 26/39] xen/riscv: introduce arch_move_irqs() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 27/39] xen/riscv: handle the case when no vCPU migration is needed Oleksii Kurochko
2026-10-22 12:39 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 28/39] xen/riscv: introduce vaplic_reconfigure_target() Oleksii Kurochko
2026-10-22 13:38 ` Baptiste Le Duc
2026-11-05 11:43 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 29/39] xen/riscv: prepare new IMSIC VS-file Oleksii Kurochko
2026-10-23 12:55 ` Baptiste Le Duc
2026-11-05 12:49 ` Oleksii Kurochko
2026-11-05 15:27 ` Baptiste Le Duc
2026-11-05 16:41 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 30/39] xen/riscv: implement APLIC-IMSIC-hart sync barrier for vCPU migration Oleksii Kurochko
2026-10-06 14:25 ` Oleksii Kurochko
2026-10-23 13:51 ` Baptiste Le Duc
2026-11-05 14:21 ` Oleksii Kurochko
2026-11-05 15:32 ` Baptiste Le Duc
2026-11-05 15:49 ` Oleksii Kurochko
2026-11-05 15:59 ` Baptiste Le Duc
2026-11-05 16:26 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 31/39] xen/riscv: remap interrupts to new IMSIC VS-file Oleksii Kurochko
2026-10-26 14:06 ` Baptiste Le Duc
2026-11-05 16:57 ` Oleksii Kurochko
2026-11-06 13:26 ` Baptiste Le Duc
2026-11-09 10:19 ` Oleksii Kurochko
2026-11-09 15:01 ` Oleksii Kurochko
2026-11-09 15:22 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 32/39] xen/riscv: save and clear the old IMSIC VS-file on vCPU migration Oleksii Kurochko
2026-11-03 16:02 ` Baptiste Le Duc
2026-11-06 9:52 ` Oleksii Kurochko
2026-11-06 13:31 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 33/39] xen/riscv: restore register state in the new IMSIC VS-file Oleksii Kurochko
2026-11-03 16:45 ` Baptiste Le Duc
2026-11-06 10:04 ` Oleksii Kurochko
2026-11-06 13:33 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 34/39] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 35/39] xen/riscv: wake up a descheduled vCPU on a guest external interrupt Oleksii Kurochko
2026-11-04 10:37 ` Baptiste Le Duc
2026-11-06 10:58 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 36/39] xen/riscv: map IMSIC interrupt file for vCPUs Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 37/39] xen/riscv: implement continue_new_vcpu() Oleksii Kurochko
2026-11-04 14:00 ` Baptiste Le Duc
2026-11-06 11:31 ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 38/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL Oleksii Kurochko
2026-11-04 14:37 ` Baptiste Le Duc
2026-11-06 11:59 ` Oleksii Kurochko [this message]
2026-11-06 13:43 ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 39/39] xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu Oleksii Kurochko
2026-11-04 15:06 ` Baptiste Le Duc
2026-11-06 12:31 ` Oleksii Kurochko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ac014a57-5a77-41aa-a3e3-39e5764acf2f@gmail.com \
--to=oleksii.kurochko@gmail.com \
--cc=Romain.Caritey@microchip.com \
--cc=alistair.francis@wdc.com \
--cc=andrew.cooper3@citrix.com \
--cc=anthony.perard@vates.tech \
--cc=baptiste.le-duc@vates.tech \
--cc=connojdavis@gmail.com \
--cc=jbeulich@suse.com \
--cc=julien@xen.org \
--cc=michal.orzel@amd.com \
--cc=roger@xenproject.org \
--cc=sstabellini@kernel.org \
--cc=xen-devel@lists.xenproject.org \
--cc=zhangzheng@iscas.ac.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.