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From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Baptiste Le Duc <baptiste.le-duc@vates.tech>
Cc: xen-devel@lists.xenproject.org,
	"Romain Caritey" <Romain.Caritey@microchip.com>,
	"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Julien Grall" <julien@xen.org>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>
Subject: Re: [PATCH v3 33/39] xen/riscv: restore register state in the new IMSIC VS-file
Date: Fri, 6 Nov 2026 11:04:25 +0100	[thread overview]
Message-ID: <8a546a01-9d3f-4d63-bb56-658d635fed33@gmail.com> (raw)
In-Reply-To: <1793724321.8631fc262581453bbf619ec5b2062170.1a1a24d1057000403d@vates.tech>



On 11/3/26 5:45 PM, Baptiste Le Duc wrote:
>> Complete the migration of a vCPU's guest interrupt file: move the state
>> saved from the old IMSIC VS-file into the new one and make the vCPU use
>> the new VS-file.
>>
>> The interrupt producers have already been retargeted to the new
>> VS-file, so MSIs may land in it before the saved state is restored.
> 
> Could we send an extempore MSI to the hart of the new file once the
> interrupt producers have been retargeted, and spin until it is received?
> That would guarantee that no more MSIs land once we have received it.

I don't think it's needed. The barrier is there so that nothing gets
lost from the old file: once the extempore MSI sent to the hart of the
old file has arrived, every MSI the APLIC sent towards the old file
before the retargeting has landed there, so what's read out of the old
file is complete.

MSIs sent after the retargeting go to the new file, and they can keep
arriving at any time, including while the saved state is being
restored, so an extempore MSI to the hart of the new file wouldn't stop
them anyway: it would only tell that the MSIs sent before it have
arrived. That's why the saved eip/eie bits are ORed into the new file
rather than written to it, so that whatever lands there in the meantime
is kept, and why eidelivery is restored last, so that the new file
doesn't deliver anything until its state is complete.

>> Hence the saved eip/eie bits are ORed into the new VS-file rather than
>> written to it, so that such MSIs aren't lost. eithreshold and
>> eidelivery are restored last: the new VS-file was cleared when it was
>> acquired, so it doesn't deliver interrupts until its pending and enable
>> bits are complete.
>>
>> As with reading the old VS-file, this has to be done on the pCPU owning
>> the new VS-file, with hstatus.VGEIN temporarily selecting it. That is
>> v->processor, the pCPU the vCPU is migrating to.
>>
>> Finally, point hstatus.VGEIN in the vCPU's saved context at the new
>> VS-file, so that it becomes the source of the vCPU's VS-level external
>> interrupts and the file the guest accesses through its siselect/sireg.
>> With that the migration is complete, so drop the BUG_ON("unimplemented")
> Great!
>> [ ... 82 lines skipped ... ]
>> +static void cf_check imsic_vsfile_local_update(void *data)
>> +{
>> +    unsigned int i;
>> +    const struct imsic_vsfile_data *idata = data;
>> +    struct imsic_mrif *mrif = idata->mrif;
> mrif is only read here, so it can be const:
>      const struct imsic_mrif *mrif = idata->mrif;

Good point. I will apply that.

>> +    unsigned long new_hstatus, old_hstatus, old_vsiselect;
>> +
>> +    /* We can only update if we have a HW IMSIC context */
>> +    if ( !idata->hgei )
>> +        return;
>> +
>> +    /*
>> +     * No atomic accessors are needed to read the values out of the MRIF here,
>> +     * as this is always called with a pointer to a temporary MRIF on the
>> +     * stack.
>> +     */
>> +
>> +    /*
>> +     * The file is reached by retargeting hstatus.VGEIN, and the
>> +     * imsic_vs_csr_*() accessors alter vsiselect. Both belong to the vCPU
>> +     * running on this pCPU, so restore them before returning.
>> +     */
> Same comment as on the previous patch: you are not restoring the CSRs
> here but saving them, as imsic_vs_csr_*() will alter vsiselect. Please
> update the comment accordingly.

Sure! As I mentioned in reply to prev. patch I think that it would be 
better to factor out the sequence of work with hstatus&vsiselect to 
separate helpers, put your comment suggestion above the helpers once.

>> [ ... 32 lines skipped ... ]
>> @@ -1152,5 +1222,11 @@ void imsic_migrate_vcpu(struct vcpu *v)
>>       /* Free-up old IMSIC VS-file */
>>       vgein_release(v, old_vsfile_id, old_vsfile_cpu);
>>   
>> -    BUG_ON("unimplemented");
>> +    /* Restore register state in the new IMSIC VS-file */
>> +    imsic_call_on_cpu(v->processor, imsic_vsfile_local_update, &vsfile_data);
>> +
>> +    /* Set VCPU HSTATUS.VGEIN to new IMSIC VS-file */
> Nit: s/VCPU/vCPU/
> 

Acked.

Thanks for review.

~ Oleksii



  reply	other threads:[~2026-11-06 10:04 UTC|newest]

Thread overview: 152+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 16:18 [PATCH v3 00/39] [PATCH v2 00/39] [RISC-V] virtual interrupt controller (vAPLIC/vIMSIC) support Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 01/39] xen/riscv: drop INSN_{16,32}BIT_MASK and report unknown instruction lengths Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:35     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 02/39] xen/riscv: set the domain type for 64-bit kernel images Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:36     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 03/39] xen/riscv: introduce csr_volatile_read64() Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-09 13:29     ` Oleksii Kurochko
2026-10-08 14:46   ` Jan Beulich
2026-10-09 14:00     ` Oleksii Kurochko
2026-10-09 14:19       ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 04/39] xen/riscv: request a G-stage flush on vmenter when VMIDs are disabled Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:53     ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 05/39] xen/riscv: use ~0 instead of ULONG_MAX to disable the VS-timer Oleksii Kurochko
2026-10-08 14:54   ` Jan Beulich
2026-09-30 16:18 ` [PATCH v3 06/39] xen/riscv: introduce device-agnostic MMIO emulation dispatch Oleksii Kurochko
2026-10-05 10:01   ` Baptiste Le Duc
2026-10-08 14:57     ` Jan Beulich
2026-10-12 13:51       ` Oleksii Kurochko
2026-10-12 13:50     ` Oleksii Kurochko
2026-10-12 15:28   ` Jan Beulich
2026-10-14 10:51     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 07/39] xen/riscv: introduce CPU_NONE Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-12 14:27     ` Oleksii Kurochko
2026-10-12 15:40   ` Jan Beulich
2026-10-14 11:35     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 08/39] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-10-05 14:53   ` Baptiste Le Duc
2026-10-13 16:06     ` Oleksii Kurochko
2026-10-14  6:16       ` Jan Beulich
2026-10-14 11:45         ` Oleksii Kurochko
2026-10-14 13:52   ` Jan Beulich
2026-10-15 14:57     ` Oleksii Kurochko
2026-09-30 16:18 ` [PATCH v3 09/39] xen/riscv: build the target hart index via aplic_hart_index() Oleksii Kurochko
2026-10-06  9:02   ` Baptiste Le Duc
2026-10-14 13:42     ` Oleksii Kurochko
2026-10-14 14:03   ` Jan Beulich
2026-10-15  8:32     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 10/39] xen/riscv: add helper to check APLIC MSI mode Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 11/39] xen/riscv: implement vCPU context switching Oleksii Kurochko
2026-10-06 16:50   ` Baptiste Le Duc
2026-10-07  8:04     ` Jan Beulich
2026-10-07  8:27       ` Baptiste Le Duc
2026-10-14 14:05     ` Oleksii Kurochko
2026-11-10 15:52   ` Jan Beulich
2026-11-12 11:00     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 12/39] xen/riscv: save and restore vsiselect on vCPU context switch Oleksii Kurochko
2026-10-07  8:53   ` Baptiste Le Duc
2026-10-14 14:53     ` Oleksii Kurochko
2026-11-10 16:46     ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 13/39] xen/riscv: introduce vintc_ctxt_switch_{from,to}() Oleksii Kurochko
2026-10-07  9:11   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 14/39] xen/riscv: add IMSIC vCPU context switch handlers Oleksii Kurochko
2026-10-08  9:54   ` Baptiste Le Duc
2026-10-14 15:12     ` Oleksii Kurochko
2026-11-10 16:49   ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 15/39] xen/riscv: extend exception tables with type and data fields Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-04 11:00     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 16/39] xen/riscv: decouple INSN_PSEUDO_VS_* from the hypervisor's XLEN Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-10 16:52   ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 17/39] xen/riscv: add guest page fault handling stub Oleksii Kurochko
2026-10-20 14:59   ` Baptiste Le Duc
2026-11-04 11:33     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 18/39] xen/riscv: implement trap redirection to a guest Oleksii Kurochko
2026-10-20 15:22   ` Baptiste Le Duc
     [not found]   ` <179250973602.489973.14893581320042795275.b4-review@b4>
2026-10-20 15:25     ` Baptiste Le Duc
2026-11-04 11:41       ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 19/39] xen/riscv: detect Shtvala Oleksii Kurochko
2026-10-20 15:26   ` Baptiste Le Duc
2026-11-10 16:53     ` Jan Beulich
2026-09-30 16:23 ` [PATCH v3 20/39] xen/riscv: resolve the faulting guest physical address Oleksii Kurochko
2026-10-21 11:45   ` Baptiste Le Duc
2026-11-04 11:49     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 21/39] xen/riscv: add guest memory read helper Oleksii Kurochko
2026-10-21 14:56   ` Baptiste Le Duc
2026-11-04 12:25     ` Oleksii Kurochko
2026-10-21 15:11   ` Baptiste Le Duc
2026-11-04 12:39     ` Oleksii Kurochko
2026-11-04 13:28       ` Jan Beulich
2026-11-04 15:25         ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 22/39] xen/riscv: look up the exception table for any trap taken in Xen context Oleksii Kurochko
2026-10-21 15:28   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 23/39] xen/riscv: add helpers for decoding a trapped load or store Oleksii Kurochko
2026-10-22 10:02   ` Baptiste Le Duc
2026-11-04 16:38     ` Oleksii Kurochko
2026-11-05  8:17       ` Jan Beulich
2026-11-05  8:48         ` Oleksii Kurochko
2026-11-05  9:35       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 24/39] xen/riscv: add guest load emulation for trapped MMIO accesses Oleksii Kurochko
2026-10-15 14:59   ` Oleksii Kurochko
2026-10-22 12:13     ` Baptiste Le Duc
2026-11-04 16:44       ` Oleksii Kurochko
2026-10-22 12:30     ` Baptiste Le Duc
2026-11-04 16:46       ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 25/39] xen/riscv: add guest store " Oleksii Kurochko
2026-10-22 12:37   ` Baptiste Le Duc
2026-11-04 16:51     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 26/39] xen/riscv: introduce arch_move_irqs() Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 27/39] xen/riscv: handle the case when no vCPU migration is needed Oleksii Kurochko
2026-10-22 12:39   ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 28/39] xen/riscv: introduce vaplic_reconfigure_target() Oleksii Kurochko
2026-10-22 13:38   ` Baptiste Le Duc
2026-11-05 11:43     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 29/39] xen/riscv: prepare new IMSIC VS-file Oleksii Kurochko
2026-10-23 12:55   ` Baptiste Le Duc
2026-11-05 12:49     ` Oleksii Kurochko
2026-11-05 15:27       ` Baptiste Le Duc
2026-11-05 16:41         ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 30/39] xen/riscv: implement APLIC-IMSIC-hart sync barrier for vCPU migration Oleksii Kurochko
2026-10-06 14:25   ` Oleksii Kurochko
2026-10-23 13:51     ` Baptiste Le Duc
2026-11-05 14:21       ` Oleksii Kurochko
2026-11-05 15:32         ` Baptiste Le Duc
2026-11-05 15:49           ` Oleksii Kurochko
2026-11-05 15:59             ` Baptiste Le Duc
2026-11-05 16:26               ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 31/39] xen/riscv: remap interrupts to new IMSIC VS-file Oleksii Kurochko
2026-10-26 14:06   ` Baptiste Le Duc
2026-11-05 16:57     ` Oleksii Kurochko
2026-11-06 13:26       ` Baptiste Le Duc
2026-11-09 10:19         ` Oleksii Kurochko
2026-11-09 15:01           ` Oleksii Kurochko
2026-11-09 15:22             ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 32/39] xen/riscv: save and clear the old IMSIC VS-file on vCPU migration Oleksii Kurochko
2026-11-03 16:02   ` Baptiste Le Duc
2026-11-06  9:52     ` Oleksii Kurochko
2026-11-06 13:31       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 33/39] xen/riscv: restore register state in the new IMSIC VS-file Oleksii Kurochko
2026-11-03 16:45   ` Baptiste Le Duc
2026-11-06 10:04     ` Oleksii Kurochko [this message]
2026-11-06 13:33       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 34/39] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 35/39] xen/riscv: wake up a descheduled vCPU on a guest external interrupt Oleksii Kurochko
2026-11-04 10:37   ` Baptiste Le Duc
2026-11-06 10:58     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 36/39] xen/riscv: map IMSIC interrupt file for vCPUs Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 37/39] xen/riscv: implement continue_new_vcpu() Oleksii Kurochko
2026-11-04 14:00   ` Baptiste Le Duc
2026-11-06 11:31     ` Oleksii Kurochko
2026-09-30 16:23 ` [PATCH v3 38/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL Oleksii Kurochko
2026-11-04 14:37   ` Baptiste Le Duc
2026-11-06 11:59     ` Oleksii Kurochko
2026-11-06 13:43       ` Baptiste Le Duc
2026-09-30 16:23 ` [PATCH v3 39/39] xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu Oleksii Kurochko
2026-11-04 15:06   ` Baptiste Le Duc
2026-11-06 12:31     ` Oleksii Kurochko

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