* [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2020-12-07 2:46 ` Sieng Piaw Liew 0 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-07 2:46 UTC (permalink / raw) Cc: Vignesh Raghavendra, Tudor Ambarus, Richard Weinberger, linux-kernel, linux-mtd, Miquel Raynal, liew.s.piaw Enable 4-bit Block Protect support for MX256405D and its variants using the same ID. Tested on Innacom W3400V6 router with MX25L6406E chip. https://github.com/openwrt/openwrt/pull/3501 Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> --- drivers/mtd/spi-nor/macronix.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 9203abaac229..7aa8b1ee9daa 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_4BIT_BP) }, { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2020-12-07 2:46 ` Sieng Piaw Liew 0 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-07 2:46 UTC (permalink / raw) Cc: liew.s.piaw, Tudor Ambarus, Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, linux-mtd, linux-kernel Enable 4-bit Block Protect support for MX256405D and its variants using the same ID. Tested on Innacom W3400V6 router with MX25L6406E chip. https://github.com/openwrt/openwrt/pull/3501 Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> --- drivers/mtd/spi-nor/macronix.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 9203abaac229..7aa8b1ee9daa 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_4BIT_BP) }, { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | -- 2.17.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D 2020-12-07 2:46 ` Sieng Piaw Liew @ 2020-12-07 17:53 ` Tudor.Ambarus -1 siblings, 0 replies; 12+ messages in thread From: Tudor.Ambarus @ 2020-12-07 17:53 UTC (permalink / raw) To: liew.s.piaw; +Cc: richard, linux-mtd, vigneshr, linux-kernel, miquel.raynal Hi, Sieng, On 12/7/20 4:46 AM, Sieng Piaw Liew wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Enable 4-bit Block Protect support for MX256405D and its variants using > the same ID. > > Tested on Innacom W3400V6 router with MX25L6406E chip. :) What kind of tests did you exactly make? > https://github.com/openwrt/openwrt/pull/3501 > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > --- > drivers/mtd/spi-nor/macronix.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 9203abaac229..7aa8b1ee9daa 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > + SECT_4K | SPI_NOR_4BIT_BP) }, I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag. Cheers, ta > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | > -- > 2.17.1 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2020-12-07 17:53 ` Tudor.Ambarus 0 siblings, 0 replies; 12+ messages in thread From: Tudor.Ambarus @ 2020-12-07 17:53 UTC (permalink / raw) To: liew.s.piaw; +Cc: miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel Hi, Sieng, On 12/7/20 4:46 AM, Sieng Piaw Liew wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Enable 4-bit Block Protect support for MX256405D and its variants using > the same ID. > > Tested on Innacom W3400V6 router with MX25L6406E chip. :) What kind of tests did you exactly make? > https://github.com/openwrt/openwrt/pull/3501 > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > --- > drivers/mtd/spi-nor/macronix.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 9203abaac229..7aa8b1ee9daa 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > + SECT_4K | SPI_NOR_4BIT_BP) }, I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag. Cheers, ta > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D 2020-12-07 17:53 ` Tudor.Ambarus @ 2020-12-08 1:19 ` Sieng Piaw Liew -1 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-08 1:19 UTC (permalink / raw) To: Tudor.Ambarus; +Cc: richard, linux-mtd, vigneshr, linux-kernel, miquel.raynal On Mon, Dec 07, 2020 at 05:53:20PM +0000, Tudor.Ambarus@microchip.com wrote: > Hi, Sieng, > > On 12/7/20 4:46 AM, Sieng Piaw Liew wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Enable 4-bit Block Protect support for MX256405D and its variants using > > the same ID. > > > > Tested on Innacom W3400V6 router with MX25L6406E chip. > > :) What kind of tests did you exactly make? OpenWrt cannot write into spi-nor after first boot. After hacking 4-bit BP support into OpenWrt's kernel v5.4, writing works. > > > https://github.com/openwrt/openwrt/pull/3501 > > > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > > --- > > drivers/mtd/spi-nor/macronix.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > > index 9203abaac229..7aa8b1ee9daa 100644 > > --- a/drivers/mtd/spi-nor/macronix.c > > +++ b/drivers/mtd/spi-nor/macronix.c > > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { > > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > > + SECT_4K | SPI_NOR_4BIT_BP) }, > > I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag. > > Cheers, > ta Yes, I'll have v2 patch sent shortly. > > > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > > SECT_4K | SPI_NOR_DUAL_READ | > > -- > > 2.17.1 > > > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2020-12-08 1:19 ` Sieng Piaw Liew 0 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-08 1:19 UTC (permalink / raw) To: Tudor.Ambarus; +Cc: miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel On Mon, Dec 07, 2020 at 05:53:20PM +0000, Tudor.Ambarus@microchip.com wrote: > Hi, Sieng, > > On 12/7/20 4:46 AM, Sieng Piaw Liew wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Enable 4-bit Block Protect support for MX256405D and its variants using > > the same ID. > > > > Tested on Innacom W3400V6 router with MX25L6406E chip. > > :) What kind of tests did you exactly make? OpenWrt cannot write into spi-nor after first boot. After hacking 4-bit BP support into OpenWrt's kernel v5.4, writing works. > > > https://github.com/openwrt/openwrt/pull/3501 > > > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > > --- > > drivers/mtd/spi-nor/macronix.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > > index 9203abaac229..7aa8b1ee9daa 100644 > > --- a/drivers/mtd/spi-nor/macronix.c > > +++ b/drivers/mtd/spi-nor/macronix.c > > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = { > > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > > + SECT_4K | SPI_NOR_4BIT_BP) }, > > I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag. > > Cheers, > ta Yes, I'll have v2 patch sent shortly. > > > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > > SECT_4K | SPI_NOR_DUAL_READ | > > -- > > 2.17.1 > > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D 2020-12-08 1:19 ` Sieng Piaw Liew @ 2020-12-08 1:57 ` Sieng Piaw Liew -1 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-08 1:57 UTC (permalink / raw) Cc: Vignesh Raghavendra, Tudor Ambarus, Richard Weinberger, linux-kernel, linux-mtd, Miquel Raynal, liew.s.piaw Enable 4-bit Block Protect support for MX256405D and its variants using the same ID. Tested on Innacom W3400V6 router with MX25L6406E chip. https://github.com/openwrt/openwrt/pull/3501 Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> --- Changes in v2: - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. drivers/mtd/spi-nor/macronix.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 9203abaac229..033ede381673 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_HAS_LOCK | + SPI_NOR_4BIT_BP) }, { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2020-12-08 1:57 ` Sieng Piaw Liew 0 siblings, 0 replies; 12+ messages in thread From: Sieng Piaw Liew @ 2020-12-08 1:57 UTC (permalink / raw) Cc: liew.s.piaw, Tudor Ambarus, Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, linux-mtd, linux-kernel Enable 4-bit Block Protect support for MX256405D and its variants using the same ID. Tested on Innacom W3400V6 router with MX25L6406E chip. https://github.com/openwrt/openwrt/pull/3501 Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> --- Changes in v2: - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. drivers/mtd/spi-nor/macronix.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 9203abaac229..033ede381673 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, + SECT_4K | SPI_NOR_HAS_LOCK | + SPI_NOR_4BIT_BP) }, { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | -- 2.17.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D 2020-12-08 1:57 ` Sieng Piaw Liew @ 2021-01-23 12:18 ` Tudor.Ambarus -1 siblings, 0 replies; 12+ messages in thread From: Tudor.Ambarus @ 2021-01-23 12:18 UTC (permalink / raw) To: liew.s.piaw, michael Cc: richard, linux-mtd, vigneshr, linux-kernel, miquel.raynal Hi, Sieng, On 12/8/20 3:57 AM, Sieng Piaw Liew wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Enable 4-bit Block Protect support for MX256405D and its variants using > the same ID. > > Tested on Innacom W3400V6 router with MX25L6406E chip. > https://github.com/openwrt/openwrt/pull/3501 > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > --- > Changes in v2: > - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. > > drivers/mtd/spi-nor/macronix.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 9203abaac229..033ede381673 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > + SECT_4K | SPI_NOR_HAS_LOCK | > + SPI_NOR_4BIT_BP) }, I've read again the datasheet[1], and to me it looks like we don't support the locking scheme for this flash. What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit). The problem that I see is that mx25l6405d uses some kind of twisted TB bit. For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet states that the lower half blocks are protected (0th-63th), while in our code we would expect that just the lower first two blocks to be protected (0th and 1st). We need new support for this flash. Cheers, ta [1] https://www.macronix.com/Lists/Datasheet/Attachments/7309/MX25L6405D,%203V,%2064Mb,%20v1.5.pdf > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | > -- > 2.17.1 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2021-01-23 12:18 ` Tudor.Ambarus 0 siblings, 0 replies; 12+ messages in thread From: Tudor.Ambarus @ 2021-01-23 12:18 UTC (permalink / raw) To: liew.s.piaw, michael Cc: miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel Hi, Sieng, On 12/8/20 3:57 AM, Sieng Piaw Liew wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Enable 4-bit Block Protect support for MX256405D and its variants using > the same ID. > > Tested on Innacom W3400V6 router with MX25L6406E chip. > https://github.com/openwrt/openwrt/pull/3501 > > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> > --- > Changes in v2: > - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. > > drivers/mtd/spi-nor/macronix.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 9203abaac229..033ede381673 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > + SECT_4K | SPI_NOR_HAS_LOCK | > + SPI_NOR_4BIT_BP) }, I've read again the datasheet[1], and to me it looks like we don't support the locking scheme for this flash. What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit). The problem that I see is that mx25l6405d uses some kind of twisted TB bit. For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet states that the lower half blocks are protected (0th-63th), while in our code we would expect that just the lower first two blocks to be protected (0th and 1st). We need new support for this flash. Cheers, ta [1] https://www.macronix.com/Lists/Datasheet/Attachments/7309/MX25L6405D,%203V,%2064Mb,%20v1.5.pdf > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D 2021-01-23 12:18 ` Tudor.Ambarus @ 2021-01-23 13:04 ` Michael Walle -1 siblings, 0 replies; 12+ messages in thread From: Michael Walle @ 2021-01-23 13:04 UTC (permalink / raw) To: Tudor.Ambarus Cc: vigneshr, richard, linux-kernel, linux-mtd, miquel.raynal, liew.s.piaw Am 2021-01-23 13:18, schrieb Tudor.Ambarus@microchip.com: > Hi, Sieng, > > On 12/8/20 3:57 AM, Sieng Piaw Liew wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know >> the content is safe >> >> Enable 4-bit Block Protect support for MX256405D and its variants >> using >> the same ID. >> >> Tested on Innacom W3400V6 router with MX25L6406E chip. MX25L6406E? >> https://github.com/openwrt/openwrt/pull/3501 >> >> Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> >> --- >> Changes in v2: >> - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. >> >> drivers/mtd/spi-nor/macronix.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/mtd/spi-nor/macronix.c >> b/drivers/mtd/spi-nor/macronix.c >> index 9203abaac229..033ede381673 100644 >> --- a/drivers/mtd/spi-nor/macronix.c >> +++ b/drivers/mtd/spi-nor/macronix.c >> @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { >> { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, >> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >> - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >> + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, >> + SECT_4K | SPI_NOR_HAS_LOCK | >> + SPI_NOR_4BIT_BP) }, > > I've read again the datasheet[1], and to me it looks like we > don't support the locking scheme for this flash. > What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit). > The problem that I see is that mx25l6405d uses some kind of twisted > TB bit. > > For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet > states that the lower half blocks are protected (0th-63th), while in > our code we would expect that just the lower first two blocks to be > protected (0th and 1st). We need new support for this flash. I double checked that and we don't support this. BP3 is indeed some kind of TB bit. But not the TB bit which is currently supported. I guess with the current code, protection scheme can be supported iff BP3 == 0. -michael ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D @ 2021-01-23 13:04 ` Michael Walle 0 siblings, 0 replies; 12+ messages in thread From: Michael Walle @ 2021-01-23 13:04 UTC (permalink / raw) To: Tudor.Ambarus Cc: liew.s.piaw, miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel Am 2021-01-23 13:18, schrieb Tudor.Ambarus@microchip.com: > Hi, Sieng, > > On 12/8/20 3:57 AM, Sieng Piaw Liew wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know >> the content is safe >> >> Enable 4-bit Block Protect support for MX256405D and its variants >> using >> the same ID. >> >> Tested on Innacom W3400V6 router with MX25L6406E chip. MX25L6406E? >> https://github.com/openwrt/openwrt/pull/3501 >> >> Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> >> --- >> Changes in v2: >> - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. >> >> drivers/mtd/spi-nor/macronix.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/mtd/spi-nor/macronix.c >> b/drivers/mtd/spi-nor/macronix.c >> index 9203abaac229..033ede381673 100644 >> --- a/drivers/mtd/spi-nor/macronix.c >> +++ b/drivers/mtd/spi-nor/macronix.c >> @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { >> { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, >> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >> - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >> + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, >> + SECT_4K | SPI_NOR_HAS_LOCK | >> + SPI_NOR_4BIT_BP) }, > > I've read again the datasheet[1], and to me it looks like we > don't support the locking scheme for this flash. > What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit). > The problem that I see is that mx25l6405d uses some kind of twisted > TB bit. > > For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet > states that the lower half blocks are protected (0th-63th), while in > our code we would expect that just the lower first two blocks to be > protected (0th and 1st). We need new support for this flash. I double checked that and we don't support this. BP3 is indeed some kind of TB bit. But not the TB bit which is currently supported. I guess with the current code, protection scheme can be supported iff BP3 == 0. -michael ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-01-23 13:05 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-12-07 2:46 [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D Sieng Piaw Liew 2020-12-07 2:46 ` Sieng Piaw Liew 2020-12-07 17:53 ` Tudor.Ambarus 2020-12-07 17:53 ` Tudor.Ambarus 2020-12-08 1:19 ` Sieng Piaw Liew 2020-12-08 1:19 ` Sieng Piaw Liew 2020-12-08 1:57 ` [PATCH v2] " Sieng Piaw Liew 2020-12-08 1:57 ` Sieng Piaw Liew 2021-01-23 12:18 ` Tudor.Ambarus 2021-01-23 12:18 ` Tudor.Ambarus 2021-01-23 13:04 ` Michael Walle 2021-01-23 13:04 ` Michael Walle
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