All of lore.kernel.org
 help / color / mirror / Atom feed
From: Oleksii Kurochko <oleksii.kurochko@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Romain Caritey" <Romain.Caritey@microchip.com>,
	"Baptiste Le Duc" <baptiste.le-duc@vates.tech>,
	"Zheng Zhang" <zhangzheng@iscas.ac.cn>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Connor Davis" <connojdavis@gmail.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Anthony PERARD" <anthony.perard@vates.tech>,
	"Michal Orzel" <michal.orzel@amd.com>,
	"Julien Grall" <julien@xen.org>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 03/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL
Date: Wed, 2 Sep 2026 13:42:23 +0200	[thread overview]
Message-ID: <127e8aea-4d65-492e-8bda-bffc75f02481@gmail.com> (raw)
In-Reply-To: <825ea854-5778-4cb6-a9a9-0ff97fa7bee5@suse.com>



On 9/1/26 5:20 PM, Jan Beulich wrote:
> On 27.08.2026 17:20, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/domain.c
>> +++ b/xen/arch/riscv/domain.c
>> @@ -88,7 +88,13 @@ static void vcpu_csr_init(struct vcpu *v)
>>   {
>>       v->arch.hedeleg = HEDELEG_DEFAULT & csr_masks.hedeleg;
>>   
>> -    vcpu_guest_cpu_user_regs(v)->hstatus = HSTATUS_SPV | HSTATUS_SPVP;
>> +    /*
>> +     * Xen supports 64-bit guests only, so set the guest's XLEN explicitly
>> +     * rather than leaving it to the WARL behaviour of hstatus.VSXL, which the
>> +     * decoding of a trapped instruction depends on.
>> +     */
>> +    vcpu_guest_cpu_user_regs(v)->hstatus =
>> +        HSTATUS_SPV | HSTATUS_SPVP | MASK_INSR(HSTATUS_VSXL_64, HSTATUS_VSXL);
> 
> The comment is correct right now, but the situation better would change
> at some point. Can't you arrange for things to be correct here also for
> a future where 32- and 128-bit guests would also be supported?

I am not sure about 128-bit guests as H extension is dependent on RV32 
or RV64 but probably it will be changed:
```
The hypervisor extension depends on an "I" base integer ISA with 32 x 
registers (RV32I or RV64I), not RV32E or RV64E, which have only 16 x 
registers.
```

I will introduce the following (also it will be needed also to check if 
we could VSXL set at all as implmentation can make that field read-only 
and do VSXLLEN=HSXLEN):

/*
  * Return the hstatus.VSXL value encoding the guest's XLEN. The switch()
  * deliberately has no default case, so that adding a new domain_type (a
  * 128-bit one, in particular) fails to build until this mapping is 
updated.
  */
static unsigned int domain_vsxl(const struct domain *d)
{
     switch ( d->type )
     {
     case DOMAIN_32BIT:
         return HSTATUS_VSXL_32;

     case DOMAIN_64BIT:
         return HSTATUS_VSXL_64;
     }

     ASSERT_UNREACHABLE();

     return HSTATUS_VSXL_64;
}

It will also affect then common code as vcpu_csr_init() could be then 
called before domain type is set:

+++ b/xen/common/device-tree/dom0less-build.c
@@ -812,17 +812,18 @@ static int __init construct_domU(struct 
kernel_info *kinfo,
      else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") )
          kinfo->dom0less_feature = DOM0LESS_ENHANCED_NO_XS;

-    if ( vcpu_create(d, 0) == NULL )
-        return -ENOMEM;
-
      d->max_pages = ((paddr_t)mem * SZ_1K) >> PAGE_SHIFT;

      rc = kernel_probe(kinfo, node);
      if ( rc < 0 )
          return rc;

+    /* The domain type needs to be known before the first vCPU is 
created. */
      set_domain_type(d, kinfo);

+    if ( vcpu_create(d, 0) == NULL )
+        return -ENOMEM;


> 
>> --- a/xen/arch/riscv/include/asm/riscv_encoding.h
>> +++ b/xen/arch/riscv/include/asm/riscv_encoding.h
>> @@ -68,6 +68,8 @@
>>   #if __riscv_xlen == 64
>>   #define HSTATUS_VSXL			_UL(0x300000000)
>>   #define HSTATUS_VSXL_SHIFT		32
>> +#define HSTATUS_VSXL_64			_UL(2)
>> +#define HSTATUS_VSXL_32			_UL(1)
>>   #endif
> 
> While adding the two #define-s, would you mind considering to remove the
> unused (and supposed to remain so) HSTATUS_VSXL_SHIFT?

Sure, I will drop that.

Thanks.

~ Oleksii


  reply	other threads:[~2026-09-02 11:42 UTC|newest]

Thread overview: 251+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27 15:20 [PATCH v2 00/39] [RISC-V] virtual interrupt controller (vAPLIC/vIMSIC) support Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 01/39] xen/riscv: drop pregs from struct cpu_user_regs Oleksii Kurochko
2026-08-31 12:48   ` Baptiste Le Duc
2026-09-01  6:58     ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 02/39] xen/riscv: drop bug.h's duplicate instruction length helpers Oleksii Kurochko
2026-08-31 12:48   ` Baptiste Le Duc
2026-09-01  7:01   ` Jan Beulich
2026-09-02 10:48     ` Oleksii Kurochko
2026-09-02 13:02       ` Jan Beulich
2026-09-02 13:45         ` Oleksii Kurochko
2026-09-02 14:27           ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 03/39] xen/riscv: set the guest's XLEN explicitly in hstatus.VSXL Oleksii Kurochko
2026-08-31 12:48   ` Baptiste Le Duc
2026-09-01  7:03     ` Jan Beulich
2026-09-01  8:40     ` Oleksii Kurochko
2026-09-01 15:16     ` Jan Beulich
2026-09-01 15:20   ` Jan Beulich
2026-09-02 11:42     ` Oleksii Kurochko [this message]
2026-09-02 13:07       ` Jan Beulich
2026-09-02 13:29         ` Oleksii Kurochko
2026-09-02 14:31           ` Jan Beulich
2026-09-02 15:17             ` Oleksii Kurochko
2026-09-02 15:56               ` Oleksii Kurochko
2026-09-02 17:45                 ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 04/39] xen/riscv: introduce csr_read64() Oleksii Kurochko
2026-08-27 15:36   ` Andrew Cooper
2026-08-31 12:42     ` Oleksii Kurochko
2026-09-01  7:07       ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 05/39] xen/riscv: request a G-stage flush on vmenter when VMIDs are disabled Oleksii Kurochko
2026-08-31 12:48   ` Baptiste Le Duc
2026-09-01  8:43     ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 06/39] xen/riscv: use UINT64_MAX to disable the VS-timer Oleksii Kurochko
2026-08-31 12:48   ` Baptiste Le Duc
2026-09-01  7:12   ` Jan Beulich
2026-09-01  8:47     ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 07/39] xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h Oleksii Kurochko
2026-09-01 15:36   ` Baptiste Le Duc
2026-09-01 15:53     ` Jan Beulich
2026-09-02 13:22       ` Jan Beulich
2026-09-02 13:52         ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 08/39] xen/riscv: introduce device-agnostic MMIO emulation dispatch Oleksii Kurochko
2026-09-01 15:36   ` Baptiste Le Duc
2026-09-03 10:28     ` Oleksii Kurochko
2026-09-09 13:24   ` Jan Beulich
2026-09-09 14:04     ` Oleksii Kurochko
2026-09-09 14:32       ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 09/39] xen/riscv: implement virtual APLIC MMIO emulation Oleksii Kurochko
2026-09-02 11:51   ` Baptiste Le Duc
2026-09-04 11:58     ` Oleksii Kurochko
2026-09-04 12:03       ` Jan Beulich
2026-09-02 12:31   ` Baptiste Le Duc
2026-09-04 14:02     ` Oleksii Kurochko
2026-09-09 14:26   ` Jan Beulich
2026-09-10 10:37     ` Oleksii Kurochko
2026-09-10 11:14       ` Jan Beulich
2026-09-10 14:24         ` Oleksii Kurochko
2026-09-12  8:50           ` SeungJu Cheon
2026-09-22  8:50             ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 10/39] xen/riscv: build the target hart index via aplic_hart_field() Oleksii Kurochko
2026-09-04  8:26   ` Baptiste Le Duc
2026-09-04 14:28     ` Oleksii Kurochko
2026-09-09 14:51     ` Jan Beulich
2026-09-09 14:52   ` Jan Beulich
2026-09-10 10:59     ` Oleksii Kurochko
2026-09-10 11:23       ` Jan Beulich
2026-09-10 11:23       ` Jan Beulich
2026-09-10 12:44         ` Oleksii Kurochko
2026-09-10 12:57           ` Jan Beulich
2026-09-11  9:47             ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 11/39] xen/riscv: add helper to check APLIC MSI mode Oleksii Kurochko
2026-09-04  8:26   ` Baptiste Le Duc
2026-09-09 14:53     ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 12/39] xen/riscv: implement vCPU context switching Oleksii Kurochko
2026-09-02 14:42   ` Oleksii Kurochko
2026-09-04  8:26   ` Baptiste Le Duc
2026-09-04  8:33     ` Jan Beulich
2026-09-04  9:54       ` Baptiste Le Duc
2026-09-04 14:55     ` Oleksii Kurochko
2026-09-07  8:17       ` Jan Beulich
2026-09-08  9:06         ` Oleksii Kurochko
2026-09-05  7:25   ` Oleksii Kurochko
2026-09-10 13:29   ` Jan Beulich
2026-09-11 10:43     ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 13/39] xen/riscv: save and restore AIA state on vCPU context switch Oleksii Kurochko
2026-09-04  9:52   ` Baptiste Le Duc
2026-09-04 16:40     ` Oleksii Kurochko
2026-08-27 15:20 ` [PATCH v2 14/39] xen/riscv: introduce vintc_ctxt_switch_{from,to}() Oleksii Kurochko
2026-09-04 11:25   ` Baptiste Le Duc
2026-09-04 16:54     ` Oleksii Kurochko
2026-09-10 14:54   ` Jan Beulich
2026-08-27 15:20 ` [PATCH v2 15/39] xen/riscv: add IMSIC vCPU context switch handlers Oleksii Kurochko
2026-09-04 11:33   ` Baptiste Le Duc
2026-09-04 16:56     ` Oleksii Kurochko
2026-09-10 14:57   ` Jan Beulich
2026-09-11 11:19     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 16/39] xen/riscv: extend exception tables with type and data fields Oleksii Kurochko
2026-09-07 15:57   ` Baptiste Le Duc
2026-09-08  6:06     ` Jan Beulich
2026-09-08  8:18       ` Baptiste Le Duc
2026-09-08  9:19     ` Oleksii Kurochko
2026-09-08 16:26       ` Baptiste Le Duc
2026-09-08 13:44   ` Jan Beulich
2026-09-09 11:20     ` Oleksii Kurochko
2026-09-09 12:22       ` Jan Beulich
2026-09-09 12:42         ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 17/39] xen/riscv: decouple INSN_PSEUDO_VS_* from the hypervisor's XLEN Oleksii Kurochko
2026-09-07 15:57   ` Baptiste Le Duc
2026-09-08  9:34     ` Oleksii Kurochko
2026-09-08 16:04       ` Baptiste Le Duc
2026-09-09 12:57         ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 18/39] xen/riscv: add guest page fault handling stub Oleksii Kurochko
2026-09-07 15:57   ` Baptiste Le Duc
2026-09-08  9:49     ` Oleksii Kurochko
2026-09-08 14:10   ` Jan Beulich
2026-09-09 15:09     ` Oleksii Kurochko
2026-09-10  6:38       ` Jan Beulich
2026-09-11 11:47         ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 19/39] xen/riscv: implement trap redirection to a guest Oleksii Kurochko
2026-09-07 15:57   ` Baptiste Le Duc
2026-09-08 10:01     ` Oleksii Kurochko
2026-09-08 14:58       ` Oleksii Kurochko
2026-09-08 15:05         ` Jan Beulich
2026-09-08 15:47           ` Baptiste Le Duc
2026-09-08 15:58             ` Jan Beulich
2026-09-08 14:16   ` Jan Beulich
2026-09-08 15:25     ` Oleksii Kurochko
2026-09-08 14:16   ` Jan Beulich
2026-08-27 15:21 ` [PATCH v2 20/39] xen/riscv: detect Shtvala Oleksii Kurochko
2026-09-07 15:57   ` Baptiste Le Duc
2026-09-08 10:15     ` Oleksii Kurochko
2026-09-08 15:49       ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 21/39] xen/riscv: resolve the faulting guest physical address Oleksii Kurochko
2026-09-09 12:04   ` Baptiste Le Duc
2026-09-11 12:56     ` Oleksii Kurochko
2026-09-10 15:06   ` Jan Beulich
2026-08-27 15:21 ` [PATCH v2 22/39] xen/riscv: add guest memory read helper Oleksii Kurochko
2026-09-09 12:04   ` Baptiste Le Duc
2026-09-10 15:19     ` Jan Beulich
2026-09-11 13:06     ` Oleksii Kurochko
2026-09-11 13:41       ` Oleksii Kurochko
2026-09-11 13:47         ` Jan Beulich
2026-09-11 13:50           ` Oleksii Kurochko
2026-09-10 15:28   ` Jan Beulich
2026-09-11 13:57     ` Oleksii Kurochko
2026-09-11 14:00       ` Jan Beulich
2026-09-11 14:29         ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 23/39] xen/riscv: look up the exception table for any trap taken in Xen context Oleksii Kurochko
2026-09-10 15:31   ` Jan Beulich
2026-09-18  8:44   ` Baptiste Le Duc
2026-09-22  9:31     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 24/39] xen/riscv: add helpers for decoding a trapped load or store Oleksii Kurochko
2026-09-14 11:03   ` Jan Beulich
2026-09-14 15:57     ` Oleksii Kurochko
2026-09-15  5:18       ` Jan Beulich
2026-09-18  8:44   ` Baptiste Le Duc
2026-09-22 11:03     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 25/39] xen/riscv: add guest load emulation for trapped MMIO accesses Oleksii Kurochko
2026-09-14 11:48   ` Jan Beulich
2026-09-16  4:16     ` Oleksii Kurochko
2026-09-18  9:16   ` Baptiste Le Duc
2026-09-22 11:22     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 26/39] xen/riscv: add guest store " Oleksii Kurochko
2026-09-14 12:01   ` Jan Beulich
2026-09-16  4:53     ` Oleksii Kurochko
2026-09-16  5:15       ` Jan Beulich
2026-09-16  5:23         ` Oleksii Kurochko
2026-09-18  9:16   ` Baptiste Le Duc
2026-09-22 11:38     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 27/39] xen/riscv: introduce arch_move_irqs() Oleksii Kurochko
2026-09-14 12:07   ` Jan Beulich
2026-09-16  5:32     ` Oleksii Kurochko
2026-09-22 17:00   ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 28/39] xen/riscv: handle the case when no vCPU migration is needed Oleksii Kurochko
2026-09-14 12:12   ` Jan Beulich
2026-09-16  5:55     ` Oleksii Kurochko
2026-09-16 13:02       ` Jan Beulich
2026-09-17  5:12         ` Oleksii Kurochko
2026-09-17  5:20           ` Jan Beulich
2026-09-17  8:40             ` Oleksii Kurochko
2026-09-17 10:41               ` Jan Beulich
2026-09-18  9:21     ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 29/39] xen/riscv: introduce aplic_reconfigure_target() Oleksii Kurochko
2026-09-14 12:25   ` Jan Beulich
2026-09-17  4:55     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 30/39] xen/riscv: prepare new IMSIC VS-file Oleksii Kurochko
2026-09-14 13:13   ` Jan Beulich
2026-09-17 14:50     ` Oleksii Kurochko
2026-09-18  6:02       ` Jan Beulich
2026-09-21 16:15   ` Baptiste Le Duc
2026-09-22  6:32     ` Jan Beulich
2026-09-22 13:01     ` Oleksii Kurochko
2026-09-22 15:36       ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 31/39] xen/riscv: implement APLIC-hart sync barrier for vCPU migration Oleksii Kurochko
2026-09-14 13:27   ` Jan Beulich
2026-09-18 11:53     ` Oleksii Kurochko
2026-09-22 17:03       ` Baptiste Le Duc
2026-09-22 17:00   ` Baptiste Le Duc
2026-09-22 18:48     ` Oleksii Kurochko
2026-09-23 10:57       ` Oleksii Kurochko
2026-09-23 12:15         ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 32/39] xen/riscv: remap interrupts to new IMSIC VS-file Oleksii Kurochko
2026-09-14 15:02   ` Jan Beulich
2026-09-21  8:03     ` Oleksii Kurochko
2026-09-21  8:28       ` Jan Beulich
2026-09-21  8:50         ` Oleksii Kurochko
2026-09-23 13:34   ` Baptiste Le Duc
2026-09-23 15:45     ` Oleksii Kurochko
2026-09-23 16:10       ` Baptiste Le Duc
2026-09-23 15:25   ` Baptiste Le Duc
2026-09-23 15:48     ` Oleksii Kurochko
2026-09-23 16:11       ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 33/39] xen/riscv: dump old interrupt file to memory Oleksii Kurochko
2026-09-14 15:15   ` Jan Beulich
2026-09-21  9:51     ` Oleksii Kurochko
2026-09-23 15:15   ` Baptiste Le Duc
2026-09-23 16:02     ` Oleksii Kurochko
2026-09-23 16:16       ` Baptiste Le Duc
2026-09-23 18:30         ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 34/39] xen/riscv: restore register state in the new IMSIC VS-file Oleksii Kurochko
2026-09-14 15:21   ` Jan Beulich
2026-09-21 10:58     ` Oleksii Kurochko
2026-09-23 15:42   ` Baptiste Le Duc
2026-09-23 16:08     ` Oleksii Kurochko
2026-09-23 16:21       ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 35/39] xen/riscv: add basic VGEIN management for AIA guests Oleksii Kurochko
2026-09-18 12:38   ` Jan Beulich
2026-09-23 16:06   ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 36/39] xen/riscv: wake up a descheduled vCPU on a guest external interrupt Oleksii Kurochko
2026-09-18 12:52   ` Jan Beulich
2026-09-21 14:01     ` Oleksii Kurochko
2026-09-21 15:08       ` Jan Beulich
2026-09-22 13:37         ` Oleksii Kurochko
2026-09-24 14:25   ` Baptiste Le Duc
2026-09-25 15:33     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 37/39] xen/riscv: map IMSIC interrupt file for vCPUs Oleksii Kurochko
2026-09-21 11:36   ` Jan Beulich
2026-09-21 14:35     ` Oleksii Kurochko
2026-09-25  9:22   ` Baptiste Le Duc
2026-08-27 15:21 ` [PATCH v2 38/39] xen/riscv: implement continue_new_vcpu() Oleksii Kurochko
2026-09-21 12:12   ` Jan Beulich
2026-09-22  8:23     ` Oleksii Kurochko
2026-09-22 10:20       ` Jan Beulich
2026-09-22 13:58         ` Oleksii Kurochko
2026-09-25  9:22   ` Baptiste Le Duc
2026-09-25 11:26     ` Oleksii Kurochko
2026-08-27 15:21 ` [PATCH v2 39/39] xen/riscv: introduce IMSIC h/w interrupt file attaching to vcpu Oleksii Kurochko
2026-09-21 12:32   ` Jan Beulich
2026-09-22  8:31     ` Oleksii Kurochko
2026-09-22 10:23       ` Jan Beulich
2026-09-25 13:11   ` Baptiste Le Duc
2026-09-28 11:01     ` Oleksii Kurochko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=127e8aea-4d65-492e-8bda-bffc75f02481@gmail.com \
    --to=oleksii.kurochko@gmail.com \
    --cc=Romain.Caritey@microchip.com \
    --cc=alistair.francis@wdc.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=anthony.perard@vates.tech \
    --cc=baptiste.le-duc@vates.tech \
    --cc=connojdavis@gmail.com \
    --cc=jbeulich@suse.com \
    --cc=julien@xen.org \
    --cc=michal.orzel@amd.com \
    --cc=roger@xenproject.org \
    --cc=sstabellini@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    --cc=zhangzheng@iscas.ac.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.