From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Grant Likely <grant.likely@secretlab.ca>
Cc: monstr@monstr.eu, Rob Herring <robherring2@gmail.com>,
devicetree-discuss@lists.ozlabs.org, linux-pci@vger.kernel.org,
Rob Herring <rob.herring@calxeda.com>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
Thierry Reding <thierry.reding@avionic-design.de>
Subject: Re: pci and pcie device-tree binding - range No cells
Date: Tue, 11 Dec 2012 09:38:17 +1100 [thread overview]
Message-ID: <1355179097.19932.5.camel@pasglop> (raw)
In-Reply-To: <20121210214323.6EA733E0921@localhost>
On Mon, 2012-12-10 at 21:43 +0000, Grant Likely wrote:
> > Sorry for my pci ignorance (have never got hw for mb/zynq)
> > I just want to get better overview how we should we our drivers to
> be compatible.
> >
> > Does it mean that pci is supposed be always 64 bit wide?
> > And there is no option to have just 32bit values.
>
> Yes, PCIe addressing is always 64 bits wide. Even on 32bit PCI systems
> we use 64 bit PCI addressing in the device tree.
Right. The size & format of an address cell for PCI is specified in the
OF PCI bindings and we follow that binding. It's always 3 cells.
Cheers,
Ben.
WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Grant Likely <grant.likely@secretlab.ca>
Cc: monstr@monstr.eu, linux-pci@vger.kernel.org,
devicetree-discuss@lists.ozlabs.org,
Thierry Reding <thierry.reding@avionic-design.de>,
Rob Herring <rob.herring@calxeda.com>,
Rob Herring <robherring2@gmail.com>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: pci and pcie device-tree binding - range No cells
Date: Tue, 11 Dec 2012 09:38:17 +1100 [thread overview]
Message-ID: <1355179097.19932.5.camel@pasglop> (raw)
In-Reply-To: <20121210214323.6EA733E0921@localhost>
On Mon, 2012-12-10 at 21:43 +0000, Grant Likely wrote:
> > Sorry for my pci ignorance (have never got hw for mb/zynq)
> > I just want to get better overview how we should we our drivers to
> be compatible.
> >
> > Does it mean that pci is supposed be always 64 bit wide?
> > And there is no option to have just 32bit values.
>
> Yes, PCIe addressing is always 64 bits wide. Even on 32bit PCI systems
> we use 64 bit PCI addressing in the device tree.
Right. The size & format of an address cell for PCI is specified in the
OF PCI bindings and we follow that binding. It's always 3 cells.
Cheers,
Ben.
next prev parent reply other threads:[~2012-12-10 22:41 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-10 12:20 pci and pcie device-tree binding - range No cells Michal Simek
2012-12-10 14:26 ` Rob Herring
2012-12-10 14:26 ` Rob Herring
2012-12-10 15:05 ` Michal Simek
2012-12-10 15:05 ` Michal Simek
2012-12-10 15:21 ` Rob Herring
2012-12-10 15:21 ` Rob Herring
2012-12-10 15:37 ` Michal Simek
2012-12-10 15:37 ` Michal Simek
2012-12-10 15:52 ` David Laight
2012-12-10 15:52 ` David Laight
2012-12-10 15:52 ` David Laight
2012-12-10 16:05 ` Michal Simek
2012-12-10 16:05 ` Michal Simek
2012-12-10 17:15 ` Thomas Petazzoni
2012-12-10 17:15 ` Thomas Petazzoni
2012-12-10 23:24 ` Rob Herring
2012-12-10 23:24 ` Rob Herring
2012-12-12 16:16 ` Thomas Petazzoni
2012-12-12 16:16 ` Thomas Petazzoni
2012-12-12 17:22 ` Grant Likely
2012-12-12 17:22 ` Grant Likely
2012-12-12 17:29 ` Rob Herring
2012-12-12 17:29 ` Rob Herring
2012-12-10 16:02 ` Rob Herring
2012-12-10 16:02 ` Rob Herring
2012-12-10 16:11 ` Michal Simek
2012-12-10 16:11 ` Michal Simek
2012-12-10 21:43 ` Grant Likely
2012-12-10 21:43 ` Grant Likely
2012-12-10 22:38 ` Benjamin Herrenschmidt [this message]
2012-12-10 22:38 ` Benjamin Herrenschmidt
2012-12-10 23:11 ` Mitch Bradley
2012-12-10 23:11 ` Mitch Bradley
2012-12-10 23:11 ` Mitch Bradley
2012-12-10 21:41 ` Grant Likely
2012-12-10 21:41 ` Grant Likely
2012-12-12 10:37 ` Michal Simek
2012-12-12 10:37 ` Michal Simek
2012-12-12 10:49 ` Grant Likely
2012-12-12 10:49 ` Grant Likely
[not found] ` <CAPcvp5EJH-Q6wd7my+V+FUVE1=hzwMN-yOfHiukGvDmkcoRcsQ@mail.gmail.com>
2012-12-12 12:19 ` Andrew Murray
2012-12-12 12:19 ` Andrew Murray
2012-12-12 13:34 ` Thierry Reding
2012-12-12 13:34 ` Thierry Reding
2012-12-12 16:44 ` Andrew Murray
2012-12-12 16:44 ` Andrew Murray
2012-12-12 16:55 ` Michal Simek
2012-12-12 16:55 ` Michal Simek
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