From: Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Ivan T. Ivanov"
<iivanov-NEYub+7Iv8PQT0dZR+AlfA@public.gmane.org>,
Bjorn Andersson
<bjorn.andersson-/MT0OVThwyLZJqsBc5GL+g@public.gmane.org>,
Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Subject: [PATCH 2/4] spi: qup: Correct selection of FIFO/Block mode
Date: Tue, 13 May 2014 16:34:42 -0500 [thread overview]
Message-ID: <1400016884-9568-3-git-send-email-agross@codeaurora.org> (raw)
In-Reply-To: <1400016884-9568-1-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
This patch fixes the calculation for determining whether to use FIFO or BLOCK
mode.
Signed-off-by: Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
drivers/spi/spi-qup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index ea7017b..57b65e9 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -289,7 +289,7 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
writel_relaxed(opflags, controller->base + QUP_OPERATIONAL);
if (!xfer) {
- dev_err_ratelimited(controller->dev, "unexpected irq %x08 %x08 %x08\n",
+ dev_err_ratelimited(controller->dev, "unexpected irq %08x %08x %08x\n",
qup_err, spi_err, opflags);
return IRQ_HANDLED;
}
@@ -368,7 +368,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
n_words = xfer->len / w_size;
controller->w_size = w_size;
- if (n_words <= controller->in_fifo_sz) {
+ if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
mode = QUP_IO_M_MODE_FIFO;
writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
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WARNING: multiple messages have this Message-ID (diff)
From: agross@codeaurora.org (Andy Gross)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] spi: qup: Correct selection of FIFO/Block mode
Date: Tue, 13 May 2014 16:34:42 -0500 [thread overview]
Message-ID: <1400016884-9568-3-git-send-email-agross@codeaurora.org> (raw)
In-Reply-To: <1400016884-9568-1-git-send-email-agross@codeaurora.org>
This patch fixes the calculation for determining whether to use FIFO or BLOCK
mode.
Signed-off-by: Andy Gross <agross@codeaurora.org>
---
drivers/spi/spi-qup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index ea7017b..57b65e9 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -289,7 +289,7 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
writel_relaxed(opflags, controller->base + QUP_OPERATIONAL);
if (!xfer) {
- dev_err_ratelimited(controller->dev, "unexpected irq %x08 %x08 %x08\n",
+ dev_err_ratelimited(controller->dev, "unexpected irq %08x %08x %08x\n",
qup_err, spi_err, opflags);
return IRQ_HANDLED;
}
@@ -368,7 +368,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
n_words = xfer->len / w_size;
controller->w_size = w_size;
- if (n_words <= controller->in_fifo_sz) {
+ if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
mode = QUP_IO_M_MODE_FIFO;
writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: Andy Gross <agross@codeaurora.org>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Ivan T. Ivanov" <iivanov@mm-sol.com>,
Bjorn Andersson <bjorn.andersson@sonymobile.com>,
Andy Gross <agross@codeaurora.org>
Subject: [PATCH 2/4] spi: qup: Correct selection of FIFO/Block mode
Date: Tue, 13 May 2014 16:34:42 -0500 [thread overview]
Message-ID: <1400016884-9568-3-git-send-email-agross@codeaurora.org> (raw)
In-Reply-To: <1400016884-9568-1-git-send-email-agross@codeaurora.org>
This patch fixes the calculation for determining whether to use FIFO or BLOCK
mode.
Signed-off-by: Andy Gross <agross@codeaurora.org>
---
drivers/spi/spi-qup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index ea7017b..57b65e9 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -289,7 +289,7 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id)
writel_relaxed(opflags, controller->base + QUP_OPERATIONAL);
if (!xfer) {
- dev_err_ratelimited(controller->dev, "unexpected irq %x08 %x08 %x08\n",
+ dev_err_ratelimited(controller->dev, "unexpected irq %08x %08x %08x\n",
qup_err, spi_err, opflags);
return IRQ_HANDLED;
}
@@ -368,7 +368,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
n_words = xfer->len / w_size;
controller->w_size = w_size;
- if (n_words <= controller->in_fifo_sz) {
+ if (n_words <= (controller->in_fifo_sz / sizeof(u32))) {
mode = QUP_IO_M_MODE_FIFO;
writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT);
writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2014-05-13 21:34 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-13 21:34 [PATCH 0/4] spi: qup: Fixes and new version support Andy Gross
2014-05-13 21:34 ` Andy Gross
2014-05-13 21:34 ` [PATCH 3/4] spi: qup: Fix order of spi_register_master Andy Gross
2014-05-13 21:34 ` Andy Gross
[not found] ` <1400016884-9568-4-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-05-19 8:51 ` Ivan T. Ivanov
2014-05-19 8:51 ` Ivan T. Ivanov
2014-05-19 8:51 ` Ivan T. Ivanov
[not found] ` <1400016884-9568-1-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-05-13 21:34 ` [PATCH 1/4] spi: qup: Remove chip select function Andy Gross
2014-05-13 21:34 ` Andy Gross
2014-05-13 21:34 ` Andy Gross
2014-05-19 8:07 ` Ivan T. Ivanov
2014-05-19 8:07 ` Ivan T. Ivanov
2014-06-12 4:02 ` Andy Gross
2014-06-12 4:02 ` Andy Gross
2014-06-12 4:02 ` Andy Gross
2014-05-13 21:34 ` Andy Gross [this message]
2014-05-13 21:34 ` [PATCH 2/4] spi: qup: Correct selection of FIFO/Block mode Andy Gross
2014-05-13 21:34 ` Andy Gross
2014-05-14 15:17 ` Mark Brown
2014-05-14 15:17 ` Mark Brown
[not found] ` <1400016884-9568-3-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-05-19 7:31 ` Ivan T. Ivanov
2014-05-19 7:31 ` Ivan T. Ivanov
2014-05-19 7:31 ` Ivan T. Ivanov
2014-05-13 21:34 ` [PATCH 4/4] spi: qup: Add support for v1.1.1 Andy Gross
2014-05-13 21:34 ` Andy Gross
2014-05-13 21:34 ` Andy Gross
[not found] ` <1400016884-9568-5-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-05-13 22:08 ` Stephen Boyd
2014-05-13 22:08 ` Stephen Boyd
2014-05-13 22:08 ` Stephen Boyd
[not found] ` <20140513220845.GH20486-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-05-13 22:20 ` Andy Gross
2014-05-13 22:20 ` Andy Gross
2014-05-13 22:20 ` Andy Gross
2014-05-19 8:10 ` Ivan T. Ivanov
2014-05-19 8:10 ` Ivan T. Ivanov
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