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From: hean.loong.ong@intel.com (Ong, Hean Loong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv6 3/3] ARM:drm ivip Intel FPGA Video and Image Processing Suite
Date: Mon, 14 Aug 2017 02:27:15 +0000	[thread overview]
Message-ID: <1502677633.2192.0.camel@intel.com> (raw)
In-Reply-To: <b3505a39-9fa9-c993-15cb-d643a34f58a9@infradead.org>

On Fri, 2017-08-11 at 08:21 -0700, Randy Dunlap wrote:
> On 08/10/2017 11:49 PM, Hean-Loong, Ong wrote:
> > 
> > diff --git a/drivers/gpu/drm/ivip/Kconfig
> > b/drivers/gpu/drm/ivip/Kconfig
> > new file mode 100644
> > index 0000000..398c9ab
> > --- /dev/null
> > +++ b/drivers/gpu/drm/ivip/Kconfig
> > @@ -0,0 +1,14 @@
> > +config DRM_IVIP
> > +????????tristate "Intel FGPA Video and Image Processing"
> > +????????depends on DRM && OF
> > +????????select DRM_GEM_CMA_HELPER
> > +????????select DRM_KMS_HELPER
> > +????????select DRM_KMS_FB_HELPER
> > +????????select DRM_KMS_CMA_HELPER
> > +????????help
> > +????????????Choose this option if you have a Intel FPGA Arria 10
> > system
> ??????????????????????????????????????????????an
> 
> > 
> > +????????????and above with an Intel Display Port IP. This does not
> > support
> > +????????????legacy Intel FPGA Cyclone V display port. Currently
> > only single
> > +????????????frame buffer is supported. Note that ACPI and X_86
> > architecture
> > +????????????is not supported for Arria10.If M is selected the
> > module will be
> ????????????????????????????????????Arria10. If M is
> 
> > 
> > +????????????called ivip.
> All of the help text should be indented with one tab + 2 spaces
> according to coding-style.rst.
> 
> 
Noted.

WARNING: multiple messages have this Message-ID (diff)
From: "Ong, Hean Loong" <hean.loong.ong-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: "rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org"
	<rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	"dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
	<dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Vetter,
	Daniel" <daniel.vetter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
	<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org"
	<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>
Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCHv6 3/3] ARM:drm ivip Intel FPGA Video and Image Processing Suite
Date: Mon, 14 Aug 2017 02:27:15 +0000	[thread overview]
Message-ID: <1502677633.2192.0.camel@intel.com> (raw)
In-Reply-To: <b3505a39-9fa9-c993-15cb-d643a34f58a9-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1673 bytes --]

On Fri, 2017-08-11 at 08:21 -0700, Randy Dunlap wrote:
> On 08/10/2017 11:49 PM, Hean-Loong, Ong wrote:
> > 
> > diff --git a/drivers/gpu/drm/ivip/Kconfig
> > b/drivers/gpu/drm/ivip/Kconfig
> > new file mode 100644
> > index 0000000..398c9ab
> > --- /dev/null
> > +++ b/drivers/gpu/drm/ivip/Kconfig
> > @@ -0,0 +1,14 @@
> > +config DRM_IVIP
> > +        tristate "Intel FGPA Video and Image Processing"
> > +        depends on DRM && OF
> > +        select DRM_GEM_CMA_HELPER
> > +        select DRM_KMS_HELPER
> > +        select DRM_KMS_FB_HELPER
> > +        select DRM_KMS_CMA_HELPER
> > +        help
> > +            Choose this option if you have a Intel FPGA Arria 10
> > system
>                                               an
> 
> > 
> > +            and above with an Intel Display Port IP. This does not
> > support
> > +            legacy Intel FPGA Cyclone V display port. Currently
> > only single
> > +            frame buffer is supported. Note that ACPI and X_86
> > architecture
> > +            is not supported for Arria10.If M is selected the
> > module will be
>                                     Arria10. If M is
> 
> > 
> > +            called ivip.
> All of the help text should be indented with one tab + 2 spaces
> according to coding-style.rst.
> 
> 
Noted.N‹§²æìr¸›yúèšØb²X¬¶Ç§vØ^–)Þº{.nÇ+‰·zøœzÚÞz)í…æèw*\x1fjg¬±¨\x1e¶‰šŽŠÝ¢j.ïÛ°\½½MŽúgjÌæa×\x02››–' ™©Þ¢¸\f¢·¦j:+v‰¨ŠwèjØm¶Ÿÿ¾\a«‘êçzZ+ƒùšŽŠÝ¢j"ú!¶i

WARNING: multiple messages have this Message-ID (diff)
From: "Ong, Hean Loong" <hean.loong.ong@intel.com>
To: "rdunlap@infradead.org" <rdunlap@infradead.org>,
	"dinguyen@kernel.org" <dinguyen@kernel.org>,
	"Vetter, Daniel" <daniel.vetter@intel.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"laurent.pinchart@ideasonboard.com" 
	<laurent.pinchart@ideasonboard.com>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCHv6 3/3] ARM:drm ivip Intel FPGA Video and Image Processing Suite
Date: Mon, 14 Aug 2017 02:27:15 +0000	[thread overview]
Message-ID: <1502677633.2192.0.camel@intel.com> (raw)
In-Reply-To: <b3505a39-9fa9-c993-15cb-d643a34f58a9@infradead.org>

On Fri, 2017-08-11 at 08:21 -0700, Randy Dunlap wrote:
> On 08/10/2017 11:49 PM, Hean-Loong, Ong wrote:
> > 
> > diff --git a/drivers/gpu/drm/ivip/Kconfig
> > b/drivers/gpu/drm/ivip/Kconfig
> > new file mode 100644
> > index 0000000..398c9ab
> > --- /dev/null
> > +++ b/drivers/gpu/drm/ivip/Kconfig
> > @@ -0,0 +1,14 @@
> > +config DRM_IVIP
> > +        tristate "Intel FGPA Video and Image Processing"
> > +        depends on DRM && OF
> > +        select DRM_GEM_CMA_HELPER
> > +        select DRM_KMS_HELPER
> > +        select DRM_KMS_FB_HELPER
> > +        select DRM_KMS_CMA_HELPER
> > +        help
> > +            Choose this option if you have a Intel FPGA Arria 10
> > system
>                                               an
> 
> > 
> > +            and above with an Intel Display Port IP. This does not
> > support
> > +            legacy Intel FPGA Cyclone V display port. Currently
> > only single
> > +            frame buffer is supported. Note that ACPI and X_86
> > architecture
> > +            is not supported for Arria10.If M is selected the
> > module will be
>                                     Arria10. If M is
> 
> > 
> > +            called ivip.
> All of the help text should be indented with one tab + 2 spaces
> according to coding-style.rst.
> 
> 
Noted.

  reply	other threads:[~2017-08-14  2:27 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-11  6:49 [PATCHv6 0/3] Hean-Loong, Ong
2017-08-11  6:49 ` Hean-Loong, Ong
2017-08-11  6:49 ` Hean-Loong, Ong
2017-08-11  6:49 ` [PATCHv6 1/3] ARM:dt-bindings Intel FPGA Video and Image Processing Suite Hean-Loong, Ong
2017-08-11  6:49   ` Hean-Loong, Ong
2017-08-17 15:22   ` Rob Herring
2017-08-17 15:22     ` Rob Herring
2017-08-17 15:22     ` Rob Herring
2017-08-18  0:56     ` Ong, Hean Loong
2017-08-18  0:56       ` Ong, Hean Loong
2017-08-18  0:56       ` Ong, Hean Loong
2017-08-11  6:49 ` [PATCHv6 2/3] ARM:socfpga-defconfig " Hean-Loong, Ong
2017-08-11  6:49   ` Hean-Loong, Ong
2017-08-11  6:49 ` [PATCHv6 3/3] ARM:drm ivip " Hean-Loong, Ong
2017-08-11  6:49   ` Hean-Loong, Ong
2017-08-11  6:49   ` Hean-Loong, Ong
2017-08-11 15:21   ` Randy Dunlap
2017-08-11 15:21     ` Randy Dunlap
2017-08-14  2:27     ` Ong, Hean Loong [this message]
2017-08-14  2:27       ` Ong, Hean Loong
2017-08-14  2:27       ` Ong, Hean Loong
     [not found] ` <2740499.pDDaZTb32r@avalon>
     [not found]   ` <1503045283.2075.8.camel@intel.com>
2017-08-18 13:11     ` [PATCHv6 1/3] ARM:dt-bindings " Laurent Pinchart
2017-08-21  1:40       ` Ong, Hean Loong
2017-08-21  5:09         ` Laurent Pinchart
2017-08-24  5:41           ` Ong, Hean Loong
2017-08-24  9:39             ` Laurent Pinchart
2017-08-25  1:21               ` Ong, Hean Loong
2017-08-25  9:32                 ` Laurent Pinchart
2017-08-28  5:06               ` Ong, Hean Loong
2017-09-04  6:09                 ` Ong, Hean Loong
2017-09-12 22:47                   ` Laurent Pinchart

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