* [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
@ 2018-05-02 19:03 ` Oscar Mateo
2018-05-08 23:21 ` John Spotswood
2018-05-02 19:03 ` [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake Oscar Mateo
` (6 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Oscar Mateo @ 2018-05-02 19:03 UTC (permalink / raw)
To: intel-gfx
Sanitize the enable_guc option so that we can enable HuC authentication,
but nothing else. The firmware interface has changed quite dramatically
in Gen11, so it will take a while before we can submit workloads to the
GuC with guarantees.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_uc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 1cffaf7..d2a935c 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -63,6 +63,8 @@ static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)
enable_guc |= ENABLE_GUC_LOAD_HUC;
/* Any platform specific fine-tuning can be done here */
+ if (INTEL_GEN(dev_priv) >= 11)
+ enable_guc &= ~ENABLE_GUC_SUBMISSION;
return enable_guc;
}
@@ -115,6 +117,14 @@ static void sanitize_options_early(struct drm_i915_private *dev_priv)
yesno(intel_uc_is_using_guc_submission()),
yesno(intel_uc_is_using_huc()));
+ /* Verify GuC submission support */
+ if (intel_uc_is_using_guc_submission() && INTEL_GEN(dev_priv) >= 11) {
+ DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
+ "enable_guc", i915_modparams.enable_guc,
+ "submission not supported");
+ i915_modparams.enable_guc &= ~ENABLE_GUC_SUBMISSION;
+ }
+
/* Verify GuC firmware availability */
if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
--
1.9.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
2018-05-02 19:03 ` [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now Oscar Mateo
@ 2018-05-08 23:21 ` John Spotswood
0 siblings, 0 replies; 17+ messages in thread
From: John Spotswood @ 2018-05-08 23:21 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> Sanitize the enable_guc option so that we can enable HuC
> authentication,
> but nothing else. The firmware interface has changed quite
> dramatically
> in Gen11, so it will take a while before we can submit workloads to
> the
> GuC with guarantees.
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
Reviewed-by: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_uc.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_uc.c
> b/drivers/gpu/drm/i915/intel_uc.c
> index 1cffaf7..d2a935c 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -63,6 +63,8 @@ static int __get_platform_enable_guc(struct
> drm_i915_private *dev_priv)
> enable_guc |= ENABLE_GUC_LOAD_HUC;
>
> /* Any platform specific fine-tuning can be done here */
> + if (INTEL_GEN(dev_priv) >= 11)
> + enable_guc &= ~ENABLE_GUC_SUBMISSION;
>
> return enable_guc;
> }
> @@ -115,6 +117,14 @@ static void sanitize_options_early(struct
> drm_i915_private *dev_priv)
> yesno(intel_uc_is_using_guc_submission()),
> yesno(intel_uc_is_using_huc()));
>
> + /* Verify GuC submission support */
> + if (intel_uc_is_using_guc_submission() &&
> INTEL_GEN(dev_priv) >= 11) {
> + DRM_WARN("Incompatible option detected: %s=%d,
> %s!\n",
> + "enable_guc", i915_modparams.enable_guc,
> + "submission not supported");
> + i915_modparams.enable_guc &= ~ENABLE_GUC_SUBMISSION;
> + }
> +
> /* Verify GuC firmware availability */
> if (intel_uc_is_using_guc() &&
> !intel_uc_fw_is_selected(guc_fw)) {
> DRM_WARN("Incompatible option detected: %s=%d,
> %s!\n",
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^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
2018-05-02 19:03 ` [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now Oscar Mateo
@ 2018-05-02 19:03 ` Oscar Mateo
2018-05-08 23:22 ` John Spotswood
2018-05-02 19:03 ` [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version " Oscar Mateo
` (5 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Oscar Mateo @ 2018-05-02 19:03 UTC (permalink / raw)
To: intel-gfx
Only enough to achieve HuC authentication. No GuC submission
or any other feature for the time being.
v2: Fix extra space
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_guc.c | 10 ++++++++--
drivers/gpu/drm/i915/intel_guc_fwif.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 116f4cc..b1b69e1 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc *guc)
params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
- params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
- GUC_CTL_VCS2_ENABLED;
+ if (INTEL_GEN(dev_priv) >= 11) {
+ params[GUC_CTL_FEATURE] |= GEN11_GUC_CTL_DISABLE_SCHEDULER;
+ } else {
+ params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER;
+ params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;
+ }
params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
@@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
u32 pgs = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
+ GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
+
params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 0867ba7..781c0c0 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -106,6 +106,7 @@
#define GUC_CTL_PREEMPTION_LOG (1 << 5)
#define GUC_CTL_ENABLE_SLPC (1 << 7)
#define GUC_CTL_RESET_ON_PREMPT_FAILURE (1 << 8)
+#define GEN11_GUC_CTL_DISABLE_SCHEDULER (1 << 14)
#define GUC_CTL_DEBUG 8
#define GUC_LOG_VERBOSITY_SHIFT 0
--
1.9.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
2018-05-02 19:03 ` [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake Oscar Mateo
@ 2018-05-08 23:22 ` John Spotswood
0 siblings, 0 replies; 17+ messages in thread
From: John Spotswood @ 2018-05-08 23:22 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> Only enough to achieve HuC authentication. No GuC submission
> or any other feature for the time being.
>
> v2: Fix extra space
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
Reviewed-by: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc.c | 10 ++++++++--
> drivers/gpu/drm/i915/intel_guc_fwif.h | 1 +
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc.c
> b/drivers/gpu/drm/i915/intel_guc.c
> index 116f4cc..b1b69e1 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -245,8 +245,12 @@ void intel_guc_init_params(struct intel_guc
> *guc)
>
> params[GUC_CTL_WA] |= GUC_CTL_WA_UK_BY_DRIVER;
>
> - params[GUC_CTL_FEATURE] |= GUC_CTL_DISABLE_SCHEDULER |
> - GUC_CTL_VCS2_ENABLED;
> + if (INTEL_GEN(dev_priv) >= 11) {
> + params[GUC_CTL_FEATURE] |=
> GEN11_GUC_CTL_DISABLE_SCHEDULER;
> + } else {
> + params[GUC_CTL_FEATURE] |=
> GUC_CTL_DISABLE_SCHEDULER;
> + params[GUC_CTL_FEATURE] |= GUC_CTL_VCS2_ENABLED;
> + }
>
> params[GUC_CTL_LOG_PARAMS] = guc->log.flags;
>
> @@ -259,6 +263,8 @@ void intel_guc_init_params(struct intel_guc *guc)
> u32 pgs = intel_guc_ggtt_offset(guc, guc-
> >stage_desc_pool);
> u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
>
> + GEM_BUG_ON(INTEL_GEN(dev_priv) >= 11);
> +
> params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
> params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
> b/drivers/gpu/drm/i915/intel_guc_fwif.h
> index 0867ba7..781c0c0 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> @@ -106,6 +106,7 @@
> #define GUC_CTL_PREEMPTION_LOG (1 << 5)
> #define GUC_CTL_ENABLE_SLPC (1 << 7)
> #define GUC_CTL_RESET_ON_PREMPT_FAILURE (1 << 8)
> +#define GEN11_GUC_CTL_DISABLE_SCHEDULER (1 << 14)
>
> #define GUC_CTL_DEBUG 8
> #define GUC_LOG_VERBOSITY_SHIFT 0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
2018-05-02 19:03 ` [PATCH 1/5] drm/i915/icl/guc: Do not allow GuC submission on Icelake for now Oscar Mateo
2018-05-02 19:03 ` [PATCH 2/5] drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake Oscar Mateo
@ 2018-05-02 19:03 ` Oscar Mateo
2018-05-08 23:22 ` John Spotswood
2018-05-02 19:03 ` [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC " Oscar Mateo
` (4 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Oscar Mateo @ 2018-05-02 19:03 UTC (permalink / raw)
To: intel-gfx
A GuC firmware for Icelake is now available. Let's use it.
v2: Split out the Cannonlake stuff in a separate patch (Michal)
v3: Rebased
v4:
- Rebased
- Split out MODULE_FIRMWARE so we don't accidentally push it
before linux-firmware (Joonas)
v5: Use the latest firmware (v23.120)
v6: Use the latest firmware (v26.171)
v7: Rebased (remove guc-core-family)
v8: Use the latest firmware (v27.182)
v9: Use the latest firmware (v27.185)
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcc..dfdf60c 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -39,6 +39,9 @@
#define KBL_FW_MAJOR 9
#define KBL_FW_MINOR 39
+#define ICL_FW_MAJOR 27
+#define ICL_FW_MINOR 185
+
#define GUC_FW_PATH(platform, major, minor) \
"i915/" __stringify(platform) "_guc_ver" __stringify(major) "_" __stringify(minor) ".bin"
@@ -51,6 +54,8 @@
#define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR, KBL_FW_MINOR)
MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
+#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR, ICL_FW_MINOR)
+
static void guc_fw_select(struct intel_uc_fw *guc_fw)
{
struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
@@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
guc_fw->path = I915_KBL_GUC_UCODE;
guc_fw->major_ver_wanted = KBL_FW_MAJOR;
guc_fw->minor_ver_wanted = KBL_FW_MINOR;
+ } else if (IS_ICELAKE(dev_priv)) {
+ guc_fw->path = I915_ICL_GUC_UCODE;
+ guc_fw->major_ver_wanted = ICL_FW_MAJOR;
+ guc_fw->minor_ver_wanted = ICL_FW_MINOR;
} else {
DRM_WARN("%s: No firmware known for this platform!\n",
intel_uc_fw_type_repr(guc_fw->type));
--
1.9.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version for Icelake
2018-05-02 19:03 ` [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version " Oscar Mateo
@ 2018-05-08 23:22 ` John Spotswood
0 siblings, 0 replies; 17+ messages in thread
From: John Spotswood @ 2018-05-08 23:22 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> A GuC firmware for Icelake is now available. Let's use it.
>
> v2: Split out the Cannonlake stuff in a separate patch (Michal)
>
> v3: Rebased
>
> v4:
> - Rebased
> - Split out MODULE_FIRMWARE so we don't accidentally push it
> before linux-firmware (Joonas)
>
> v5: Use the latest firmware (v23.120)
> v6: Use the latest firmware (v26.171)
> v7: Rebased (remove guc-core-family)
> v8: Use the latest firmware (v27.182)
> v9: Use the latest firmware (v27.185)
>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
Reviewed-by: John Spotswood <john.a.spotswood@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
> b/drivers/gpu/drm/i915/intel_guc_fw.c
> index a9e6fcc..dfdf60c 100644
> --- a/drivers/gpu/drm/i915/intel_guc_fw.c
> +++ b/drivers/gpu/drm/i915/intel_guc_fw.c
> @@ -39,6 +39,9 @@
> #define KBL_FW_MAJOR 9
> #define KBL_FW_MINOR 39
>
> +#define ICL_FW_MAJOR 27
> +#define ICL_FW_MINOR 185
> +
> #define GUC_FW_PATH(platform, major, minor) \
> "i915/" __stringify(platform) "_guc_ver" __stringify(major)
> "_" __stringify(minor) ".bin"
>
> @@ -51,6 +54,8 @@
> #define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR,
> KBL_FW_MINOR)
> MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
>
> +#define I915_ICL_GUC_UCODE GUC_FW_PATH(icl, ICL_FW_MAJOR,
> ICL_FW_MINOR)
> +
> static void guc_fw_select(struct intel_uc_fw *guc_fw)
> {
> struct intel_guc *guc = container_of(guc_fw, struct
> intel_guc, fw);
> @@ -77,6 +82,10 @@ static void guc_fw_select(struct intel_uc_fw
> *guc_fw)
> guc_fw->path = I915_KBL_GUC_UCODE;
> guc_fw->major_ver_wanted = KBL_FW_MAJOR;
> guc_fw->minor_ver_wanted = KBL_FW_MINOR;
> + } else if (IS_ICELAKE(dev_priv)) {
> + guc_fw->path = I915_ICL_GUC_UCODE;
> + guc_fw->major_ver_wanted = ICL_FW_MAJOR;
> + guc_fw->minor_ver_wanted = ICL_FW_MINOR;
> } else {
> DRM_WARN("%s: No firmware known for this
> platform!\n",
> intel_uc_fw_type_repr(guc_fw->type));
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^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
` (2 preceding siblings ...)
2018-05-02 19:03 ` [PATCH 3/5] drm/i915/icl/guc: Define the GuC firmware version " Oscar Mateo
@ 2018-05-02 19:03 ` Oscar Mateo
2018-05-04 22:26 ` John Spotswood
2018-05-08 23:22 ` John Spotswood
2018-05-02 19:03 ` [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version " Oscar Mateo
` (3 subsequent siblings)
7 siblings, 2 replies; 17+ messages in thread
From: Oscar Mateo @ 2018-05-02 19:03 UTC (permalink / raw)
To: intel-gfx
The register to check for correct HuC authentication by the GuC
has changed in Icelake. Look into the right register & bit.
v2: rebased.
v3: rebased.
v4: Fix I915_PARAM_HUC_STATUS as well (Tony)
v5: Fix duplicate Cc
BSpec: 19686
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
drivers/gpu/drm/i915/intel_huc.c | 23 +++++++++++++++++++----
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h b/drivers/gpu/drm/i915/intel_guc_reg.h
index d860847..9f14f9f 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -76,6 +76,9 @@
#define HUC_STATUS2 _MMIO(0xD3B0)
#define HUC_FW_VERIFIED (1<<7)
+#define HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
+#define HUC_LOAD_SUCCESSFUL (1 << 0)
+
#define GUC_WOPCM_SIZE _MMIO(0xc050)
#define GUC_WOPCM_SIZE_LOCKED (1<<0)
#define GUC_WOPCM_SIZE_SHIFT 12
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 2912852..b509756 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
struct drm_i915_private *i915 = huc_to_i915(huc);
struct intel_guc *guc = &i915->guc;
struct i915_vma *vma;
+ i915_reg_t status_reg;
u32 status;
+ u32 status_ok;
int ret;
+ if (INTEL_GEN(i915) >= 11) {
+ status_reg = HUC_KERNEL_LOAD_INFO;
+ status_ok = HUC_LOAD_SUCCESSFUL;
+ } else {
+ status_reg = HUC_STATUS2;
+ status_ok = HUC_FW_VERIFIED;
+ }
+
if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
return -ENOEXEC;
@@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
/* Check authentication status, it should be done by now */
ret = __intel_wait_for_register(i915,
- HUC_STATUS2,
- HUC_FW_VERIFIED,
- HUC_FW_VERIFIED,
+ status_reg,
+ status_ok,
+ status_ok,
2, 50, &status);
if (ret) {
DRM_ERROR("HuC: Firmware not verified %#x\n", status);
@@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc *huc)
return -ENODEV;
intel_runtime_pm_get(dev_priv);
- status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ status = I915_READ(HUC_KERNEL_LOAD_INFO) & HUC_LOAD_SUCCESSFUL;
+ else
+ status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
intel_runtime_pm_put(dev_priv);
return status;
--
1.9.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
2018-05-02 19:03 ` [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC " Oscar Mateo
@ 2018-05-04 22:26 ` John Spotswood
2018-05-08 21:36 ` Oscar Mateo
2018-05-08 23:22 ` John Spotswood
1 sibling, 1 reply; 17+ messages in thread
From: John Spotswood @ 2018-05-04 22:26 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> The register to check for correct HuC authentication by the GuC
> has changed in Icelake. Look into the right register & bit.
>
> v2: rebased.
> v3: rebased.
> v4: Fix I915_PARAM_HUC_STATUS as well (Tony)
> v5: Fix duplicate Cc
>
> BSpec: 19686
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_huc.c | 23 +++++++++++++++++++----
> 2 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
> b/drivers/gpu/drm/i915/intel_guc_reg.h
> index d860847..9f14f9f 100644
> --- a/drivers/gpu/drm/i915/intel_guc_reg.h
> +++ b/drivers/gpu/drm/i915/intel_guc_reg.h
> @@ -76,6 +76,9 @@
> #define HUC_STATUS2 _MMIO(0xD3B0)
> #define HUC_FW_VERIFIED (1<<7)
>
> +#define HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
> +#define HUC_LOAD_SUCCESSFUL (1 << 0)
> +
> #define GUC_WOPCM_SIZE _MMIO(0xc050)
> #define GUC_WOPCM_SIZE_LOCKED (1<<0)
> #define GUC_WOPCM_SIZE_SHIFT 12
> diff --git a/drivers/gpu/drm/i915/intel_huc.c
> b/drivers/gpu/drm/i915/intel_huc.c
> index 2912852..b509756 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
> struct drm_i915_private *i915 = huc_to_i915(huc);
> struct intel_guc *guc = &i915->guc;
> struct i915_vma *vma;
> + i915_reg_t status_reg;
> u32 status;
> + u32 status_ok;
> int ret;
>
> + if (INTEL_GEN(i915) >= 11) {
> + status_reg = HUC_KERNEL_LOAD_INFO;
> + status_ok = HUC_LOAD_SUCCESSFUL;
> + } else {
> + status_reg = HUC_STATUS2;
> + status_ok = HUC_FW_VERIFIED;
> + }
> +
> if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> return -ENOEXEC;
>
> @@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
>
> /* Check authentication status, it should be done by now */
> ret = __intel_wait_for_register(i915,
> - HUC_STATUS2,
> - HUC_FW_VERIFIED,
> - HUC_FW_VERIFIED,
> + status_reg,
> + status_ok,
> + status_ok,
> 2, 50, &status);
Minor question: You are checking different registers depending on gen.
Will the fast and slow timeout values apply equally to both situations
?
> if (ret) {
> DRM_ERROR("HuC: Firmware not verified %#x\n",
> status);
> @@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc
> *huc)
> return -ENODEV;
>
> intel_runtime_pm_get(dev_priv);
> - status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + status = I915_READ(HUC_KERNEL_LOAD_INFO) &
> HUC_LOAD_SUCCESSFUL;
> + else
> + status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> +
> intel_runtime_pm_put(dev_priv);
>
> return status;
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
2018-05-04 22:26 ` John Spotswood
@ 2018-05-08 21:36 ` Oscar Mateo
0 siblings, 0 replies; 17+ messages in thread
From: Oscar Mateo @ 2018-05-08 21:36 UTC (permalink / raw)
To: John Spotswood, intel-gfx
On 05/04/2018 03:26 PM, John Spotswood wrote:
> On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
>> The register to check for correct HuC authentication by the GuC
>> has changed in Icelake. Look into the right register & bit.
>>
>> v2: rebased.
>> v3: rebased.
>> v4: Fix I915_PARAM_HUC_STATUS as well (Tony)
>> v5: Fix duplicate Cc
>>
>> BSpec: 19686
>>
>> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
>> Cc: Tony Ye <tony.ye@intel.com>
>> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> Cc: Michel Thierry <michel.thierry@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: John Spotswood <john.a.spotswood@intel.com>
>> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
>> drivers/gpu/drm/i915/intel_huc.c | 23 +++++++++++++++++++----
>> 2 files changed, 22 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
>> b/drivers/gpu/drm/i915/intel_guc_reg.h
>> index d860847..9f14f9f 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_reg.h
>> +++ b/drivers/gpu/drm/i915/intel_guc_reg.h
>> @@ -76,6 +76,9 @@
>> #define HUC_STATUS2 _MMIO(0xD3B0)
>> #define HUC_FW_VERIFIED (1<<7)
>>
>> +#define HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
>> +#define HUC_LOAD_SUCCESSFUL (1 << 0)
>> +
>> #define GUC_WOPCM_SIZE _MMIO(0xc050)
>> #define GUC_WOPCM_SIZE_LOCKED (1<<0)
>> #define GUC_WOPCM_SIZE_SHIFT 12
>> diff --git a/drivers/gpu/drm/i915/intel_huc.c
>> b/drivers/gpu/drm/i915/intel_huc.c
>> index 2912852..b509756 100644
>> --- a/drivers/gpu/drm/i915/intel_huc.c
>> +++ b/drivers/gpu/drm/i915/intel_huc.c
>> @@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
>> struct drm_i915_private *i915 = huc_to_i915(huc);
>> struct intel_guc *guc = &i915->guc;
>> struct i915_vma *vma;
>> + i915_reg_t status_reg;
>> u32 status;
>> + u32 status_ok;
>> int ret;
>>
>> + if (INTEL_GEN(i915) >= 11) {
>> + status_reg = HUC_KERNEL_LOAD_INFO;
>> + status_ok = HUC_LOAD_SUCCESSFUL;
>> + } else {
>> + status_reg = HUC_STATUS2;
>> + status_ok = HUC_FW_VERIFIED;
>> + }
>> +
>> if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
>> return -ENOEXEC;
>>
>> @@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
>>
>> /* Check authentication status, it should be done by now */
>> ret = __intel_wait_for_register(i915,
>> - HUC_STATUS2,
>> - HUC_FW_VERIFIED,
>> - HUC_FW_VERIFIED,
>> + status_reg,
>> + status_ok,
>> + status_ok,
>> 2, 50, &status);
> Minor question: You are checking different registers depending on gen.
> Will the fast and slow timeout values apply equally to both situations
> ?
AFAICT, the process to authenticate the HuC has not changed, and the
only difference is which register to use to check the result. If the
timeout values were fine before, they should be fine now...
>
>> if (ret) {
>> DRM_ERROR("HuC: Firmware not verified %#x\n",
>> status);
>> @@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc
>> *huc)
>> return -ENODEV;
>>
>> intel_runtime_pm_get(dev_priv);
>> - status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
>> +
>> + if (INTEL_GEN(dev_priv) >= 11)
>> + status = I915_READ(HUC_KERNEL_LOAD_INFO) &
>> HUC_LOAD_SUCCESSFUL;
>> + else
>> + status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
>> +
>> intel_runtime_pm_put(dev_priv);
>>
>> return status;
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
2018-05-02 19:03 ` [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC " Oscar Mateo
2018-05-04 22:26 ` John Spotswood
@ 2018-05-08 23:22 ` John Spotswood
1 sibling, 0 replies; 17+ messages in thread
From: John Spotswood @ 2018-05-08 23:22 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> The register to check for correct HuC authentication by the GuC
> has changed in Icelake. Look into the right register & bit.
>
> v2: rebased.
> v3: rebased.
> v4: Fix I915_PARAM_HUC_STATUS as well (Tony)
> v5: Fix duplicate Cc
>
> BSpec: 19686
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
Reviewed-by: John Spotswood <john.a.spotswood@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_huc.c | 23 +++++++++++++++++++----
> 2 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
> b/drivers/gpu/drm/i915/intel_guc_reg.h
> index d860847..9f14f9f 100644
> --- a/drivers/gpu/drm/i915/intel_guc_reg.h
> +++ b/drivers/gpu/drm/i915/intel_guc_reg.h
> @@ -76,6 +76,9 @@
> #define HUC_STATUS2 _MMIO(0xD3B0)
> #define HUC_FW_VERIFIED (1<<7)
>
> +#define HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
> +#define HUC_LOAD_SUCCESSFUL (1 << 0)
> +
> #define GUC_WOPCM_SIZE _MMIO(0xc050)
> #define GUC_WOPCM_SIZE_LOCKED (1<<0)
> #define GUC_WOPCM_SIZE_SHIFT 12
> diff --git a/drivers/gpu/drm/i915/intel_huc.c
> b/drivers/gpu/drm/i915/intel_huc.c
> index 2912852..b509756 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -48,9 +48,19 @@ int intel_huc_auth(struct intel_huc *huc)
> struct drm_i915_private *i915 = huc_to_i915(huc);
> struct intel_guc *guc = &i915->guc;
> struct i915_vma *vma;
> + i915_reg_t status_reg;
> u32 status;
> + u32 status_ok;
> int ret;
>
> + if (INTEL_GEN(i915) >= 11) {
> + status_reg = HUC_KERNEL_LOAD_INFO;
> + status_ok = HUC_LOAD_SUCCESSFUL;
> + } else {
> + status_reg = HUC_STATUS2;
> + status_ok = HUC_FW_VERIFIED;
> + }
> +
> if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> return -ENOEXEC;
>
> @@ -72,9 +82,9 @@ int intel_huc_auth(struct intel_huc *huc)
>
> /* Check authentication status, it should be done by now */
> ret = __intel_wait_for_register(i915,
> - HUC_STATUS2,
> - HUC_FW_VERIFIED,
> - HUC_FW_VERIFIED,
> + status_reg,
> + status_ok,
> + status_ok,
> 2, 50, &status);
> if (ret) {
> DRM_ERROR("HuC: Firmware not verified %#x\n",
> status);
> @@ -112,7 +122,12 @@ int intel_huc_check_status(struct intel_huc
> *huc)
> return -ENODEV;
>
> intel_runtime_pm_get(dev_priv);
> - status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + status = I915_READ(HUC_KERNEL_LOAD_INFO) &
> HUC_LOAD_SUCCESSFUL;
> + else
> + status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> +
> intel_runtime_pm_put(dev_priv);
>
> return status;
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version for Icelake
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
` (3 preceding siblings ...)
2018-05-02 19:03 ` [PATCH 4/5] drm/i915/icl/huc: Correctly authenticate the HuC " Oscar Mateo
@ 2018-05-02 19:03 ` Oscar Mateo
2018-05-08 23:23 ` John Spotswood
2018-05-02 19:34 ` ✓ Fi.CI.BAT: success for Enable HuC authentication in Icelake (rev2) Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 17+ messages in thread
From: Oscar Mateo @ 2018-05-02 19:03 UTC (permalink / raw)
To: intel-gfx
This patch adds the support to load HuC on ICL.
Version 8.02.2678
v2 (James): Rebase
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c b/drivers/gpu/drm/i915/intel_huc_fw.c
index f93d238..795d585 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -34,6 +34,10 @@
#define KBL_HUC_FW_MINOR 00
#define KBL_BLD_NUM 1810
+#define ICL_HUC_FW_MAJOR 8
+#define ICL_HUC_FW_MINOR 02
+#define ICL_BLD_NUM 2678
+
#define HUC_FW_PATH(platform, major, minor, bld_num) \
"i915/" __stringify(platform) "_huc_ver" __stringify(major) "_" \
__stringify(minor) "_" __stringify(bld_num) ".bin"
@@ -50,6 +54,9 @@
KBL_HUC_FW_MINOR, KBL_BLD_NUM)
MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
+#define I915_ICL_HUC_UCODE HUC_FW_PATH(icl, ICL_HUC_FW_MAJOR, \
+ ICL_HUC_FW_MINOR, ICL_BLD_NUM)
+
static void huc_fw_select(struct intel_uc_fw *huc_fw)
{
struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
@@ -76,6 +83,10 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
huc_fw->path = I915_KBL_HUC_UCODE;
huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
+ } else if (IS_ICELAKE(dev_priv)) {
+ huc->fw.path = I915_ICL_HUC_UCODE;
+ huc->fw.major_ver_wanted = ICL_HUC_FW_MAJOR;
+ huc->fw.minor_ver_wanted = ICL_HUC_FW_MINOR;
} else {
DRM_WARN("%s: No firmware known for this platform!\n",
intel_uc_fw_type_repr(huc_fw->type));
--
1.9.1
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^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version for Icelake
2018-05-02 19:03 ` [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version " Oscar Mateo
@ 2018-05-08 23:23 ` John Spotswood
0 siblings, 0 replies; 17+ messages in thread
From: John Spotswood @ 2018-05-08 23:23 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx
On Wed, 2018-05-02 at 12:03 -0700, Oscar Mateo wrote:
> This patch adds the support to load HuC on ICL.
> Version 8.02.2678
>
> v2 (James): Rebase
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Spotswood <john.a.spotswood@intel.com>
Reviewed-by: John Spotswood <john.a.spotswood@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
> b/drivers/gpu/drm/i915/intel_huc_fw.c
> index f93d238..795d585 100644
> --- a/drivers/gpu/drm/i915/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/intel_huc_fw.c
> @@ -34,6 +34,10 @@
> #define KBL_HUC_FW_MINOR 00
> #define KBL_BLD_NUM 1810
>
> +#define ICL_HUC_FW_MAJOR 8
> +#define ICL_HUC_FW_MINOR 02
> +#define ICL_BLD_NUM 2678
> +
> #define HUC_FW_PATH(platform, major, minor, bld_num) \
> "i915/" __stringify(platform) "_huc_ver" __stringify(major)
> "_" \
> __stringify(minor) "_" __stringify(bld_num) ".bin"
> @@ -50,6 +54,9 @@
> KBL_HUC_FW_MINOR, KBL_BLD_NUM)
> MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
>
> +#define I915_ICL_HUC_UCODE HUC_FW_PATH(icl, ICL_HUC_FW_MAJOR, \
> + ICL_HUC_FW_MINOR, ICL_BLD_NUM)
> +
> static void huc_fw_select(struct intel_uc_fw *huc_fw)
> {
> struct intel_huc *huc = container_of(huc_fw, struct
> intel_huc, fw);
> @@ -76,6 +83,10 @@ static void huc_fw_select(struct intel_uc_fw
> *huc_fw)
> huc_fw->path = I915_KBL_HUC_UCODE;
> huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
> huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
> + } else if (IS_ICELAKE(dev_priv)) {
> + huc->fw.path = I915_ICL_HUC_UCODE;
> + huc->fw.major_ver_wanted = ICL_HUC_FW_MAJOR;
> + huc->fw.minor_ver_wanted = ICL_HUC_FW_MINOR;
> } else {
> DRM_WARN("%s: No firmware known for this
> platform!\n",
> intel_uc_fw_type_repr(huc_fw->type));
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for Enable HuC authentication in Icelake (rev2)
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
` (4 preceding siblings ...)
2018-05-02 19:03 ` [PATCH 5/5] drm/i915/icl/huc: Define the HuC firmware version " Oscar Mateo
@ 2018-05-02 19:34 ` Patchwork
2018-05-02 19:44 ` [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo Lozano
2018-05-03 2:13 ` ✗ Fi.CI.IGT: failure for Enable HuC authentication in Icelake (rev2) Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2018-05-02 19:34 UTC (permalink / raw)
To: Oscar Mateo; +Cc: intel-gfx
== Series Details ==
Series: Enable HuC authentication in Icelake (rev2)
URL : https://patchwork.freedesktop.org/series/42433/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4123 -> Patchwork_8881 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42433/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_8881 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s3:
fi-ivb-3520m: PASS -> DMESG-WARN (fdo#106084)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
==== Possible fixes ====
igt@kms_chamelium@dp-edid-read:
fi-kbl-7500u: FAIL (fdo#103841) -> PASS
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-cfl-s3: FAIL (fdo#100368, fdo#103928) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-ivb-3520m: DMESG-WARN (fdo#106084) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
== Participating hosts (40 -> 37) ==
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4123 -> Patchwork_8881
CI_DRM_4123: cbb6a0aa933f3323a8deb331aca503b7388abc06 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4456: 43761534c6482dc67b9c3d8eeecd425ef40b3c4c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8881: 5a7bb91ea6af6c1ca4378b2b82b8d3fff5e73344 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4456: 30b992bdc047073e1fe99b1ac622f026618a8081 @ git://anongit.freedesktop.org/piglit
== Linux commits ==
5a7bb91ea6af drm/i915/icl/huc: Define the HuC firmware version for Icelake
3ee78d40092c drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
ee6dd6d4b23e drm/i915/icl/guc: Define the GuC firmware version for Icelake
a49114b46ffa drm/i915/icl/guc: Pass the bare minimum GuC init parameters for Icelake
08e2b28c4058 drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8881/issues.html
_______________________________________________
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^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v2 0/8] Enable HuC authentication in Icelake
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
` (5 preceding siblings ...)
2018-05-02 19:34 ` ✓ Fi.CI.BAT: success for Enable HuC authentication in Icelake (rev2) Patchwork
@ 2018-05-02 19:44 ` Oscar Mateo Lozano
2018-05-03 2:13 ` ✗ Fi.CI.IGT: failure for Enable HuC authentication in Icelake (rev2) Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Oscar Mateo Lozano @ 2018-05-02 19:44 UTC (permalink / raw)
To: intel-gfx
Obviously the subject is wrong: it should say 0/5 instead of 0/8 (I
copied the subject from the cover letter meant from internal, without
realizing the number of patches was different).
On 5/2/2018 12:03 PM, Oscar Mateo wrote:
> Bare minimum number of patches to get the GuC to authenticate the
> HuC correctly (i915.enable_guc=2).
>
> Oscar Mateo (5):
> drm/i915/icl/guc: Do not allow GuC submission on Icelake for now
> drm/i915/icl/guc: Pass the bare minimum GuC init parameters for
> Icelake
> drm/i915/icl/guc: Define the GuC firmware version for Icelake
> drm/i915/icl/huc: Correctly authenticate the HuC for Icelake
> drm/i915/icl/huc: Define the HuC firmware version for Icelake
Joonas: can you take a look at these? The Media team is blocked on these
patches.
Thanks,
Oscar
> drivers/gpu/drm/i915/intel_guc.c | 10 ++++++++--
> drivers/gpu/drm/i915/intel_guc_fw.c | 9 +++++++++
> drivers/gpu/drm/i915/intel_guc_fwif.h | 1 +
> drivers/gpu/drm/i915/intel_guc_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_huc.c | 23 +++++++++++++++++++----
> drivers/gpu/drm/i915/intel_huc_fw.c | 11 +++++++++++
> drivers/gpu/drm/i915/intel_uc.c | 10 ++++++++++
> 7 files changed, 61 insertions(+), 6 deletions(-)
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* ✗ Fi.CI.IGT: failure for Enable HuC authentication in Icelake (rev2)
2018-05-02 19:03 [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo
` (6 preceding siblings ...)
2018-05-02 19:44 ` [PATCH v2 0/8] Enable HuC authentication in Icelake Oscar Mateo Lozano
@ 2018-05-03 2:13 ` Patchwork
7 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2018-05-03 2:13 UTC (permalink / raw)
To: Oscar Mateo; +Cc: intel-gfx
== Series Details ==
Series: Enable HuC authentication in Icelake (rev2)
URL : https://patchwork.freedesktop.org/series/42433/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4123_full -> Patchwork_8881_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_8881_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_8881_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/42433/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_8881_full:
=== IGT changes ===
==== Possible regressions ====
igt@gem_exec_await@wide-contexts:
shard-apl: PASS -> FAIL
==== Warnings ====
igt@gem_exec_schedule@deep-bsd1:
shard-kbl: PASS -> SKIP +2
== Known issues ==
Here are the changes found in Patchwork_8881_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_softpin@noreloc-s3:
shard-kbl: PASS -> DMESG-WARN (fdo#103313)
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-glk: PASS -> INCOMPLETE (k.org#198133, fdo#103359)
igt@kms_flip@2x-dpms-vs-vblank-race:
shard-hsw: PASS -> FAIL (fdo#103060)
igt@kms_flip@2x-plain-flip-ts-check-interruptible:
shard-hsw: PASS -> FAIL (fdo#100368) +1
igt@kms_flip@absolute-wf_vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#106087)
igt@kms_flip@modeset-vs-vblank-race-interruptible:
shard-glk: PASS -> FAIL (fdo#103060)
igt@kms_setmode@basic:
shard-hsw: PASS -> FAIL (fdo#99912)
igt@kms_sysfs_edid_timing:
shard-apl: PASS -> WARN (fdo#100047)
==== Possible fixes ====
igt@kms_atomic_interruptible@universal-setplane-primary:
shard-kbl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +40
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: FAIL (fdo#105363) -> PASS
igt@kms_flip@flip-vs-wf_vblank-interruptible:
shard-glk: FAIL (fdo#100368) -> PASS +2
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#106087 https://bugs.freedesktop.org/show_bug.cgi?id=106087
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (7 -> 7) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4123 -> Patchwork_8881
CI_DRM_4123: cbb6a0aa933f3323a8deb331aca503b7388abc06 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4456: 43761534c6482dc67b9c3d8eeecd425ef40b3c4c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_8881: 5a7bb91ea6af6c1ca4378b2b82b8d3fff5e73344 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4456: 30b992bdc047073e1fe99b1ac622f026618a8081 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8881/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread