Re: [PATCH v2 1/4] drm/i915/display: Write PHY_CMN1_CONTROL only when using AUXLess ALPM

[Gustavo Sousa <gustavo.sousa@intel.com>]

Quoting Jouni Högander (2025-07-22 07:13:14-03:00)
>We are seeing "dmesg-warn/abort - *ERROR* PHY * failed after 3 retries"
>since we started configuring LFPS sending. According to Bspec Configuring
>LFPS sending is needed only when using AUXLess ALPM. This patch avoids
>these failures by configuring LFPS sending only when using AUXLess ALPM.
>
>Fixes: 9dc619680de4 ("drm/i915/display: Add function to configure LFPS sending")
>Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

I'm really curious if the programming works on the AUXLess ALPM case...

That said, this matches the spec, so

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

Could you also put the reference to the respective Bspec page in the
trailers? That could be done while pushing, I think.

--
Gustavo Sousa

>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>index ed8e640b96b0..2b0305bb04cd 100644
>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>@@ -3240,11 +3240,10 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
> {
>         struct intel_display *display = to_intel_display(encoder);
>         u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
>-        bool enable = intel_alpm_is_alpm_aux_less(enc_to_intel_dp(encoder),
>-                                                  crtc_state);
>         int i;
> 
>-        if (DISPLAY_VER(display) < 20)
>+        if (DISPLAY_VER(display) < 20 ||
>+            !intel_alpm_is_alpm_aux_less(enc_to_intel_dp(encoder), crtc_state))
>                 return;
> 
>         for (i = 0; i < 4; i++) {
>@@ -3256,8 +3255,7 @@ void intel_lnl_mac_transmit_lfps(struct intel_encoder *encoder,
> 
>                 intel_cx0_rmw(encoder, lane_mask, PHY_CMN1_CONTROL(tx, 0),
>                               CONTROL0_MAC_TRANSMIT_LFPS,
>-                              enable ? CONTROL0_MAC_TRANSMIT_LFPS : 0,
>-                              MB_WRITE_COMMITTED);
>+                              CONTROL0_MAC_TRANSMIT_LFPS, MB_WRITE_COMMITTED);
>         }
> }
> 
>-- 
>2.43.0
>