Re: SCSI QLA not working on latest *-mm SN2

[Jeremy Higdon <jeremy@sgi.com>]

On Tue, Sep 21, 2004 at 01:50:02PM -0700, Andrew Vasquez wrote:
> 
> Yes, please see my earlier reply to Matthew:
> 
> 	Hmm...adding more confusion to the mix.  I apologize -- my
> 	reply was not written correctly, yes, the config-read will
> 	flush any pending writes.  But, the same problem persists 
> 	- the RISC will still stop responding to requests (config
> 	or MMIO) during the soft-reset -- potentially resulting in
> 	a MAC (as seen by SGI).

Sorry, I should have read all 30 or so messages before replying to
any  :-)

> > . . . unless there is some sort of random delay within the chip
> > itself between a completion of the IO write on the PCI bus and the
> > chip resetting itself.  That's not a problem, is it, Andrew?
> >
> 
> The only requirement after reception of a soft-reset request (by PIO
> or MMIO) by the RISC is for the driver to wait 16 PCI clocks before
> issuing another request.  The problem of course is determining when to
> start timing within the driver.

So I think that we just wait for some reasonable worst case time for
the write to complete.  We can't really do anything else.

Are these resets done as part of error recovery?  I.e., do we have
to be concerned about long the write will take on a busy system?

jeremy