[Qemu-devel] Cell processor

[Qemu-devel] Cell processor

[Dave Feustel]

Is there any chance that simulation of the 
IBM Cell processor will be added to Qemu?

Thanks,
Dave Feustel
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Re: [Qemu-devel] Cell processor

[Lars Roland]

On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> Is there any chance that simulation of the
> IBM Cell processor will be added to Qemu?

Although this would be great, I am not sure how easy it is to get a
accurate simulation of this chip. The cell architecture consists of
both a power processor element (PPE) and 8 synergistic processor
elements (SPEs) while the PPE is a conventional microprocessor the
SPEs are far from so

The point of the cell is to get the PPE to prepare tasks that can be
executed in a parallel distributed manner across all the SPEs and I am
afraid that this scheduling is going to be very hard to implement
correctly - I may however be proven wrong.



--
Lars Roland

Re: [Qemu-devel] Cell processor

[Lars Roland]

On 11/16/05, Lars Roland <lroland@gmail.com> wrote:
> On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> > Is there any chance that simulation of the
> > IBM Cell processor will be added to Qemu?
>
> Although this would be great, I am not sure how easy it is to get a
> accurate simulation of this chip. The cell architecture consists of
> both a power processor element (PPE) and 8 synergistic processor
> elements (SPEs) while the PPE is a conventional microprocessor the
> SPEs are far from so
>
> The point of the cell is to get the PPE to prepare tasks that can be
> executed in a parallel distributed manner across all the SPEs and I am
> afraid that this scheduling is going to be very hard to implement
> correctly - I may however be proven wrong.

Well I must have come out of loop because it seams that there already
is some simulation software available -
http://www.linuxdevices.com/news/NS8620812400.html - not sure how much
of the CELL it actually simulates - the SPEs are after all not needed
to boot an OS, so it may just be the PPE which qemu also may have a
better shot at emulating.

Re: [Qemu-devel] Cell processor

[Dave Feustel]

On Wednesday 16 November 2005 08:26, Lars Roland wrote:
> On 11/16/05, Lars Roland <lroland@gmail.com> wrote:
> > On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> > > Is there any chance that simulation of the
> > > IBM Cell processor will be added to Qemu?
> >
> > Although this would be great, I am not sure how easy it is to get a
> > accurate simulation of this chip. The cell architecture consists of
> > both a power processor element (PPE) and 8 synergistic processor
> > elements (SPEs) while the PPE is a conventional microprocessor the
> > SPEs are far from so
> >
> > The point of the cell is to get the PPE to prepare tasks that can be
> > executed in a parallel distributed manner across all the SPEs and I am
> > afraid that this scheduling is going to be very hard to implement
> > correctly - I may however be proven wrong.
> 
> Well I must have come out of loop because it seams that there already
> is some simulation software available -
> http://www.linuxdevices.com/news/NS8620812400.html - not sure how much
> of the CELL it actually simulates - the SPEs are after all not needed
> to boot an OS, so it may just be the PPE which qemu also may have a
> better shot at emulating.
>
My impression is that the IBM software is binary only. If that's true, I am not
likely to be able to run it on OpenBSD. OpenBSD has a Linux emulation mode,
but I don't use it because of my concerns about security.  I think the sw
development tools used are modified GNU tools(GCC, etc). I would expect those
to be available as source.

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Re: [Qemu-devel] Cell processor

[Dave Feustel]

On Wednesday 16 November 2005 08:26, Lars Roland wrote:
> Well I must have come out of loop because it seams that there already
> is some simulation software available -
> http://www.linuxdevices.com/news/NS8620812400.html

Here is the link to IBM's Cell Software Webpage:

http://www-128.ibm.com/developerworks/power/cell/

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Re: [Qemu-devel] Cell processor

[Karel Gardas]

On Wed, 16 Nov 2005, Lars Roland wrote:

> Well I must have come out of loop because it seams that there already
> is some simulation software available -
> http://www.linuxdevices.com/news/NS8620812400.html - not sure how much
> of the CELL it actually simulates - the SPEs are after all not needed
> to boot an OS, so it may just be the PPE which qemu also may have a
> better shot at emulating.

If you are talking about Cell SDK, then I would trust IBM here, especially 
when they say ``It was used to prepare a full execution stack for trial 
runs on the first CBE processor, IBM says''

Cheers,
Karel
--
Karel Gardas                  kgardas@objectsecurity.com
ObjectSecurity Ltd.           http://www.objectsecurity.com

Re: [Qemu-devel] Cell processor

[Paul Brook]

On Wednesday 16 November 2005 13:10, Lars Roland wrote:
> On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> > Is there any chance that simulation of the
> > IBM Cell processor will be added to Qemu?
>
> Although this would be great, I am not sure how easy it is to get a
> accurate simulation of this chip. The cell architecture consists of
> both a power processor element (PPE) and 8 synergistic processor
> elements (SPEs) while the PPE is a conventional microprocessor the
> SPEs are far from so
>
> The point of the cell is to get the PPE to prepare tasks that can be
> executed in a parallel distributed manner across all the SPEs and I am
> afraid that this scheduling is going to be very hard to implement
> correctly - I may however be proven wrong.

It depends how accurate you want the simulation to be. A cycle accurate 
simulator is probably going to be trickier. If you don't need cycle accuracy 
it shouldn't be worse than any other multiprocessor system.

The only real fundamental missing feature in QEMU is SMP guest support.
The main PPE is a virtual 2-way 64-bit PowerPC core. Qemu ppc64 is currently 
incomplete, but that's fixable.

I'd expect the SPE to be very easy to emulate. These are simple RISC vector 
cores with their own local memory, no MMU, and a DMA/mailbox engine to 
communicate with the rest of the system.

It's a significant amount of work, but other than the SMP issue (which needs 
fixing for other targets anyway) it's not excessively hard.

Paul

Re: [Qemu-devel] Cell processor

[Dave Feustel]

On Wednesday 16 November 2005 11:42, Paul Brook wrote:
> On Wednesday 16 November 2005 13:10, Lars Roland wrote:
> > On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> > > Is there any chance that simulation of the
> > > IBM Cell processor will be added to Qemu?
> >
> > Although this would be great, I am not sure how easy it is to get a
> > accurate simulation of this chip. The cell architecture consists of
> > both a power processor element (PPE) and 8 synergistic processor
> > elements (SPEs) while the PPE is a conventional microprocessor the
> > SPEs are far from so
> >
> > The point of the cell is to get the PPE to prepare tasks that can be
> > executed in a parallel distributed manner across all the SPEs and I am
> > afraid that this scheduling is going to be very hard to implement
> > correctly - I may however be proven wrong.
> 
> It depends how accurate you want the simulation to be. A cycle accurate 
> simulator is probably going to be trickier. If you don't need cycle accuracy 
> it shouldn't be worse than any other multiprocessor system.
> 
> The only real fundamental missing feature in QEMU is SMP guest support.
> The main PPE is a virtual 2-way 64-bit PowerPC core. Qemu ppc64 is currently 
> incomplete, but that's fixable.
> 
> I'd expect the SPE to be very easy to emulate. These are simple RISC vector 
> cores with their own local memory, no MMU, and a DMA/mailbox engine to 
> communicate with the rest of the system.
> 
> It's a significant amount of work, but other than the SMP issue (which needs 
> fixing for other targets anyway) it's not excessively hard.

Slightly off topic, but AMD has just announced its intention to ship a 4-core 
Opteron chip in 2007. The 4-core chip will use AMD's upcoming m2 socket.

> Paul
> 

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Re: [Qemu-devel] Cell processor

[Ozan Türkyılmaz]

On 16/11/05, Dave Feustel <dfeustel@verizon.net> wrote:
> On Wednesday 16 November 2005 11:42, Paul Brook wrote:
> > On Wednesday 16 November 2005 13:10, Lars Roland wrote:
> > > On 11/16/05, Dave Feustel <dfeustel@verizon.net> wrote:
> > > > Is there any chance that simulation of the
> > > > IBM Cell processor will be added to Qemu?
> > >
> > > Although this would be great, I am not sure how easy it is to get a
> > > accurate simulation of this chip. The cell architecture consists of
> > > both a power processor element (PPE) and 8 synergistic processor
> > > elements (SPEs) while the PPE is a conventional microprocessor the
> > > SPEs are far from so
> > >
> > > The point of the cell is to get the PPE to prepare tasks that can be
> > > executed in a parallel distributed manner across all the SPEs and I am
> > > afraid that this scheduling is going to be very hard to implement
> > > correctly - I may however be proven wrong.
> >
> > It depends how accurate you want the simulation to be. A cycle accurate
> > simulator is probably going to be trickier. If you don't need cycle accuracy
> > it shouldn't be worse than any other multiprocessor system.
> >
> > The only real fundamental missing feature in QEMU is SMP guest support.
> > The main PPE is a virtual 2-way 64-bit PowerPC core. Qemu ppc64 is currently
> > incomplete, but that's fixable.
> >
> > I'd expect the SPE to be very easy to emulate. These are simple RISC vector
> > cores with their own local memory, no MMU, and a DMA/mailbox engine to
> > communicate with the rest of the system.
> >
> > It's a significant amount of work, but other than the SMP issue (which needs
> > fixing for other targets anyway) it's not excessively hard.
>
> Slightly off topic, but AMD has just announced its intention to ship a 4-core
> Opteron chip in 2007. The 4-core chip will use AMD's upcoming m2 socket.
>
isn't writing a OS for dual (or n) core chips hell ?

> > Paul
> >
>
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> NOW with Virtual PC OS support via QEMU and
> Beowulf clustering using PETSc and MPICH2!
>
>
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>


--
Ozan

Re: [Qemu-devel] Cell processor

[Paul Brook]

> > Slightly off topic, but AMD has just announced its intention to ship a
> > 4-core Opteron chip in 2007. The 4-core chip will use AMD's upcoming m2
> > socket.
>
> isn't writing a OS for dual (or n) core chips hell ?

It's no different to any other SMP system, and most serious OS have been doing 
that for years. You might want to use slightly different load balancing 
heuristics for big machines, but most big multiprocessor systems are already 
NUMA anyway so that's nothing new.

Paul

Re: [Qemu-devel] Cell processor

[Dave Feustel]

On Wednesday 16 November 2005 13:00, Ozan Türkyılmaz wrote:
> isn't writing a OS for dual (or n) core chips hell ?

It may be Hell, but it's already done for most, if not all the BSD 
and *nix operating systems now. Ditto for 64-bit x86 mode.

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Re: [Qemu-devel] Cell processor

[Henrik Nordstrom]

On Wed, 16 Nov 2005, Dave Feustel wrote:

> Is there any chance that simulation of the
> IBM Cell processor will be added to Qemu?

Not very likely I think. It's a bit too much different beast from "normal" 
RISC/CISC CPUs, and has somewhat limited applications in general 
computing.

But never say never.

Regards
Henrik