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* Instruction error with cache opcode
@ 2006-05-14 13:51 ` John Miller
  0 siblings, 0 replies; 13+ messages in thread
From: John Miller @ 2006-05-14 13:51 UTC (permalink / raw)
  To: linux-mips

I am attempting to write a routine to initialize the cache for a MIPS
4kc core to get Linux 2.6.16.14 to compile.  I am sure someone has
probably already done this, but I am doing it for educational reasons. 
I am receiving the following error:

arch/mips/kernel/head.S: Assembler messages:
arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
expression

From the following code section:

	li	t0, 0x80000000  		# start address (KSEG0)
	addu	t1,t0,0x2000			# 8KB I-cache
1:	addu	t0,0x10				# 16B line size
	cache	Index_Store_Tag_I,-4(t0)	# clear tag
	nop
	cache	Fill_I,-4(t0)			# fill line
	nop
	bne	t0,t1,1b
	cache	Index_Store_Tag_I,-4(t0)

 I copied the code section from See MIPS Run, so I know the code must be
correct.  What am I doing wrong?

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Instruction error with cache opcode
@ 2006-05-14 13:51 ` John Miller
  0 siblings, 0 replies; 13+ messages in thread
From: John Miller @ 2006-05-14 13:51 UTC (permalink / raw)
  To: linux-mips

I am attempting to write a routine to initialize the cache for a MIPS
4kc core to get Linux 2.6.16.14 to compile.  I am sure someone has
probably already done this, but I am doing it for educational reasons. 
I am receiving the following error:

arch/mips/kernel/head.S: Assembler messages:
arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
expression

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-14 14:17   ` Kevin D. Kissell
  0 siblings, 0 replies; 13+ messages in thread
From: Kevin D. Kissell @ 2006-05-14 14:17 UTC (permalink / raw)
  To: John Miller, linux-mips

> I am attempting to write a routine to initialize the cache for a MIPS
> 4kc core to get Linux 2.6.16.14 to compile.  I am sure someone has
> probably already done this, but I am doing it for educational reasons. 
> I am receiving the following error:
> 
> arch/mips/kernel/head.S: Assembler messages:
> arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
> expression
> 
> From the following code section:
> 
> li t0, 0x80000000  # start address (KSEG0)
> addu t1,t0,0x2000 # 8KB I-cache
> 1: addu t0,0x10 # 16B line size
> cache Index_Store_Tag_I,-4(t0) # clear tag
> nop
> cache Fill_I,-4(t0) # fill line
> nop
> bne t0,t1,1b
> cache Index_Store_Tag_I,-4(t0)
> 
>  I copied the code section from See MIPS Run, so I know the code must be
> correct.  What am I doing wrong?

Where and how is the value of Index_Store_Tag_I  defined?

            Regards,

            Kevin K.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-14 14:17   ` Kevin D. Kissell
  0 siblings, 0 replies; 13+ messages in thread
From: Kevin D. Kissell @ 2006-05-14 14:17 UTC (permalink / raw)
  To: John Miller, linux-mips

> I am attempting to write a routine to initialize the cache for a MIPS
> 4kc core to get Linux 2.6.16.14 to compile.  I am sure someone has
> probably already done this, but I am doing it for educational reasons. 
> I am receiving the following error:
> 
> arch/mips/kernel/head.S: Assembler messages:
> arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
> expression
> 
> From the following code section:
> 
> li t0, 0x80000000  # start address (KSEG0)
> addu t1,t0,0x2000 # 8KB I-cache
> 1: addu t0,0x10 # 16B line size
> cache Index_Store_Tag_I,-4(t0) # clear tag
> nop
> cache Fill_I,-4(t0) # fill line
> nop
> bne t0,t1,1b
> cache Index_Store_Tag_I,-4(t0)
> 
>  I copied the code section from See MIPS Run, so I know the code must be
> correct.  What am I doing wrong?

Where and how is the value of Index_Store_Tag_I  defined?

            Regards,

            Kevin K.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
  2006-05-14 14:17   ` Kevin D. Kissell
  (?)
@ 2006-05-14 18:39   ` John Miller
  2006-05-14 19:42       ` Kevin D. Kissell
  2006-05-15  1:06     ` Atsushi Nemoto
  -1 siblings, 2 replies; 13+ messages in thread
From: John Miller @ 2006-05-14 18:39 UTC (permalink / raw)
  To: linux-mips


> Where and how is the value of Index_Store_Tag_I  defined?
>
>             Regards,
>
>             Kevin K.
>   

I included asm/cacheops.h from the kernel tree, it is defined there as :

#define Index_Store_Tag_I	0x08

I also tried to substitute 0x08 directly into my source and I got the
same error.  Strangely enough, if I remove the include line, I get the
same exact error.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-14 19:42       ` Kevin D. Kissell
  0 siblings, 0 replies; 13+ messages in thread
From: Kevin D. Kissell @ 2006-05-14 19:42 UTC (permalink / raw)
  To: John Miller, linux-mips

> > Where and how is the value of Index_Store_Tag_I  defined?
> 
> I included asm/cacheops.h from the kernel tree, it is defined there as :
> 
> #define Index_Store_Tag_I 0x08
> 
> I also tried to substitute 0x08 directly into my source and I got the
> same error.  Strangely enough, if I remove the include line, I get the
> same exact error.

Have you got your sources properly installes so that include/asm is
a symlink to include/asm-mips?  I've done the experiment at my end,
and it builds just fine so long as regdef.h and cacheops.h are really
on the include path of the compilation.  If they're not, I get:

[kevink@cthulhu tmp]$ mipsel-linux-gcc -I ~/smtchead/include -c cacheop.S
cacheop.S: Assembler messages:
cacheop.S:4: Error: Instruction cache requires absolute expression
cacheop.S:4: Error: Instruction cache requires absolute expression
cacheop.S:4: Error: illegal operands `cache'

            Regards,

            Kevin K.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-14 19:42       ` Kevin D. Kissell
  0 siblings, 0 replies; 13+ messages in thread
From: Kevin D. Kissell @ 2006-05-14 19:42 UTC (permalink / raw)
  To: John Miller, linux-mips

> > Where and how is the value of Index_Store_Tag_I  defined?
> 
> I included asm/cacheops.h from the kernel tree, it is defined there as :
> 
> #define Index_Store_Tag_I 0x08
> 
> I also tried to substitute 0x08 directly into my source and I got the
> same error.  Strangely enough, if I remove the include line, I get the
> same exact error.

Have you got your sources properly installes so that include/asm is
a symlink to include/asm-mips?  I've done the experiment at my end,
and it builds just fine so long as regdef.h and cacheops.h are really
on the include path of the compilation.  If they're not, I get:

[kevink@cthulhu tmp]$ mipsel-linux-gcc -I ~/smtchead/include -c cacheop.S
cacheop.S: Assembler messages:
cacheop.S:4: Error: Instruction cache requires absolute expression
cacheop.S:4: Error: Instruction cache requires absolute expression
cacheop.S:4: Error: illegal operands `cache'

            Regards,

            Kevin K.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
  2006-05-14 19:42       ` Kevin D. Kissell
  (?)
@ 2006-05-14 20:14       ` John Miller
  2006-05-14 23:29         ` Thiemo Seufer
  -1 siblings, 1 reply; 13+ messages in thread
From: John Miller @ 2006-05-14 20:14 UTC (permalink / raw)
  To: Kevin D. Kissell; +Cc: linux-mips


>
> Have you got your sources properly installes so that include/asm is
> a symlink to include/asm-mips?  
Yes, include/asm is symlinked to include/asm-mips.  Let me provide a
little more detail.  I did not want to modify head.S (since this is a
kernel file) but I noticed an undefined macro,

    kernel_entry_setup            # cpu specific setup

and the include #include <kernel-entry-init.h>

I found at least one kernel-entry-init.h file in a hardware specific
directory so I made my own under include/asm-mips/rb500 and added a line
to the Makefile.  Within kernel-entry-init.h are the include for
cacheops.h as well as the macro definition.  regdef.h is included in
head.s.
> I've done the experiment at my end,
> and it builds just fine so long as regdef.h and cacheops.h are really
> on the include path of the compilation.  If they're not, I get:
>
> [kevink@cthulhu tmp]$ mipsel-linux-gcc -I ~/smtchead/include -c cacheop.S
> cacheop.S: Assembler messages:
> cacheop.S:4: Error: Instruction cache requires absolute expression
> cacheop.S:4: Error: Instruction cache requires absolute expression
> cacheop.S:4: Error: illegal operands `cache'
>
>   

Well, it looks like I am missing something somewhere, just need to pin
down what I did wrong.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
  2006-05-14 20:14       ` John Miller
@ 2006-05-14 23:29         ` Thiemo Seufer
  0 siblings, 0 replies; 13+ messages in thread
From: Thiemo Seufer @ 2006-05-14 23:29 UTC (permalink / raw)
  To: John Miller; +Cc: linux-mips

John Miller wrote:
[snip]
> > [kevink@cthulhu tmp]$ mipsel-linux-gcc -I ~/smtchead/include -c cacheop.S
> > cacheop.S: Assembler messages:
> > cacheop.S:4: Error: Instruction cache requires absolute expression
> > cacheop.S:4: Error: Instruction cache requires absolute expression
> > cacheop.S:4: Error: illegal operands `cache'
> >
> >   
> 
> Well, it looks like I am missing something somewhere, just need to pin
> down what I did wrong.

Try gcc -E to get the preprocessed source, this is what the assembler
sees.


Thiemo

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
  2006-05-14 18:39   ` John Miller
  2006-05-14 19:42       ` Kevin D. Kissell
@ 2006-05-15  1:06     ` Atsushi Nemoto
  2006-05-15  1:35       ` John Miller
  1 sibling, 1 reply; 13+ messages in thread
From: Atsushi Nemoto @ 2006-05-15  1:06 UTC (permalink / raw)
  To: jamiller1110; +Cc: linux-mips

On Sun, 14 May 2006 14:39:42 -0400, John Miller <jamiller1110@cox.net> wrote:
> I included asm/cacheops.h from the kernel tree, it is defined there as :
> 
> #define Index_Store_Tag_I	0x08

Then how about Fill_I ?

---
Atsushi Nemoto

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
  2006-05-15  1:06     ` Atsushi Nemoto
@ 2006-05-15  1:35       ` John Miller
  2006-05-15  1:38           ` John Miller
  0 siblings, 1 reply; 13+ messages in thread
From: John Miller @ 2006-05-15  1:35 UTC (permalink / raw)
  To: Atsushi Nemoto; +Cc: linux-mips

Atsushi Nemoto wrote:
> On Sun, 14 May 2006 14:39:42 -0400, John Miller <jamiller1110@cox.net> wrote:
>   
>> I included asm/cacheops.h from the kernel tree, it is defined there as :
>>
>> #define Index_Store_Tag_I	0x08
>>     
>
> Then how about Fill_I ?
>
> ---
> Atsushi Nemoto
>   
That got it!  Sorry, I had my head up somewhere it was not supposed to 
be.  I do not know how many times I went over cacheops.h and missed the 
fact that Fill was defined, not Fill_I.  One I changed my code to Fill, 
it built the kernel nicely.  It still died before the first printk :) 
but at least I am a little closer.  I got Fill_I out of the See MIPS Run 
book, it has the same option hex (0x14) as Fill, does anyone know why 
this changed?

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-15  1:38           ` John Miller
  0 siblings, 0 replies; 13+ messages in thread
From: John Miller @ 2006-05-15  1:38 UTC (permalink / raw)
  Cc: linux-mips

Sorry, I sent that last message without thanking everyone for their help.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: Instruction error with cache opcode
@ 2006-05-15  1:38           ` John Miller
  0 siblings, 0 replies; 13+ messages in thread
From: John Miller @ 2006-05-15  1:38 UTC (permalink / raw)
  Cc: linux-mips

Sorry, I sent that last message without thanking everyone for their help.

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2006-05-15  1:38 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2006-05-14 13:51 Instruction error with cache opcode John Miller
2006-05-14 13:51 ` John Miller
2006-05-14 14:17 ` Kevin D. Kissell
2006-05-14 14:17   ` Kevin D. Kissell
2006-05-14 18:39   ` John Miller
2006-05-14 19:42     ` Kevin D. Kissell
2006-05-14 19:42       ` Kevin D. Kissell
2006-05-14 20:14       ` John Miller
2006-05-14 23:29         ` Thiemo Seufer
2006-05-15  1:06     ` Atsushi Nemoto
2006-05-15  1:35       ` John Miller
2006-05-15  1:38         ` John Miller
2006-05-15  1:38           ` John Miller

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