Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after disabling counters

[Robert Richter <robert.richter@amd.com>]

On 29.09.10 12:00:35, Stephane Eranian wrote:
> But you cannot clear it in x86_pmu_stop() because otherwise it
> turns into active_mask[]. My understanding is that you need
> to remember this counter has been active at some point in the
> past.
> 
> My point is that you cannot keep this around forever. After a
> "while" it becomes stale and you have to remove it otherwise
> you may wrongly increment handled.

The mask is cleared with the next nmi.

> 
> Here is a scenario:
> 
> event A -> counter 0, cpuc->running = 0x1 active_mask = 0x1
> move A
> event A -> counter 1, cpuc->running = 0x3, active_mask = 0x2
> 
> No interrupt, we are just counting for a short period.
> Then, you get an NMI interrupt, suppose it is not generated
> by the PMU, it is destined for another handler.
> 
> For i=0, you have (active_mask & 0x1) == 0, but (running & 0x1) == 1,
> you mark the interrupt as handled, i.e., you swallow it, the actual
> handler never gets it.

Yes, then changing the counters you will get *one* nmi with 2 handled
counters. This is valid as the disabled counter could generate a
spurious interrupt. But you get (handled == 2) instead of (handled ==
1) which is not much impact. All following nmis have (handled == 1)
then again.

-Robert

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Advanced Micro Devices, Inc.
Operating System Research Center