Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after disabling counters

[Robert Richter <robert.richter@amd.com>]

On 01.10.10 07:53:37, Stephane Eranian wrote:

> That's another issue I have with this NMI callchain logic. It is hard to tell
> who's in front of who in each callchain. You may have two registered users
> at the same priority, the one which registers last gets priority.
> 
> We may not want perf_event to run at the lowest priority because it is
> performance sensitive, remember that the counters are running until
> you get to the handler. Unlike many of the other subsystems on the
> call chain perf_event is doing performance monitoring not debugging.
> The rate of calls on the chain is now very high.

Yes, actually the perf handler should run with the highest priority to
reduce overhead when executing the handler chain. As this will cause
implications to other handlers I think the most promising approach
will be Andi's suggestion to separate the nmi handlers from the die
chain by adding a new one. We should consider this when reworking the
die handler (cc'ing Huang).

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center