From: Andi Kleen <andi@firstfloor.org>
To: Robert Richter <robert.richter@amd.com>
Cc: "Peter Zijlstra" <peterz@infradead.org>,
"Andi Kleen" <andi@firstfloor.org>, "Ingo Molnar" <mingo@elte.hu>,
"Stephane Eranian" <eranian@google.com>,
LKML <linux-kernel@vger.kernel.org>,
"Don Zickus" <dzickus@redhat.com>, acme <acme@ghostprotocols.net>,
"Frédéric Weisbecker" <fweisbec@gmail.com>,
"Thomas Gleixner" <tglx@linutronix.de>
Subject: Re: [V3][PATCH 0/7] perf, x86: Implement AMD IBS
Date: Tue, 4 Oct 2011 19:42:34 +0200 [thread overview]
Message-ID: <20111004174234.GG14482@one.firstfloor.org> (raw)
In-Reply-To: <20111004171603.GI21506@erda.amd.com>
On Tue, Oct 04, 2011 at 07:16:03PM +0200, Robert Richter wrote:
> On 04.10.11 12:45:09, Peter Zijlstra wrote:
> > I would much prefer perf {ibs,pebs} commands implemented in C, so that
> > normal people can change/improve them too.
>
> Would a perf {ibs,pebs} be an ascii dump or so? Then I just would
You would need a script to post process that anyways, that is why
the idea was to put it into perf script (with a suitable default)
But the default could be also written in C if Peter prefers that.
-Andi
next prev parent reply other threads:[~2011-10-04 17:42 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-21 9:30 [V3][PATCH 0/7] perf, x86: Implement AMD IBS Robert Richter
2011-09-21 9:30 ` [V3][PATCH 1/7] perf, x86: share IBS macros between perf and oprofile Robert Richter
2011-09-21 9:30 ` [V3][PATCH 2/7] perf, x86: Implement IBS initialization Robert Richter
2011-09-21 9:30 ` [V3][PATCH 3/7] perf, x86: Implement IBS event configuration Robert Richter
2011-09-21 9:30 ` [V3][PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-09-22 21:51 ` Andi Kleen
2011-09-23 8:44 ` Robert Richter
2011-09-21 9:30 ` [V3][PATCH 5/7] perf, x86: Implement IBS pmu control ops Robert Richter
2011-09-21 9:30 ` [V3][PATCH 6/7] perf, x86: Implement 64 bit counter support for IBS Robert Richter
2011-09-21 9:30 ` [V3][PATCH 7/7] perf, x86: Example code for AMD IBS Robert Richter
2011-09-23 11:48 ` [V3][PATCH 0/7] perf, x86: Implement " Peter Zijlstra
2011-09-23 12:20 ` Robert Richter
2011-09-23 22:28 ` Andi Kleen
2011-09-25 15:20 ` David Ahern
2011-09-25 15:26 ` Andi Kleen
2011-09-25 15:29 ` David Ahern
2011-10-04 12:35 ` Stephane Eranian
2011-10-04 13:18 ` Andi Kleen
2011-10-04 13:20 ` Stephane Eranian
2011-10-04 8:27 ` Peter Zijlstra
2011-10-04 8:54 ` Ingo Molnar
2011-10-04 14:26 ` Robert Richter
2011-10-10 14:48 ` Robert Richter
2011-10-12 7:04 ` Ingo Molnar
2011-10-04 16:41 ` Andi Kleen
2011-10-04 16:45 ` Peter Zijlstra
2011-10-04 17:16 ` Robert Richter
2011-10-04 17:42 ` Andi Kleen [this message]
2011-10-10 6:05 ` Ingo Molnar
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