[PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Hillf Danton]

Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

[jayachandranc: simplified and adapted for new merged XLR/XLP code]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
 arch/mips/netlogic/common/smp.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index 4657fe8..7249f93 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -108,9 +108,16 @@ void nlm_early_init_secondary(int cpu)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
+	current_cpu_data.core = hard_smp_processor_id() / 4;
 	nlm_smp_irq_init();
 }
 
+void nlm_prepare_cpus(unsigned int max_cpus)
+{
+	/* declare we are SMT capable */
+	smp_num_siblings = nlm_threads_per_core;
+}
+
 void nlm_smp_finish(void)
 {
 #ifdef notyet
@@ -179,10 +186,6 @@ void __init nlm_smp_setup(void)
 	nlm_set_nmi_handler(nlm_boot_secondary_cpus);
 }
 
-void nlm_prepare_cpus(unsigned int max_cpus)
-{
-}
-
 static int nlm_parse_cpumask(u32 cpu_mask)
 {
 	uint32_t core0_thr_mask, core_thr_mask;
-- 
1.7.4.1

[PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Hillf Danton]

Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

[jayachandranc: simplified and adapted for new merged XLR/XLP code]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
 arch/mips/netlogic/common/smp.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index 4657fe8..7249f93 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -108,9 +108,16 @@ void nlm_early_init_secondary(int cpu)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
+	current_cpu_data.core = hard_smp_processor_id() / 4;
 	nlm_smp_irq_init();
 }
 
+void nlm_prepare_cpus(unsigned int max_cpus)
+{
+	/* declare we are SMT capable */
+	smp_num_siblings = nlm_threads_per_core;
+}
+
 void nlm_smp_finish(void)
 {
 #ifdef notyet
@@ -179,10 +186,6 @@ void __init nlm_smp_setup(void)
 	nlm_set_nmi_handler(nlm_boot_secondary_cpus);
 }
 
-void nlm_prepare_cpus(unsigned int max_cpus)
-{
-}
-
 static int nlm_parse_cpumask(u32 cpu_mask)
 {
 	uint32_t core0_thr_mask, core_thr_mask;
-- 
1.7.4.1

[PATCH 00/12] MIPS: Support for Netlogic XLP processors

[Jayachandran C]

[Here's is the patchset again, it has been re-based on top of the
ralf/upstream-sfr.git and few conflicts there have been resolved.]

This patchset adds support for Netlogic's XLP processor family.

The first few patches are to update XLR and move common files to a new
netlogic/common directory.

As always, comments and suggestions welcome. More details on the chip at
http://www.netlogicmicro.com/Products/ProductBriefs/MultiCore/XLP832.htm

Changes from  version:
 - merge smp wakeup code of XLR and XLP
 - common support for booting with 1/2/4 threads per core
 - Add supprt for XLP 3xx processors
 - mark netlogic chips SMT capable

Hillf Danton (1):
  MIPS: Netlogic: Mark Netlogic chips as SMT capable

Jayachandran C (11):
  MIPS: Netlogic: Style fixes for Platform
  MIPS: Netlogic: Use CPU_XLR instead of NLM_XLR
  MIPS: Netlogic: No need to set -Werror in mips/xlr
  MIPS: Netlogic: Move code common with XLP to common/
  MIPS: Netlogic: Update default config
  MIPS: Netlogic: XLP CPU support.
  MIPS: Netlogic: Add XLP platform files for XLP SoC
  MIPS: Netlogic: Add XLP makefiles and config
  MIPS: Netlogic: Add default XLP config.
  MIPS: Netlogic: Merge some of XLR/XLP wakup code
  MIPS: Netlogic: Add support for XLP 3XX cores

 arch/mips/Kconfig                                  |   44 ++-
 arch/mips/configs/nlm_xlp_defconfig                |  570 ++++++++++++++++++++
 arch/mips/configs/nlm_xlr_defconfig                |   16 +-
 arch/mips/include/asm/cpu.h                        |    5 +-
 .../asm/mach-netlogic/cpu-feature-overrides.h      |   18 +-
 arch/mips/include/asm/module.h                     |    2 +
 arch/mips/include/asm/netlogic/common.h            |   76 +++
 arch/mips/include/asm/netlogic/haldefs.h           |  163 ++++++
 arch/mips/include/asm/netlogic/xlp-hal/bridge.h    |  187 +++++++
 .../mips/include/asm/netlogic/xlp-hal/cpucontrol.h |   83 +++
 arch/mips/include/asm/netlogic/xlp-hal/iomap.h     |  153 ++++++
 arch/mips/include/asm/netlogic/xlp-hal/pic.h       |  411 ++++++++++++++
 arch/mips/include/asm/netlogic/xlp-hal/sys.h       |  129 +++++
 arch/mips/include/asm/netlogic/xlp-hal/uart.h      |  191 +++++++
 arch/mips/include/asm/netlogic/xlp-hal/xlp.h       |   51 ++
 arch/mips/include/asm/netlogic/xlr/iomap.h         |   22 -
 arch/mips/include/asm/netlogic/xlr/pic.h           |   69 ++-
 arch/mips/include/asm/netlogic/xlr/xlr.h           |   13 +-
 arch/mips/kernel/Makefile                          |    1 +
 arch/mips/kernel/cpu-probe.c                       |   20 +-
 arch/mips/lib/Makefile                             |    1 +
 arch/mips/mm/Makefile                              |    1 +
 arch/mips/mm/c-r4k.c                               |    3 +
 arch/mips/netlogic/Kconfig                         |    3 -
 arch/mips/netlogic/Makefile                        |    3 +
 arch/mips/netlogic/Platform                        |   13 +-
 arch/mips/netlogic/common/Makefile                 |    3 +
 arch/mips/netlogic/common/earlycons.c              |   60 ++
 arch/mips/netlogic/common/irq.c                    |  238 ++++++++
 arch/mips/netlogic/common/smp.c                    |  270 +++++++++
 arch/mips/netlogic/common/smpboot.S                |  272 ++++++++++
 arch/mips/netlogic/common/time.c                   |   51 ++
 arch/mips/netlogic/xlp/Makefile                    |    2 +
 arch/mips/netlogic/xlp/nlm_hal.c                   |  111 ++++
 arch/mips/netlogic/xlp/platform.c                  |  108 ++++
 arch/mips/netlogic/xlp/setup.c                     |  105 ++++
 arch/mips/netlogic/xlp/wakeup.c                    |  102 ++++
 arch/mips/netlogic/xlr/Makefile                    |    7 +-
 arch/mips/netlogic/xlr/irq.c                       |  305 -----------
 arch/mips/netlogic/xlr/platform.c                  |   31 +-
 arch/mips/netlogic/xlr/setup.c                     |   31 +-
 arch/mips/netlogic/xlr/smp.c                       |  220 --------
 arch/mips/netlogic/xlr/smpboot.S                   |  100 ----
 arch/mips/netlogic/xlr/time.c                      |   51 --
 arch/mips/netlogic/xlr/wakeup.c                    |   68 +++
 arch/mips/netlogic/xlr/xlr_console.c               |   46 --
 arch/mips/pci/Makefile                             |    2 +-
 arch/mips/pci/pci-xlr.c                            |   77 +++
 48 files changed, 3679 insertions(+), 829 deletions(-)
 create mode 100644 arch/mips/configs/nlm_xlp_defconfig
 create mode 100644 arch/mips/include/asm/netlogic/common.h
 create mode 100644 arch/mips/include/asm/netlogic/haldefs.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/bridge.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/cpucontrol.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/iomap.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/pic.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/sys.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/uart.h
 create mode 100644 arch/mips/include/asm/netlogic/xlp-hal/xlp.h
 create mode 100644 arch/mips/netlogic/Makefile
 create mode 100644 arch/mips/netlogic/common/Makefile
 create mode 100644 arch/mips/netlogic/common/earlycons.c
 create mode 100644 arch/mips/netlogic/common/irq.c
 create mode 100644 arch/mips/netlogic/common/smp.c
 create mode 100644 arch/mips/netlogic/common/smpboot.S
 create mode 100644 arch/mips/netlogic/common/time.c
 create mode 100644 arch/mips/netlogic/xlp/Makefile
 create mode 100644 arch/mips/netlogic/xlp/nlm_hal.c
 create mode 100644 arch/mips/netlogic/xlp/platform.c
 create mode 100644 arch/mips/netlogic/xlp/setup.c
 create mode 100644 arch/mips/netlogic/xlp/wakeup.c
 delete mode 100644 arch/mips/netlogic/xlr/irq.c
 delete mode 100644 arch/mips/netlogic/xlr/smp.c
 delete mode 100644 arch/mips/netlogic/xlr/smpboot.S
 delete mode 100644 arch/mips/netlogic/xlr/time.c
 create mode 100644 arch/mips/netlogic/xlr/wakeup.c
 delete mode 100644 arch/mips/netlogic/xlr/xlr_console.c

-- 
1.7.5.4

[PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Hillf Danton]

Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

[jayachandranc: simplified and adapted for new merged XLR/XLP code]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
 arch/mips/netlogic/common/smp.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index 476c93e..db17f49 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -108,9 +108,16 @@ void nlm_early_init_secondary(int cpu)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
+	current_cpu_data.core = hard_smp_processor_id() / 4;
 	nlm_smp_irq_init();
 }
 
+void nlm_prepare_cpus(unsigned int max_cpus)
+{
+	/* declare we are SMT capable */
+	smp_num_siblings = nlm_threads_per_core;
+}
+
 void nlm_smp_finish(void)
 {
 #ifdef notyet
@@ -183,10 +190,6 @@ void __init nlm_smp_setup(void)
 	nlm_set_nmi_handler(nlm_boot_secondary_cpus);
 }
 
-void nlm_prepare_cpus(unsigned int max_cpus)
-{
-}
-
 static int nlm_parse_cpumask(u32 cpu_mask)
 {
 	uint32_t core0_thr_mask, core_thr_mask;
-- 
1.7.5.4

[PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Hillf Danton]

Netlogic XLR chip has multiple cores. Each core includes four integrated
hardware threads, and they share L1 data and instruction caches.

If the chip is marked to be SMT capable, scheduler then could do more, say,
idle load balancing.

Changes are now confined only to the code of XLR, and hardware is probed
to get core ID for correct setup.

[jayachandranc: simplified and adapted for new merged XLR/XLP code]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
---
 arch/mips/netlogic/common/smp.c |   11 +++++++----
 1 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/mips/netlogic/common/smp.c b/arch/mips/netlogic/common/smp.c
index 476c93e..db17f49 100644
--- a/arch/mips/netlogic/common/smp.c
+++ b/arch/mips/netlogic/common/smp.c
@@ -108,9 +108,16 @@ void nlm_early_init_secondary(int cpu)
  */
 static void __cpuinit nlm_init_secondary(void)
 {
+	current_cpu_data.core = hard_smp_processor_id() / 4;
 	nlm_smp_irq_init();
 }
 
+void nlm_prepare_cpus(unsigned int max_cpus)
+{
+	/* declare we are SMT capable */
+	smp_num_siblings = nlm_threads_per_core;
+}
+
 void nlm_smp_finish(void)
 {
 #ifdef notyet
@@ -183,10 +190,6 @@ void __init nlm_smp_setup(void)
 	nlm_set_nmi_handler(nlm_boot_secondary_cpus);
 }
 
-void nlm_prepare_cpus(unsigned int max_cpus)
-{
-}
-
 static int nlm_parse_cpumask(u32 cpu_mask)
 {
 	uint32_t core0_thr_mask, core_thr_mask;
-- 
1.7.5.4

Re: [PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Ralf Baechle]

On Fri, Nov 11, 2011 at 05:11:08PM +0530, Hillf Danton wrote:
> Date:   Fri, 11 Nov 2011 17:11:08 +0530
> From: Hillf Danton <dhillf@gmail.com>

Normally if you're resending other people's patches they should be sent
out with your email in the email's From: header and with the patch
author's name and Email address in a From: line in the first (important,
otherwise git won't parse it right) of the body.  Somehow here Hillf
ended up in the From: header which may be confusing, might upset him
and might also trigger spam filters.

No need to resend but you may want to fix that for the next batch of
patches.

  Ralf

Re: [PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Ralf Baechle]

On Fri, Nov 11, 2011 at 12:54:36PM +0000, Ralf Baechle wrote:

> On Fri, Nov 11, 2011 at 05:11:08PM +0530, Hillf Danton wrote:
> > Date:   Fri, 11 Nov 2011 17:11:08 +0530
> > From: Hillf Danton <dhillf@gmail.com>
> 
> Normally if you're resending other people's patches they should be sent
> out with your email in the email's From: header and with the patch
> author's name and Email address in a From: line in the first (important,
> otherwise git won't parse it right) of the body.  Somehow here Hillf
> ended up in the From: header which may be confusing, might upset him
> and might also trigger spam filters.
> 
> No need to resend but you may want to fix that for the next batch of
> patches.

And promptly the reply went to Hillf, whops :)

  Ralf

Re: [PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Hillf Danton]

With Jayachandran Cced

On Fri, Nov 11, 2011 at 8:54 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Fri, Nov 11, 2011 at 05:11:08PM +0530, Hillf Danton wrote:
>> Date:   Fri, 11 Nov 2011 17:11:08 +0530
>> From: Hillf Danton <dhillf@gmail.com>
>
> Normally if you're resending other people's patches they should be sent
> out with your email in the email's From: header and with the patch
> author's name and Email address in a From: line in the first (important,
> otherwise git won't parse it right) of the body.  Somehow here Hillf
> ended up in the From: header which may be confusing, might upset him
> and might also trigger spam filters.
>
> No need to resend but you may want to fix that for the next batch of
> patches.
>
Hi  Ralf,

The patch was delivered by me, and reprepared under ideas and comments from
you and Jayachandran, thanks. It was fine tuned, and SOB, by Jayachandran, and
included in this patchset, which is far beyond my capability, for supporting
Netlogic chips. And please reconsider the patchset.

Thanks

Hillf

Re: [PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Ralf Baechle]

On Fri, Nov 11, 2011 at 09:39:00PM +0800, Hillf Danton wrote:

> The patch was delivered by me, and reprepared under ideas and comments from
> you and Jayachandran, thanks. It was fine tuned, and SOB, by Jayachandran, and
> included in this patchset, which is far beyond my capability, for supporting
> Netlogic chips. And please reconsider the patchset.

This was just a comment on the mechanics of sending patches, not a review
of the patch itself - in fact I think it's fine.

What seems to have happened is that Jayachandran prepared the patches
with git-format-patch, then sent them out using mutt -H, not as the
authors of git had intended using git-send-email.  Git-send-email
puts the sender's email address into the from header and inserts a From:
into the first line of the body, where needed.

On the receiving side it doesn't change a thing - the patch would have
looked exactly the same after being applied to git but as elaborated
before, there are other problems.

  Ralf

Re: [PATCH 12/12] MIPS: Netlogic: Mark Netlogic chips as SMT capable

[Ralf Baechle]

Queued for 3.3.  Thanks,

  Ralf