From: Marek Vasut <marek.vasut@gmail.com>
To: Huang Shijie <b32955@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>, linux-mtd@lists.infradead.org
Subject: Re: GPMI-NAND: Wrong ECC size in driver
Date: Wed, 4 Jan 2012 22:33:15 +0100 [thread overview]
Message-ID: <201201042233.15645.marek.vasut@gmail.com> (raw)
In-Reply-To: <4F03EA83.9030503@freescale.com>
> Hi Marek:
> > Hi,
> >
> > the gpmi-nand.c driver apparently has misconfigured ecc.size field:
> >
> > drivers/mtd/nand/gpmi-nand/gpmi-nand.c:
> > ---------->8 ----------
> > 1493 chip->ecc.mode = NAND_ECC_HW;
> > 1494 chip->ecc.size = 1;
> > 1495 chip->ecc.layout =&gpmi_hw_ecclayout;
> > ---------- 8< ----------
> >
> > This boils down to misconfigured mtd->subpage_sft in:
> >
> > drivers/mtd/nand/nand_base.c:
> > ---------->8 ----------
> > 3434 /* Allow subpage writes up to ecc.steps. Not possible for
> > MLC flash */
> > 3435 if (!(chip->options& NAND_NO_SUBPAGE_WRITE)&&
> > 3436 !(chip->cellinfo& NAND_CI_CELLTYPE_MSK)) {
> > 3437 switch (chip->ecc.steps) {
> > 3438 case 2:
> > 3439 mtd->subpage_sft = 1;
> > 3440 break;
> > 3441 case 4:
> > 3442 case 8:
> > 3443 case 16:
> > 3444 mtd->subpage_sft = 2;
> > 3445 break;
> > 3446 }
> > 3447 }
> > 3448 chip->subpagesize = mtd->writesize>> mtd->subpage_sft;
> > ---------- 8< ----------
> >
> > The mtd->subpage_sft is accidentally 0 by default. Therefore, the subpage
> > size is mtd->writesize>> 0. Therefore the subpage size reported to UBI
> > formating tools is the size of whole page, which works. Now, if I
> > correct the problem by setting ecc.size properly to 512 bytes, I get
> > into trouble with UBI:
> >
> > 1) UBI formating tools are reported the driver CAN DO subpage writes
> > 2) UBI formating tools are reported the subpage size is 512 bytes
>
> The gpmi driver does not support the subpage read/write.
That's what I said above.
> I will be happy if the driver works only by setting the
> NAND_NO_SUBPAGE_WRITE, without setting the ecc.size.
So you intentionally set the ecc.size to 1 to work around the issue?
>
> Best Regards
> Huang Shijie
>
> > and this happens even though the NAND_NO_SUBPAGE_WRITE option is set by
> > the driver. This is because:
> >
> > drivers/mtd/nand/nand_base.c:
> > ---------->8 ----------
> > 3072 /* Get chip options, preserve non chip based options */
> > 3073 chip->options&= ~NAND_CHIPOPTIONS_MSK;
> > 3074 chip->options |= type->options& NAND_CHIPOPTIONS_MSK;
> > ---------- 8< ----------
> >
> > which effectively masks that bit away. So, how are we going to fix it?
> >
> > Cheers!
> >
> > Marek
next prev parent reply other threads:[~2012-01-04 21:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-04 0:48 GPMI-NAND: Wrong ECC size in driver Marek Vasut
2012-01-04 5:58 ` Huang Shijie
2012-01-04 17:30 ` Scott Wood
2012-01-04 21:32 ` Marek Vasut
2012-01-04 21:48 ` Scott Wood
2012-01-04 23:38 ` Marek Vasut
2012-01-04 23:48 ` Scott Wood
2012-01-31 11:33 ` Marek Vasut
2012-01-31 17:30 ` Brian Norris
2012-01-31 19:09 ` Scott Wood
2012-02-03 2:43 ` Brian Norris
2012-02-03 3:16 ` Brian Norris
2012-01-04 21:33 ` Marek Vasut [this message]
2012-01-05 2:08 ` Huang Shijie
2012-01-05 9:07 ` Marek Vasut
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