From: Will Deacon <will.deacon@arm.com>
To: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>,
Dave Martin <dave.martin@linaro.org>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Russell King <linux@arm.linux.org.uk>,
"linux-sh@vger.kernel.org" <linux-sh@vger.kernel.org>,
Catalin Marinas <Catalin.Marinas@arm.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Amit Kucheria <amit.kucheria@linaro.org>,
Simon Horman <horms@verge.net.au>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Colin Cross <ccross@android.com>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
Wenzeng Chen <wzch@marvell.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations
Date: Tue, 11 Dec 2012 17:47:05 +0000 [thread overview]
Message-ID: <20121211174705.GL16759@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1212111807170.2140@axis700.grange>
On Tue, Dec 11, 2012 at 05:07:35PM +0000, Guennadi Liakhovetski wrote:
> Hi Will
>
> On Tue, 11 Dec 2012, Will Deacon wrote:
>
> > On Tue, Dec 11, 2012 at 04:33:13PM +0000, Will Deacon wrote:
> > > On Tue, Dec 11, 2012 at 04:07:56PM +0000, Guennadi Liakhovetski wrote:
> > > > Git bisect identified this patch, in the mainline as
> > > >
> > > > commit dbee0c6fb4c1269b2dfc8b0b7a29907ea7fed560
> > > > Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Date: Fri Sep 7 11:06:57 2012 +0530
> > > >
> > > > ARM: kernel: update cpu_suspend code to use cache LoUIS operations
> > > >
> > > > as the culprit of the broken wake up from STR on mackerel, based on an
> > > > sh7372 A8 SoC. .config attached.
> > >
> > > My guess is that because Cortex-A8 does not implement the MP extensions,
> > > the LoUIS field of the CLIDR reads as zero, and the cache isn't flushed at
> > > all (I can see an early exit in v7_flush_dcache_louis).
> > >
> > > Lorenzo -- how is this supposed to work for uniprocessor CPUs?
> >
> > Bah, forgot to ask you if the following patch helps...
>
> Yes, it does.
Cracking, can I add you tested-by please?
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations
Date: Tue, 11 Dec 2012 17:47:05 +0000 [thread overview]
Message-ID: <20121211174705.GL16759@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1212111807170.2140@axis700.grange>
On Tue, Dec 11, 2012 at 05:07:35PM +0000, Guennadi Liakhovetski wrote:
> Hi Will
>
> On Tue, 11 Dec 2012, Will Deacon wrote:
>
> > On Tue, Dec 11, 2012 at 04:33:13PM +0000, Will Deacon wrote:
> > > On Tue, Dec 11, 2012 at 04:07:56PM +0000, Guennadi Liakhovetski wrote:
> > > > Git bisect identified this patch, in the mainline as
> > > >
> > > > commit dbee0c6fb4c1269b2dfc8b0b7a29907ea7fed560
> > > > Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Date: Fri Sep 7 11:06:57 2012 +0530
> > > >
> > > > ARM: kernel: update cpu_suspend code to use cache LoUIS operations
> > > >
> > > > as the culprit of the broken wake up from STR on mackerel, based on an
> > > > sh7372 A8 SoC. .config attached.
> > >
> > > My guess is that because Cortex-A8 does not implement the MP extensions,
> > > the LoUIS field of the CLIDR reads as zero, and the cache isn't flushed at
> > > all (I can see an early exit in v7_flush_dcache_louis).
> > >
> > > Lorenzo -- how is this supposed to work for uniprocessor CPUs?
> >
> > Bah, forgot to ask you if the following patch helps...
>
> Yes, it does.
Cracking, can I add you tested-by please?
Will
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations
Date: Tue, 11 Dec 2012 17:47:05 +0000 [thread overview]
Message-ID: <20121211174705.GL16759@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1212111807170.2140@axis700.grange>
On Tue, Dec 11, 2012 at 05:07:35PM +0000, Guennadi Liakhovetski wrote:
> Hi Will
>
> On Tue, 11 Dec 2012, Will Deacon wrote:
>
> > On Tue, Dec 11, 2012 at 04:33:13PM +0000, Will Deacon wrote:
> > > On Tue, Dec 11, 2012 at 04:07:56PM +0000, Guennadi Liakhovetski wrote:
> > > > Git bisect identified this patch, in the mainline as
> > > >
> > > > commit dbee0c6fb4c1269b2dfc8b0b7a29907ea7fed560
> > > > Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > Date: Fri Sep 7 11:06:57 2012 +0530
> > > >
> > > > ARM: kernel: update cpu_suspend code to use cache LoUIS operations
> > > >
> > > > as the culprit of the broken wake up from STR on mackerel, based on an
> > > > sh7372 A8 SoC. .config attached.
> > >
> > > My guess is that because Cortex-A8 does not implement the MP extensions,
> > > the LoUIS field of the CLIDR reads as zero, and the cache isn't flushed at
> > > all (I can see an early exit in v7_flush_dcache_louis).
> > >
> > > Lorenzo -- how is this supposed to work for uniprocessor CPUs?
> >
> > Bah, forgot to ask you if the following patch helps...
>
> Yes, it does.
Cracking, can I add you tested-by please?
Will
next prev parent reply other threads:[~2012-12-11 17:47 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-18 16:35 [RFC PATCH v2 0/5] ARM: augment cache flushing API Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 16:35 ` [RFC PATCH v2 1/5] ARM: mm: implement LoUIS API for cache maintenance ops Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 18:12 ` Nicolas Pitre
2012-09-18 18:12 ` Nicolas Pitre
2012-09-19 12:30 ` Lorenzo Pieralisi
2012-09-19 12:30 ` Lorenzo Pieralisi
2012-09-18 16:35 ` [RFC PATCH v2 2/5] ARM: mm: rename jump labels in v7_flush_dcache_all function Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 18:13 ` Nicolas Pitre
2012-09-18 18:13 ` Nicolas Pitre
2012-09-19 13:51 ` Dave Martin
2012-09-19 13:51 ` Dave Martin
2012-09-20 10:32 ` Lorenzo Pieralisi
2012-09-20 10:32 ` Lorenzo Pieralisi
2012-09-20 11:01 ` Dave Martin
2012-09-20 11:01 ` Dave Martin
2012-09-18 16:35 ` [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 18:18 ` Nicolas Pitre
2012-09-18 18:18 ` Nicolas Pitre
2012-09-19 13:46 ` Dave Martin
2012-09-19 13:46 ` Dave Martin
2012-09-20 10:25 ` Lorenzo Pieralisi
2012-09-20 10:25 ` Lorenzo Pieralisi
2012-09-20 11:04 ` Dave Martin
2012-09-20 11:04 ` Dave Martin
2012-12-11 16:07 ` Guennadi Liakhovetski
2012-12-11 16:07 ` Guennadi Liakhovetski
2012-12-11 16:07 ` Guennadi Liakhovetski
2012-12-11 16:33 ` Will Deacon
2012-12-11 16:33 ` Will Deacon
2012-12-11 16:33 ` Will Deacon
2012-12-11 16:38 ` Will Deacon
2012-12-11 16:38 ` Will Deacon
2012-12-11 16:38 ` Will Deacon
2012-12-11 17:07 ` Guennadi Liakhovetski
2012-12-11 17:07 ` Guennadi Liakhovetski
2012-12-11 17:07 ` Guennadi Liakhovetski
2012-12-11 17:47 ` Will Deacon [this message]
2012-12-11 17:47 ` Will Deacon
2012-12-11 17:47 ` Will Deacon
2012-12-11 17:55 ` Guennadi Liakhovetski
2012-12-11 17:55 ` Guennadi Liakhovetski
2012-12-11 17:55 ` Guennadi Liakhovetski
2012-12-11 23:27 ` Stephen Boyd
2012-12-11 23:27 ` Stephen Boyd
2012-12-11 23:27 ` Stephen Boyd
2012-12-12 10:31 ` Will Deacon
2012-12-12 10:31 ` Will Deacon
2012-12-12 10:31 ` Will Deacon
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 10:33 ` Lorenzo Pieralisi
2012-12-12 10:33 ` Lorenzo Pieralisi
2012-12-12 10:33 ` Lorenzo Pieralisi
2012-12-12 13:36 ` Will Deacon
2012-12-12 13:36 ` Will Deacon
2012-12-12 13:36 ` Will Deacon
2012-12-13 8:09 ` Guennadi Liakhovetski
2012-12-13 8:09 ` Guennadi Liakhovetski
2012-12-13 8:09 ` Guennadi Liakhovetski
2012-12-13 10:51 ` Will Deacon
2012-12-13 10:51 ` Will Deacon
2012-12-13 10:51 ` Will Deacon
2012-12-13 14:32 ` Guennadi Liakhovetski
2012-12-13 14:32 ` Guennadi Liakhovetski
2012-12-13 14:32 ` Guennadi Liakhovetski
2012-12-13 14:39 ` Santosh Shilimkar
2012-12-13 14:39 ` Santosh Shilimkar
2012-12-13 14:39 ` Santosh Shilimkar
2012-12-28 11:32 ` [PATCH v2] ARM: sh7372: fix cache clean / invalidate order Guennadi Liakhovetski
2012-12-28 11:32 ` Guennadi Liakhovetski
2012-12-28 11:32 ` Guennadi Liakhovetski
2012-12-28 21:50 ` Simon Horman
2012-12-28 21:50 ` Simon Horman
2012-12-28 21:50 ` Simon Horman
2012-12-13 14:52 ` [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Will Deacon
2012-12-13 14:52 ` Will Deacon
2012-12-13 14:52 ` Will Deacon
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-12-12 16:43 ` Guennadi Liakhovetski
2012-09-18 16:35 ` [RFC PATCH v2 4/5] ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 18:19 ` Nicolas Pitre
2012-09-18 18:19 ` Nicolas Pitre
2012-09-18 16:35 ` [RFC PATCH v2 5/5] ARM: mm: update __v7_setup() to the new LoUIS cache " Lorenzo Pieralisi
2012-09-18 16:35 ` Lorenzo Pieralisi
2012-09-18 18:20 ` Nicolas Pitre
2012-09-18 18:20 ` Nicolas Pitre
2012-09-20 11:27 ` [RFC PATCH v2 0/5] ARM: augment cache flushing API Lorenzo Pieralisi
2012-09-20 11:27 ` Lorenzo Pieralisi
2012-09-21 8:07 ` Shawn Guo
2012-09-21 8:07 ` Shawn Guo
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