* [PATCH] drm/i915: Reject fence stride=0 on gen4+ @ 2013-04-09 14:46 ville.syrjala 2013-04-09 15:01 ` Daniel Vetter 0 siblings, 1 reply; 5+ messages in thread From: ville.syrjala @ 2013-04-09 14:46 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Our checks for an invalid fence stride forgot to guard against zero stride on gen4+. Fix it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 139d17d..16ff6e7 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -240,6 +240,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) /* 965+ just needs multiples of tile width */ if (INTEL_INFO(dev)->gen >= 4) { + if (stride < tile_width) + return false; if (stride & (tile_width - 1)) return false; return true; -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Reject fence stride=0 on gen4+ 2013-04-09 14:46 [PATCH] drm/i915: Reject fence stride=0 on gen4+ ville.syrjala @ 2013-04-09 15:01 ` Daniel Vetter 2013-04-09 15:08 ` Ville Syrjälä 2013-04-09 17:09 ` [PATCH v2] " ville.syrjala 0 siblings, 2 replies; 5+ messages in thread From: Daniel Vetter @ 2013-04-09 15:01 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 05:46:45PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Our checks for an invalid fence stride forgot to guard against > zero stride on gen4+. Fix it. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> This duplicates the tiny stride check a bit with the gen2/3 code. What about diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index c807eb9..b56185f 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -235,6 +235,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) } } + if (stride < tile_width) + return false; + /* 965+ just needs multiples of tile width */ if (INTEL_INFO(dev)->gen >= 4) { if (stride & (tile_width - 1)) @@ -243,9 +246,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) } /* Pre-965 needs power of two tile widths */ - if (stride < tile_width) - return false; - if (stride & (stride - 1)) return false; instead? -Daniel > --- > drivers/gpu/drm/i915/i915_gem_tiling.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c > index 139d17d..16ff6e7 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -240,6 +240,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > > /* 965+ just needs multiples of tile width */ > if (INTEL_INFO(dev)->gen >= 4) { > + if (stride < tile_width) > + return false; > if (stride & (tile_width - 1)) > return false; > return true; > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: Reject fence stride=0 on gen4+ 2013-04-09 15:01 ` Daniel Vetter @ 2013-04-09 15:08 ` Ville Syrjälä 2013-04-09 17:09 ` [PATCH v2] " ville.syrjala 1 sibling, 0 replies; 5+ messages in thread From: Ville Syrjälä @ 2013-04-09 15:08 UTC (permalink / raw) To: Daniel Vetter; +Cc: intel-gfx On Tue, Apr 09, 2013 at 05:01:18PM +0200, Daniel Vetter wrote: > On Tue, Apr 09, 2013 at 05:46:45PM +0300, ville.syrjala@linux.intel.com wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Our checks for an invalid fence stride forgot to guard against > > zero stride on gen4+. Fix it. > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > This duplicates the tiny stride check a bit with the gen2/3 code. What > about > > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c > index c807eb9..b56185f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -235,6 +235,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > } > } > > + if (stride < tile_width) > + return false; > + > /* 965+ just needs multiples of tile width */ > if (INTEL_INFO(dev)->gen >= 4) { > if (stride & (tile_width - 1)) > @@ -243,9 +246,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > } > > /* Pre-965 needs power of two tile widths */ > - if (stride < tile_width) > - return false; > - > if (stride & (stride - 1)) > return false; > > instead? Looks OK. The same idea occured to me, but only after hitting enter. > -Daniel > > > --- > > drivers/gpu/drm/i915/i915_gem_tiling.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c > > index 139d17d..16ff6e7 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > > @@ -240,6 +240,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > > > > /* 965+ just needs multiples of tile width */ > > if (INTEL_INFO(dev)->gen >= 4) { > > + if (stride < tile_width) > > + return false; > > if (stride & (tile_width - 1)) > > return false; > > return true; > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- Ville Syrjälä Intel OTC ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2] drm/i915: Reject fence stride=0 on gen4+ 2013-04-09 15:01 ` Daniel Vetter 2013-04-09 15:08 ` Ville Syrjälä @ 2013-04-09 17:09 ` ville.syrjala 2013-04-09 17:32 ` Daniel Vetter 1 sibling, 1 reply; 5+ messages in thread From: ville.syrjala @ 2013-04-09 17:09 UTC (permalink / raw) To: intel-gfx From: Ville Syrjälä <ville.syrjala@linux.intel.com> Our checks for an invalid fence stride forgot to guard against zero stride on gen4+. Fix it. v2: Avoid duplicated code (danvet) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/i915_gem_tiling.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 139d17d..537545b 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -238,6 +238,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) } } + if (stride < tile_width) + return false; + /* 965+ just needs multiples of tile width */ if (INTEL_INFO(dev)->gen >= 4) { if (stride & (tile_width - 1)) @@ -246,9 +249,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) } /* Pre-965 needs power of two tile widths */ - if (stride < tile_width) - return false; - if (stride & (stride - 1)) return false; -- 1.8.1.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] drm/i915: Reject fence stride=0 on gen4+ 2013-04-09 17:09 ` [PATCH v2] " ville.syrjala @ 2013-04-09 17:32 ` Daniel Vetter 0 siblings, 0 replies; 5+ messages in thread From: Daniel Vetter @ 2013-04-09 17:32 UTC (permalink / raw) To: ville.syrjala; +Cc: intel-gfx On Tue, Apr 09, 2013 at 08:09:13PM +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Our checks for an invalid fence stride forgot to guard against > zero stride on gen4+. Fix it. > > v2: Avoid duplicated code (danvet) > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_gem_tiling.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c > index 139d17d..537545b 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -238,6 +238,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > } > } > > + if (stride < tile_width) > + return false; > + > /* 965+ just needs multiples of tile width */ > if (INTEL_INFO(dev)->gen >= 4) { > if (stride & (tile_width - 1)) > @@ -246,9 +249,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) > } > > /* Pre-965 needs power of two tile widths */ > - if (stride < tile_width) > - return false; > - > if (stride & (stride - 1)) > return false; > > -- > 1.8.1.5 > -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-04-09 17:29 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-04-09 14:46 [PATCH] drm/i915: Reject fence stride=0 on gen4+ ville.syrjala 2013-04-09 15:01 ` Daniel Vetter 2013-04-09 15:08 ` Ville Syrjälä 2013-04-09 17:09 ` [PATCH v2] " ville.syrjala 2013-04-09 17:32 ` Daniel Vetter
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