From: Marek Vasut <marex@denx.de>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Zhu Richard-R65037" <r65037@freescale.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Shawn Guo <shawn.guo@linaro.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"tharvey@gateworks.com" <tharvey@gateworks.com>,
Frank Li <lznuaa@gmail.com>, Sean Cross <xobs@kosagi.com>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: Re: [PATCH v7 0/2] Add PCIe support for i.MX6q
Date: Thu, 10 Oct 2013 15:43:28 +0200 [thread overview]
Message-ID: <201310101543.29145.marex@denx.de> (raw)
In-Reply-To: <CAErSpo7oHK1tyndKdgk_6f3F7O0pMCSUV+RLUy0V75OKKFniow@mail.gmail.com>
Hi Bjorn,
> On Thu, Oct 10, 2013 at 4:25 AM, Marek Vasut <marex@denx.de> wrote:
> > In the meantime, this is what I see upon probe with V6 of the patches:
> >
> > Linux version 3.12.0-rc2-next-20130927+
> > [...]
> > imx6q-pcie 1ffc000.pcie: phy link never came up
> > PCI host bridge to bus 0000:00
> > pci_bus 0000:00: root bus resource [io 0x1000-0x10000]
> > pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
> > pci_bus 0000:00: No busn resource found for root bus, will use [bus
> > 00-ff]
>
> This indicates a bug in your host bridge driver. You must supply the
> bus number range claimed by the host bridge. There's no way the PCI
> core can figure that out itself. We do assume [bus 00-ff], but that's
> only a fallback and will prevent multi-host bridge configurations from
> working.
Ah, thanks for this information, this is very helpful! I implemented mx6 PCIe
driver for U-Boot and this is my topology (detected by U-Boot)
00:01.0 - 16c3:abcd - Bridge device
01:00.0 - 12d8:2303 - Bridge device
02:01.0 - 12d8:2303 - Bridge device
03:00.0 - 8086:1531 - Network controller
02:02.0 - 12d8:2303 - Bridge device
(The mnenomic is BUS:DEV.FN)
So I shouldn't even touch 0000:00:00.0 in Linux, but use 0000:00:01.0 as that's
the root hub (16c3:abcd), no?
> > PCI: bus0: Fast back to back transfers disabled
> > PCI: bus1: Fast back to back transfers enabled
> > PCI: Device 0000:00:00.0 not available because of resource collisions
> > pcieport: probe of 0000:00:00.0 failed with error -22
>
> If you boot with "ignore_loglevel", you should see more details about
> this device, including the BAR values we read from it. Based on
> pcibios_enable_device() in arch/arm/kernel/bios32.c, my guess is that
> 00:00.0 has an uninitialized BAR (maybe it is in power-on state), and
> you didn't do anything to assign the BAR before trying to bind the
> pcieport driver to it. You might be missing a call to
> pci_bus_assign_resources() or pci_assign_unassigned_resources().
Will check this, thank you!
> > pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]
> > pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
> > pci 0000:00:00.0: PCI bridge to [bus 01]
> > pci 0000:00:00.0: PCI bridge to [bus 01]
> >
> > Is this line normal/expected? Is this related to the PCIe switch I have
> > there? pcieport: probe of 0000:00:00.0 failed with error -22
> >
> > Thank you for your help!
> >
> > Best regards,
> > Marek Vasut
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: marex@denx.de (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 0/2] Add PCIe support for i.MX6q
Date: Thu, 10 Oct 2013 15:43:28 +0200 [thread overview]
Message-ID: <201310101543.29145.marex@denx.de> (raw)
In-Reply-To: <CAErSpo7oHK1tyndKdgk_6f3F7O0pMCSUV+RLUy0V75OKKFniow@mail.gmail.com>
Hi Bjorn,
> On Thu, Oct 10, 2013 at 4:25 AM, Marek Vasut <marex@denx.de> wrote:
> > In the meantime, this is what I see upon probe with V6 of the patches:
> >
> > Linux version 3.12.0-rc2-next-20130927+
> > [...]
> > imx6q-pcie 1ffc000.pcie: phy link never came up
> > PCI host bridge to bus 0000:00
> > pci_bus 0000:00: root bus resource [io 0x1000-0x10000]
> > pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
> > pci_bus 0000:00: No busn resource found for root bus, will use [bus
> > 00-ff]
>
> This indicates a bug in your host bridge driver. You must supply the
> bus number range claimed by the host bridge. There's no way the PCI
> core can figure that out itself. We do assume [bus 00-ff], but that's
> only a fallback and will prevent multi-host bridge configurations from
> working.
Ah, thanks for this information, this is very helpful! I implemented mx6 PCIe
driver for U-Boot and this is my topology (detected by U-Boot)
00:01.0 - 16c3:abcd - Bridge device
01:00.0 - 12d8:2303 - Bridge device
02:01.0 - 12d8:2303 - Bridge device
03:00.0 - 8086:1531 - Network controller
02:02.0 - 12d8:2303 - Bridge device
(The mnenomic is BUS:DEV.FN)
So I shouldn't even touch 0000:00:00.0 in Linux, but use 0000:00:01.0 as that's
the root hub (16c3:abcd), no?
> > PCI: bus0: Fast back to back transfers disabled
> > PCI: bus1: Fast back to back transfers enabled
> > PCI: Device 0000:00:00.0 not available because of resource collisions
> > pcieport: probe of 0000:00:00.0 failed with error -22
>
> If you boot with "ignore_loglevel", you should see more details about
> this device, including the BAR values we read from it. Based on
> pcibios_enable_device() in arch/arm/kernel/bios32.c, my guess is that
> 00:00.0 has an uninitialized BAR (maybe it is in power-on state), and
> you didn't do anything to assign the BAR before trying to bind the
> pcieport driver to it. You might be missing a call to
> pci_bus_assign_resources() or pci_assign_unassigned_resources().
Will check this, thank you!
> > pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]
> > pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
> > pci 0000:00:00.0: PCI bridge to [bus 01]
> > pci 0000:00:00.0: PCI bridge to [bus 01]
> >
> > Is this line normal/expected? Is this related to the PCIe switch I have
> > there? pcieport: probe of 0000:00:00.0 failed with error -22
> >
> > Thank you for your help!
> >
> > Best regards,
> > Marek Vasut
Best regards,
Marek Vasut
next prev parent reply other threads:[~2013-10-10 13:43 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-26 3:24 [PATCH v7 0/2] Add PCIe support for i.MX6q Shawn Guo
2013-09-26 3:24 ` Shawn Guo
2013-09-26 3:24 ` [PATCH v7 1/2] ARM: imx6q: Add PCIe bits to GPR syscon definition Shawn Guo
2013-09-26 3:24 ` Shawn Guo
2013-09-26 3:24 ` [PATCH v7 2/2] PCI: imx6: Add support for i.MX6 PCIe controller Shawn Guo
2013-09-26 3:24 ` Shawn Guo
2013-09-27 19:24 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Bjorn Helgaas
2013-09-27 19:24 ` Bjorn Helgaas
2013-09-28 6:56 ` Shawn Guo
2013-09-28 6:56 ` Shawn Guo
2013-10-08 20:56 ` Marek Vasut
2013-10-08 20:56 ` Marek Vasut
2013-10-09 5:23 ` Zhu Richard-R65037
2013-10-09 5:23 ` Zhu Richard-R65037
2013-10-10 10:25 ` Marek Vasut
2013-10-10 10:25 ` Marek Vasut
2013-10-10 10:40 ` Zhu Richard-R65037
2013-10-10 10:40 ` Zhu Richard-R65037
2013-10-10 12:59 ` Marek Vasut
2013-10-10 12:59 ` Marek Vasut
2013-10-10 20:33 ` Tim Harvey
2013-10-10 20:33 ` Tim Harvey
2013-10-10 20:40 ` Marek Vasut
2013-10-10 20:40 ` Marek Vasut
2013-10-10 13:27 ` Bjorn Helgaas
2013-10-10 13:27 ` Bjorn Helgaas
2013-10-10 13:43 ` Marek Vasut [this message]
2013-10-10 13:43 ` Marek Vasut
2013-10-10 15:58 ` Marek Vasut
2013-10-10 15:58 ` Marek Vasut
2013-10-10 17:17 ` Bjorn Helgaas
2013-10-10 17:17 ` Bjorn Helgaas
2013-10-10 17:39 ` Marek Vasut
2013-10-10 17:39 ` Marek Vasut
2013-10-10 17:56 ` Bjorn Helgaas
2013-10-10 17:56 ` Bjorn Helgaas
2013-10-11 2:12 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Marek Vasut
2013-10-11 2:12 ` Marek Vasut
2013-10-11 2:12 ` [PATCH 2/2] PCI: imx6: Fix the clock for PCIe Marek Vasut
2013-10-11 2:12 ` Marek Vasut
2013-10-11 7:20 ` Jingoo Han
2013-10-11 7:20 ` Jingoo Han
2013-10-11 11:55 ` Marek Vasut
2013-10-11 11:55 ` Marek Vasut
2013-10-12 7:13 ` Shawn Guo
2013-10-12 7:13 ` Shawn Guo
2013-10-11 7:09 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Jingoo Han
2013-10-11 7:09 ` Jingoo Han
2013-10-12 7:20 ` Shawn Guo
2013-10-12 7:20 ` Shawn Guo
2013-10-12 9:28 ` Marek Vasut
2013-10-12 9:28 ` Marek Vasut
2013-10-14 0:02 ` Jingoo Han
2013-10-14 0:02 ` Jingoo Han
2013-10-14 0:44 ` Marek Vasut
2013-10-14 0:44 ` Marek Vasut
2013-10-14 1:17 ` Marek Vasut
2013-10-14 1:17 ` Marek Vasut
2013-10-14 2:33 ` Jingoo Han
2013-10-14 2:33 ` Jingoo Han
2013-10-14 3:23 ` Marek Vasut
2013-10-14 3:23 ` Marek Vasut
2013-10-11 2:13 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Marek Vasut
2013-10-11 2:13 ` Marek Vasut
2013-10-11 2:18 ` Marek Vasut
2013-10-11 2:18 ` Marek Vasut
2013-10-11 2:29 ` Zhu Richard-R65037
2013-10-11 2:29 ` Zhu Richard-R65037
2013-10-11 4:44 ` Yinghai Lu
2013-10-11 4:44 ` Yinghai Lu
2013-10-11 14:44 ` Marek Vasut
2013-10-11 14:44 ` Marek Vasut
2013-10-11 15:24 ` Tim Harvey
2013-10-11 15:24 ` Tim Harvey
2013-10-11 20:13 ` Marek Vasut
2013-10-11 20:13 ` Marek Vasut
2013-10-12 2:16 ` Zhu Richard-R65037
2013-10-12 2:16 ` Zhu Richard-R65037
2013-10-12 2:30 ` Marek Vasut
2013-10-12 2:30 ` Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201310101543.29145.marex@denx.de \
--to=marex@denx.de \
--cc=bhelgaas@google.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=lznuaa@gmail.com \
--cc=r65037@freescale.com \
--cc=s.hauer@pengutronix.de \
--cc=shawn.guo@linaro.org \
--cc=tharvey@gateworks.com \
--cc=xobs@kosagi.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.