From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Wed, 7 May 2014 22:17:00 -0500 [thread overview]
Message-ID: <20140508031700.GO7047@lukather> (raw)
In-Reply-To: <1399483554-8824-8-git-send-email-boris.brezillon@free-electrons.com>
On Wed, May 07, 2014 at 07:25:54PM +0200, Boris BREZILLON wrote:
> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
> controller subdevices.
>
> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 39 ++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index ec3253a..b69be0b 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -498,9 +498,46 @@
> reg = <0x01f01c00 0x300>;
> };
>
> - prcm at 01f01c00 {
> + prcm at 01f01400 {
This has already been fixed by Hans.
> compatible = "allwinner,sun6i-a31-prcm";
> reg = <0x01f01400 0x200>;
> +
> + ar100: ar100_clk {
> + compatible = "allwinner,sun6i-a31-ar100-clk";
> + #clock-cells = <0>;
> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
> + };
> +
> + ahb0: ahb0_clk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clock-div = <1>;
> + clock-mult = <1>;
> + clocks = <&ar100>;
> + clock-output-names = "ahb0";
> + };
> +
> + apb0: apb0_clk {
> + compatible = "allwinner,sun6i-a31-apb0-clk";
> + #clock-cells = <0>;
> + clocks = <&ahb0>;
> + clock-output-names = "apb0";
> + };
> +
> + apb0_gates: apb0_gates_clk {
> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
> + #clock-cells = <1>;
> + clocks = <&apb0>;
> + clock-output-names = "apb0_pio", "apb0_ir",
> + "apb0_timer01", "apb0_p2wi",
timer01 ? is this a typo?
> + "apb0_uart", "apb0_1wire",
> + "apb0_i2c";
> + };
> +
> + apb0_rst: apb0_rst {
> + compatible = "allwinner,sun6i-a31-clock-reset";
> + #reset-cells = <1>;
> + };
> };
> };
> };
> --
> 1.8.3.2
>
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Boris BREZILLON
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: "Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
"Mike Turquette"
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Samuel Ortiz" <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
"Lee Jones" <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Chen-Yu Tsai" <wens-jdAy2FN1RRM@public.gmane.org>,
"Philipp Zabel" <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Shuge <shuge-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org>,
kevin-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org,
"Hans de Goede"
<hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
"Randy Dunlap" <rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org
Subject: Re: [PATCH v2 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Wed, 7 May 2014 22:17:00 -0500 [thread overview]
Message-ID: <20140508031700.GO7047@lukather> (raw)
In-Reply-To: <1399483554-8824-8-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 2079 bytes --]
On Wed, May 07, 2014 at 07:25:54PM +0200, Boris BREZILLON wrote:
> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
> controller subdevices.
>
> Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 39 ++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index ec3253a..b69be0b 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -498,9 +498,46 @@
> reg = <0x01f01c00 0x300>;
> };
>
> - prcm@01f01c00 {
> + prcm@01f01400 {
This has already been fixed by Hans.
> compatible = "allwinner,sun6i-a31-prcm";
> reg = <0x01f01400 0x200>;
> +
> + ar100: ar100_clk {
> + compatible = "allwinner,sun6i-a31-ar100-clk";
> + #clock-cells = <0>;
> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
> + };
> +
> + ahb0: ahb0_clk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clock-div = <1>;
> + clock-mult = <1>;
> + clocks = <&ar100>;
> + clock-output-names = "ahb0";
> + };
> +
> + apb0: apb0_clk {
> + compatible = "allwinner,sun6i-a31-apb0-clk";
> + #clock-cells = <0>;
> + clocks = <&ahb0>;
> + clock-output-names = "apb0";
> + };
> +
> + apb0_gates: apb0_gates_clk {
> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
> + #clock-cells = <1>;
> + clocks = <&apb0>;
> + clock-output-names = "apb0_pio", "apb0_ir",
> + "apb0_timer01", "apb0_p2wi",
timer01 ? is this a typo?
> + "apb0_uart", "apb0_1wire",
> + "apb0_i2c";
> + };
> +
> + apb0_rst: apb0_rst {
> + compatible = "allwinner,sun6i-a31-clock-reset";
> + #reset-cells = <1>;
> + };
> };
> };
> };
> --
> 1.8.3.2
>
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>,
"Mike Turquette" <mturquette@linaro.org>,
"Samuel Ortiz" <sameo@linux.intel.com>,
"Lee Jones" <lee.jones@linaro.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
Shuge <shuge@allwinnertech.com>,
kevin@allwinnertech.com, "Hans de Goede" <hdegoede@redhat.com>,
"Randy Dunlap" <rdunlap@infradead.org>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dev@linux-sunxi.org
Subject: Re: [PATCH v2 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Wed, 7 May 2014 22:17:00 -0500 [thread overview]
Message-ID: <20140508031700.GO7047@lukather> (raw)
In-Reply-To: <1399483554-8824-8-git-send-email-boris.brezillon@free-electrons.com>
[-- Attachment #1: Type: text/plain, Size: 2048 bytes --]
On Wed, May 07, 2014 at 07:25:54PM +0200, Boris BREZILLON wrote:
> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
> controller subdevices.
>
> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 39 ++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index ec3253a..b69be0b 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -498,9 +498,46 @@
> reg = <0x01f01c00 0x300>;
> };
>
> - prcm@01f01c00 {
> + prcm@01f01400 {
This has already been fixed by Hans.
> compatible = "allwinner,sun6i-a31-prcm";
> reg = <0x01f01400 0x200>;
> +
> + ar100: ar100_clk {
> + compatible = "allwinner,sun6i-a31-ar100-clk";
> + #clock-cells = <0>;
> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
> + };
> +
> + ahb0: ahb0_clk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clock-div = <1>;
> + clock-mult = <1>;
> + clocks = <&ar100>;
> + clock-output-names = "ahb0";
> + };
> +
> + apb0: apb0_clk {
> + compatible = "allwinner,sun6i-a31-apb0-clk";
> + #clock-cells = <0>;
> + clocks = <&ahb0>;
> + clock-output-names = "apb0";
> + };
> +
> + apb0_gates: apb0_gates_clk {
> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
> + #clock-cells = <1>;
> + clocks = <&apb0>;
> + clock-output-names = "apb0_pio", "apb0_ir",
> + "apb0_timer01", "apb0_p2wi",
timer01 ? is this a typo?
> + "apb0_uart", "apb0_1wire",
> + "apb0_i2c";
> + };
> +
> + apb0_rst: apb0_rst {
> + compatible = "allwinner,sun6i-a31-clock-reset";
> + #reset-cells = <1>;
> + };
> };
> };
> };
> --
> 1.8.3.2
>
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2014-05-08 3:17 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-07 17:25 [PATCH v2 0/7] mfd: add basic sun6i A31 PRCM support Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` [PATCH v2 1/7] reset: sunxi: document sunxi's reset controllers bindings Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-08 3:05 ` Maxime Ripard
2014-05-08 3:05 ` Maxime Ripard
2014-05-07 17:25 ` [PATCH v2 2/7] reset: sunxi: allow MFD subdevices probe Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-08 3:07 ` Maxime Ripard
2014-05-08 3:07 ` Maxime Ripard
2014-05-08 3:07 ` Maxime Ripard
2014-05-08 20:05 ` Boris BREZILLON
2014-05-08 20:05 ` Boris BREZILLON
2014-05-08 20:05 ` Boris BREZILLON
2014-05-07 17:25 ` [PATCH v2 3/7] mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-08 3:09 ` Maxime Ripard
2014-05-08 3:09 ` Maxime Ripard
2014-05-08 11:02 ` Lee Jones
2014-05-08 11:02 ` Lee Jones
2014-05-08 20:04 ` Boris BREZILLON
2014-05-08 20:04 ` Boris BREZILLON
2014-05-09 5:05 ` [linux-sunxi] " Priit Laes
2014-05-09 5:05 ` Priit Laes
2014-05-09 5:05 ` Priit Laes
2014-05-09 7:11 ` [linux-sunxi] " Lee Jones
2014-05-09 7:11 ` Lee Jones
2014-05-09 7:12 ` Lee Jones
2014-05-09 7:12 ` Lee Jones
2014-05-09 7:34 ` Hans de Goede
2014-05-09 7:34 ` Hans de Goede
2014-05-09 7:34 ` Hans de Goede
2014-05-09 8:08 ` Lee Jones
2014-05-09 8:08 ` Lee Jones
2014-05-09 8:08 ` Lee Jones
2014-05-09 8:18 ` Hans de Goede
2014-05-09 8:18 ` Hans de Goede
2014-05-09 8:28 ` Boris BREZILLON
2014-05-09 8:28 ` Boris BREZILLON
2014-05-09 8:28 ` Boris BREZILLON
2014-05-09 8:59 ` Lee Jones
2014-05-09 8:59 ` Lee Jones
2014-05-07 17:25 ` [PATCH v2 4/7] mfd: sun6i-prcm: document DT bindings Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` [PATCH v2 5/7] clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-08 3:11 ` Maxime Ripard
2014-05-08 3:11 ` Maxime Ripard
2014-05-08 3:11 ` Maxime Ripard
2014-05-07 17:25 ` [PATCH v2 6/7] clk: sunxi: document PRCM clock compatible strings Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` [PATCH v2 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-07 17:25 ` Boris BREZILLON
2014-05-08 3:17 ` Maxime Ripard [this message]
2014-05-08 3:17 ` Maxime Ripard
2014-05-08 3:17 ` Maxime Ripard
2014-05-08 3:40 ` Chen-Yu Tsai
2014-05-08 3:40 ` Chen-Yu Tsai
2014-05-08 3:40 ` Chen-Yu Tsai
2014-05-08 14:29 ` Maxime Ripard
2014-05-08 14:29 ` Maxime Ripard
2014-05-08 14:29 ` Maxime Ripard
2014-05-08 20:08 ` Boris BREZILLON
2014-05-08 20:08 ` Boris BREZILLON
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