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From: Tony Lindgren <tony@atomide.com>
To: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>,
	Linux OMAP Mailing List <linux-omap@vger.kernel.org>,
	Nishanth Menon <nm@ti.com>, Felipe Balbi <balbi@ti.com>,
	Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
	Russell King <rmk+kernel@arm.linux.org.uk>
Subject: Re: [PATCH v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting
Date: Mon, 14 Jul 2014 09:25:52 -0700	[thread overview]
Message-ID: <20140714162551.GG20068@atomide.com> (raw)
In-Reply-To: <53C3E9BD.9010104@ti.com>

* Santosh Shilimkar <santosh.shilimkar@ti.com> [140714 07:33]:
> On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote:
> > On OMAP SOCs using PL310 controllers, power_ctrl register is not
> > accessible from non-secure software even on PL310 versions which
> > support it. The secure code takes care of setting it up correctly
> > and power transitions are proven on these devices.
> > 
> > For example, AM437x has L2C-310 version r3p3 and ROM code on that
> > device does not support writing to L2C-310 power control register.
> > The L2C driver, however, tries writing to this register for all
> > revisions >= r3p0.
> > 
> > This leads to a warning dump on boot which leads most users to believe
> > that L2 cache is non-functional.
> > 
> > Since the problem is understood, and cannot be addressed through
> > software, replace the warning with a pr_info() while maintaining the
> > WARN_ON() for other truly unexpected scenarios.
> > 
> > Reported-by: Nishanth Menon <nm@ti.com>
> > Tested-by: Felipe Balbi <balbi@ti.com>
> > Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> > ---
> > Only description updated since v1
> > 
> Thanks for update.
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> 

Thanks applying into omap-for-v3.16/fixes.

Tony 

WARNING: multiple messages have this Message-ID (diff)
From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting
Date: Mon, 14 Jul 2014 09:25:52 -0700	[thread overview]
Message-ID: <20140714162551.GG20068@atomide.com> (raw)
In-Reply-To: <53C3E9BD.9010104@ti.com>

* Santosh Shilimkar <santosh.shilimkar@ti.com> [140714 07:33]:
> On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote:
> > On OMAP SOCs using PL310 controllers, power_ctrl register is not
> > accessible from non-secure software even on PL310 versions which
> > support it. The secure code takes care of setting it up correctly
> > and power transitions are proven on these devices.
> > 
> > For example, AM437x has L2C-310 version r3p3 and ROM code on that
> > device does not support writing to L2C-310 power control register.
> > The L2C driver, however, tries writing to this register for all
> > revisions >= r3p0.
> > 
> > This leads to a warning dump on boot which leads most users to believe
> > that L2 cache is non-functional.
> > 
> > Since the problem is understood, and cannot be addressed through
> > software, replace the warning with a pr_info() while maintaining the
> > WARN_ON() for other truly unexpected scenarios.
> > 
> > Reported-by: Nishanth Menon <nm@ti.com>
> > Tested-by: Felipe Balbi <balbi@ti.com>
> > Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> > ---
> > Only description updated since v1
> > 
> Thanks for update.
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> 

Thanks applying into omap-for-v3.16/fixes.

Tony 

  reply	other threads:[~2014-07-14 16:27 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-14 13:13 [PATCH v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting Sekhar Nori
2014-07-14 13:13 ` Sekhar Nori
2014-07-14 14:31 ` Santosh Shilimkar
2014-07-14 14:31   ` Santosh Shilimkar
2014-07-14 16:25   ` Tony Lindgren [this message]
2014-07-14 16:25     ` Tony Lindgren

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