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* [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend
@ 2014-08-13 10:51 Chris Wilson
  2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
  2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
  0 siblings, 2 replies; 8+ messages in thread
From: Chris Wilson @ 2014-08-13 10:51 UTC (permalink / raw)
  To: intel-gfx

As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS tries to read our GTT).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h     |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++++++++++++-
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d1513e6ea50d..d0222cb9b7a5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2082,7 +2082,7 @@ struct drm_i915_cmd_table {
 
 /* Note that the (struct drm_i915_private *) cast is just to shut up gcc. */
 #define __I915__(p)	((sizeof(*(p)) == sizeof(struct drm_i915_private)) ? \
-			 (struct drm_i915_private *)(p) : to_i915(p))
+			 (struct drm_i915_private *)(p) : to_i915((struct drm_device *)p))
 #define INTEL_INFO(p) 	(&__I915__(p)->info)
 #define INTEL_DEVID(p)	(INTEL_INFO(p)->device_id)
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f3fd448505f1..b8d5a5d67a73 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1316,6 +1316,16 @@ void i915_check_and_clear_faults(struct drm_device *dev)
 	POSTING_READ(RING_FAULT_REG(&dev_priv->ring[RCS]));
 }
 
+static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
+{
+	if (INTEL_INFO(dev_priv)->gen < 6) {
+		intel_gtt_chipset_flush();
+	} else {
+		I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
+		POSTING_READ(GFX_FLSH_CNTL_GEN6);
+	}
+}
+
 void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1332,6 +1342,8 @@ void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
 				       dev_priv->gtt.base.start,
 				       dev_priv->gtt.base.total,
 				       true);
+
+	i915_ggtt_flush(dev_priv);
 }
 
 void i915_gem_restore_gtt_mappings(struct drm_device *dev)
@@ -1384,7 +1396,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
 		gen6_write_pdes(container_of(vm, struct i915_hw_ppgtt, base));
 	}
 
-	i915_gem_chipset_flush(dev);
+	i915_ggtt_flush(dev_priv);
 }
 
 int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
-- 
2.1.0.rc1

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/i915: Some cleanups for the ppgtt lifetime handling
@ 2014-07-30 10:44 Daniel Vetter
  2014-07-30 10:44 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Daniel Vetter
  0 siblings, 1 reply; 8+ messages in thread
From: Daniel Vetter @ 2014-07-30 10:44 UTC (permalink / raw)
  To: Intel Graphics Development; +Cc: Daniel Vetter

So when reviewing Michel's patch I've noticed a few things and cleaned
them up:
- The early checks in ppgtt_release are now redundant: The inactive
  list should always be empty now, so we can ditch these checks. Even
  for the aliasing ppgtt (though that's a different confusion) since
  we tear that down after all the objects are gone.
- The ppgtt handling functions are splattered all over. Consolidate
  them in i915_gem_gtt.c, give them OCD prefixes and add wrappers for
  get/put.
- There was a bit a confusion in ppgtt_release about whether it cares
  about the active or inactive list. It should care about them both,
  so augment the WARNINGs to check for both.

There's still create_vm_for_ctx left to do, put that is blocked on the
removal of ppgtt->ctx. Once that's done we can rename it to
i915_ppgtt_create and move it to its siblings for handling ppgtts.

Cc: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_drv.h         |  1 -
 drivers/gpu/drm/i915/i915_gem.c         |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c | 35 ++++-----------------------------
 drivers/gpu/drm/i915/i915_gem_gtt.c     | 17 ++++++++++++++--
 drivers/gpu/drm/i915/i915_gem_gtt.h     | 12 ++++++++++-
 5 files changed, 31 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5fe3b1dfc34c..a89eb87e4af6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2497,7 +2497,6 @@ void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
 #define ctx_to_ppgtt(ctx) container_of((ctx)->vm, struct i915_hw_ppgtt, base)
 #define vm_to_ppgtt(vm) container_of(vm, struct i915_hw_ppgtt, base)
 int __must_check i915_gem_context_init(struct drm_device *dev);
-void ppgtt_release(struct kref *kref);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 25a32b9c9b4b..1a46be5d2979 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4511,7 +4511,7 @@ void i915_gem_vma_destroy(struct i915_vma *vma)
 	ppgtt = vm_to_ppgtt(vm);
 
 	if (ppgtt)
-		kref_put(&ppgtt->ref, ppgtt_release);
+		i915_ppgtt_put(ppgtt);
 
 	list_del(&vma->vma_link);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index ae706cba05ae..603a227e3aaa 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -96,33 +96,6 @@
 #define GEN6_CONTEXT_ALIGN (64<<10)
 #define GEN7_CONTEXT_ALIGN 4096
 
-static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
-{
-	struct drm_device *dev = ppgtt->base.dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct i915_address_space *vm = &ppgtt->base;
-
-	if (ppgtt == dev_priv->mm.aliasing_ppgtt ||
-	    (list_empty(&vm->active_list) && list_empty(&vm->inactive_list))) {
-		ppgtt->base.cleanup(&ppgtt->base);
-		return;
-	}
-
-	/* vmas should already be unbound */
-	WARN_ON(!list_empty(&vm->active_list));
-
-	ppgtt->base.cleanup(&ppgtt->base);
-}
-
-void ppgtt_release(struct kref *kref)
-{
-	struct i915_hw_ppgtt *ppgtt =
-		container_of(kref, struct i915_hw_ppgtt, ref);
-
-	do_ppgtt_cleanup(ppgtt);
-	kfree(ppgtt);
-}
-
 static size_t get_context_alignment(struct drm_device *dev)
 {
 	if (IS_GEN6(dev))
@@ -172,7 +145,7 @@ void i915_gem_context_free(struct kref *ctx_ref)
 	}
 
 	if (ppgtt)
-		kref_put(&ppgtt->ref, ppgtt_release);
+		i915_ppgtt_put(ppgtt);
 	if (ctx->legacy_hw_ctx.rcs_state)
 		drm_gem_object_unreference(&ctx->legacy_hw_ctx.rcs_state->base);
 	list_del(&ctx->link);
@@ -219,7 +192,7 @@ create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
 	if (!ppgtt)
 		return ERR_PTR(-ENOMEM);
 
-	ret = i915_gem_init_ppgtt(dev, ppgtt);
+	ret = i915_ppgtt_init(dev, ppgtt);
 	if (ret) {
 		kfree(ppgtt);
 		return ERR_PTR(ret);
@@ -231,7 +204,7 @@ create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
 
 static struct intel_context *
 __create_hw_context(struct drm_device *dev,
-		  struct drm_i915_file_private *file_priv)
+		    struct drm_i915_file_private *file_priv)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_context *ctx;
@@ -339,7 +312,7 @@ i915_gem_create_context(struct drm_device *dev,
 		/* For platforms which only have aliasing PPGTT, we fake the
 		 * address space and refcounting. */
 		ctx->vm = &dev_priv->mm.aliasing_ppgtt->base;
-		kref_get(&dev_priv->mm.aliasing_ppgtt->ref);
+		i915_ppgtt_get(dev_priv->mm.aliasing_ppgtt);
 	} else
 		ctx->vm = &dev_priv->gtt.base;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 90c3d0fae3f1..58c8f99680a6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1191,7 +1191,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
 	return 0;
 }
 
-int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
+int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret = 0;
@@ -1222,6 +1222,19 @@ int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
 	return ret;
 }
 
+void  i915_ppgtt_release(struct kref *kref)
+{
+	struct i915_hw_ppgtt *ppgtt =
+		container_of(kref, struct i915_hw_ppgtt, ref);
+
+	/* vmas should already be unbound */
+	WARN_ON(!list_empty(&ppgtt->base.active_list));
+	WARN_ON(!list_empty(&ppgtt->base.inactive_list));
+
+	ppgtt->base.cleanup(&ppgtt->base);
+	kfree(ppgtt);
+}
+
 static void
 ppgtt_bind_vma(struct i915_vma *vma,
 	       enum i915_cache_level cache_level,
@@ -2167,7 +2180,7 @@ i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
 
 	ppgtt = vm_to_ppgtt(vm);
 	if (ppgtt)
-		kref_get(&ppgtt->ref);
+		i915_ppgtt_get(ppgtt);
 
 	return vma;
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 8d6f7c18c404..c2ff69e1f781 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -273,7 +273,17 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start,
 			       unsigned long mappable_end, unsigned long end);
 
 bool intel_enable_ppgtt(struct drm_device *dev, bool full);
-int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
+
+int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
+void i915_ppgtt_release(struct kref *kref);
+static inline void i915_ppgtt_get(struct i915_hw_ppgtt *ppgtt)
+{
+	kref_get(&ppgtt->ref);
+}
+static inline void i915_ppgtt_put(struct i915_hw_ppgtt *ppgtt)
+{
+	kref_put(&ppgtt->ref, i915_ppgtt_release);
+}
 
 void i915_check_and_clear_faults(struct drm_device *dev);
 void i915_gem_suspend_gtt_mappings(struct drm_device *dev);
-- 
2.0.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2014-08-13 12:23 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-08-13 10:51 [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Chris Wilson
2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
2014-08-13 11:32   ` Daniel Vetter
2014-08-13 11:45     ` Chris Wilson
2014-08-13 12:23       ` Daniel Vetter
2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
2014-08-13 11:46   ` Chris Wilson
  -- strict thread matches above, loose matches on Subject: below --
2014-07-30 10:44 [PATCH 1/2] drm/i915: Some cleanups for the ppgtt lifetime handling Daniel Vetter
2014-07-30 10:44 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Daniel Vetter

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