* [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend
@ 2014-08-13 10:51 Chris Wilson
2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
0 siblings, 2 replies; 8+ messages in thread
From: Chris Wilson @ 2014-08-13 10:51 UTC (permalink / raw)
To: intel-gfx
As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS tries to read our GTT).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++++++++++++-
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d1513e6ea50d..d0222cb9b7a5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2082,7 +2082,7 @@ struct drm_i915_cmd_table {
/* Note that the (struct drm_i915_private *) cast is just to shut up gcc. */
#define __I915__(p) ((sizeof(*(p)) == sizeof(struct drm_i915_private)) ? \
- (struct drm_i915_private *)(p) : to_i915(p))
+ (struct drm_i915_private *)(p) : to_i915((struct drm_device *)p))
#define INTEL_INFO(p) (&__I915__(p)->info)
#define INTEL_DEVID(p) (INTEL_INFO(p)->device_id)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f3fd448505f1..b8d5a5d67a73 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1316,6 +1316,16 @@ void i915_check_and_clear_faults(struct drm_device *dev)
POSTING_READ(RING_FAULT_REG(&dev_priv->ring[RCS]));
}
+static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
+{
+ if (INTEL_INFO(dev_priv)->gen < 6) {
+ intel_gtt_chipset_flush();
+ } else {
+ I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
+ POSTING_READ(GFX_FLSH_CNTL_GEN6);
+ }
+}
+
void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1332,6 +1342,8 @@ void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
dev_priv->gtt.base.start,
dev_priv->gtt.base.total,
true);
+
+ i915_ggtt_flush(dev_priv);
}
void i915_gem_restore_gtt_mappings(struct drm_device *dev)
@@ -1384,7 +1396,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
gen6_write_pdes(container_of(vm, struct i915_hw_ppgtt, base));
}
- i915_gem_chipset_flush(dev);
+ i915_ggtt_flush(dev_priv);
}
int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
--
2.1.0.rc1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs
2014-08-13 10:51 [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Chris Wilson
@ 2014-08-13 10:51 ` Chris Wilson
2014-08-13 11:32 ` Daniel Vetter
2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
1 sibling, 1 reply; 8+ messages in thread
From: Chris Wilson @ 2014-08-13 10:51 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter
From: Daniel Vetter <daniel.vetter@ffwll.ch>
That's right, back to where it was!
This effectively reverts
commit 9aa2062bb850e665b3b673b53bd90127d1215490
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed Aug 6 15:04:46 2014 +0200
drm/i915: Move i915_gem_chipset_flush to where it belongs
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++++++
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ------
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 --
3 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d0222cb9b7a5..8dbfa18c265b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3007,4 +3007,10 @@ wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms)
}
}
+static inline void i915_gem_chipset_flush(struct drm_device *dev)
+{
+ if (INTEL_INFO(dev)->gen < 6)
+ intel_gtt_chipset_flush();
+}
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b8d5a5d67a73..bbab8156b7ca 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2070,12 +2070,6 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
teardown_scratch_page(vm->dev);
}
-void i915_gem_chipset_flush(struct drm_device *dev)
-{
- if (INTEL_INFO(dev)->gen < 6)
- intel_gtt_chipset_flush();
-}
-
static int i915_gmch_probe(struct drm_device *dev,
size_t *gtt_total,
size_t *stolen,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 55de8aec0a33..6280648d4805 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -299,6 +299,4 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);
-void i915_gem_chipset_flush(struct drm_device *dev);
-
#endif
--
2.1.0.rc1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs
2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
@ 2014-08-13 11:32 ` Daniel Vetter
2014-08-13 11:45 ` Chris Wilson
0 siblings, 1 reply; 8+ messages in thread
From: Daniel Vetter @ 2014-08-13 11:32 UTC (permalink / raw)
To: Chris Wilson; +Cc: Daniel Vetter, intel-gfx
On Wed, Aug 13, 2014 at 11:51:55AM +0100, Chris Wilson wrote:
> From: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> That's right, back to where it was!
>
> This effectively reverts
Hm, why?
-Daniel
>
> commit 9aa2062bb850e665b3b673b53bd90127d1215490
> Author: Daniel Vetter <daniel.vetter@ffwll.ch>
> Date: Wed Aug 6 15:04:46 2014 +0200
>
> drm/i915: Move i915_gem_chipset_flush to where it belongs
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 6 ++++++
> drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ------
> drivers/gpu/drm/i915/i915_gem_gtt.h | 2 --
> 3 files changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d0222cb9b7a5..8dbfa18c265b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3007,4 +3007,10 @@ wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms)
> }
> }
>
> +static inline void i915_gem_chipset_flush(struct drm_device *dev)
> +{
> + if (INTEL_INFO(dev)->gen < 6)
> + intel_gtt_chipset_flush();
> +}
> +
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index b8d5a5d67a73..bbab8156b7ca 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2070,12 +2070,6 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
> teardown_scratch_page(vm->dev);
> }
>
> -void i915_gem_chipset_flush(struct drm_device *dev)
> -{
> - if (INTEL_INFO(dev)->gen < 6)
> - intel_gtt_chipset_flush();
> -}
> -
> static int i915_gmch_probe(struct drm_device *dev,
> size_t *gtt_total,
> size_t *stolen,
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 55de8aec0a33..6280648d4805 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -299,6 +299,4 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev);
> int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
> void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);
>
> -void i915_gem_chipset_flush(struct drm_device *dev);
> -
> #endif
> --
> 2.1.0.rc1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs
2014-08-13 11:32 ` Daniel Vetter
@ 2014-08-13 11:45 ` Chris Wilson
2014-08-13 12:23 ` Daniel Vetter
0 siblings, 1 reply; 8+ messages in thread
From: Chris Wilson @ 2014-08-13 11:45 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Daniel Vetter, intel-gfx
On Wed, Aug 13, 2014 at 01:32:31PM +0200, Daniel Vetter wrote:
> On Wed, Aug 13, 2014 at 11:51:55AM +0100, Chris Wilson wrote:
> > From: Daniel Vetter <daniel.vetter@ffwll.ch>
> >
> > That's right, back to where it was!
> >
> > This effectively reverts
>
> Hm, why?
Becuase it doesn't belong in i915_gem_gtt.c since the flush is not about
flushing the GGTT and it is not used in i915_gem_gtt.c
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs
2014-08-13 11:45 ` Chris Wilson
@ 2014-08-13 12:23 ` Daniel Vetter
0 siblings, 0 replies; 8+ messages in thread
From: Daniel Vetter @ 2014-08-13 12:23 UTC (permalink / raw)
To: Chris Wilson, Daniel Vetter, intel-gfx, Daniel Vetter
On Wed, Aug 13, 2014 at 12:45:11PM +0100, Chris Wilson wrote:
> On Wed, Aug 13, 2014 at 01:32:31PM +0200, Daniel Vetter wrote:
> > On Wed, Aug 13, 2014 at 11:51:55AM +0100, Chris Wilson wrote:
> > > From: Daniel Vetter <daniel.vetter@ffwll.ch>
> > >
> > > That's right, back to where it was!
> > >
> > > This effectively reverts
> >
> > Hm, why?
>
> Becuase it doesn't belong in i915_gem_gtt.c since the flush is not about
> flushing the GGTT and it is not used in i915_gem_gtt.c
Indeed, makes sense. Dropped my original patch from dinq.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend
2014-08-13 10:51 [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Chris Wilson
2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
@ 2014-08-13 11:32 ` Daniel Vetter
2014-08-13 11:46 ` Chris Wilson
1 sibling, 1 reply; 8+ messages in thread
From: Daniel Vetter @ 2014-08-13 11:32 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, Aug 13, 2014 at 11:51:54AM +0100, Chris Wilson wrote:
> As we use WC updates of the PTE, we are responsible for notifying the
> hardware when to flush its TLBs. Do so after we zap all the PTEs before
> suspend (and the BIOS tries to read our GTT).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Imo would make more sense to add them to the clear_range functions.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 14 +++++++++++++-
> 2 files changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d1513e6ea50d..d0222cb9b7a5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2082,7 +2082,7 @@ struct drm_i915_cmd_table {
>
> /* Note that the (struct drm_i915_private *) cast is just to shut up gcc. */
> #define __I915__(p) ((sizeof(*(p)) == sizeof(struct drm_i915_private)) ? \
> - (struct drm_i915_private *)(p) : to_i915(p))
> + (struct drm_i915_private *)(p) : to_i915((struct drm_device *)p))
> #define INTEL_INFO(p) (&__I915__(p)->info)
> #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f3fd448505f1..b8d5a5d67a73 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1316,6 +1316,16 @@ void i915_check_and_clear_faults(struct drm_device *dev)
> POSTING_READ(RING_FAULT_REG(&dev_priv->ring[RCS]));
> }
>
> +static void i915_ggtt_flush(struct drm_i915_private *dev_priv)
> +{
> + if (INTEL_INFO(dev_priv)->gen < 6) {
> + intel_gtt_chipset_flush();
> + } else {
> + I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
> + POSTING_READ(GFX_FLSH_CNTL_GEN6);
> + }
> +}
> +
> void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -1332,6 +1342,8 @@ void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
> dev_priv->gtt.base.start,
> dev_priv->gtt.base.total,
> true);
> +
> + i915_ggtt_flush(dev_priv);
> }
>
> void i915_gem_restore_gtt_mappings(struct drm_device *dev)
> @@ -1384,7 +1396,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
> gen6_write_pdes(container_of(vm, struct i915_hw_ppgtt, base));
> }
>
> - i915_gem_chipset_flush(dev);
> + i915_ggtt_flush(dev_priv);
> }
>
> int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
> --
> 2.1.0.rc1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend
2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
@ 2014-08-13 11:46 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2014-08-13 11:46 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx
On Wed, Aug 13, 2014 at 01:32:08PM +0200, Daniel Vetter wrote:
> On Wed, Aug 13, 2014 at 11:51:54AM +0100, Chris Wilson wrote:
> > As we use WC updates of the PTE, we are responsible for notifying the
> > hardware when to flush its TLBs. Do so after we zap all the PTEs before
> > suspend (and the BIOS tries to read our GTT).
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> Imo would make more sense to add them to the clear_range functions.
They are not required in the clear_range function. Here it is only
required in the i915_gem_suspend_gtt_mapping() because a third party
is involved.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/i915: Some cleanups for the ppgtt lifetime handling
@ 2014-07-30 10:44 Daniel Vetter
2014-07-30 10:44 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Daniel Vetter
0 siblings, 1 reply; 8+ messages in thread
From: Daniel Vetter @ 2014-07-30 10:44 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
So when reviewing Michel's patch I've noticed a few things and cleaned
them up:
- The early checks in ppgtt_release are now redundant: The inactive
list should always be empty now, so we can ditch these checks. Even
for the aliasing ppgtt (though that's a different confusion) since
we tear that down after all the objects are gone.
- The ppgtt handling functions are splattered all over. Consolidate
them in i915_gem_gtt.c, give them OCD prefixes and add wrappers for
get/put.
- There was a bit a confusion in ppgtt_release about whether it cares
about the active or inactive list. It should care about them both,
so augment the WARNINGs to check for both.
There's still create_vm_for_ctx left to do, put that is blocked on the
removal of ppgtt->ctx. Once that's done we can rename it to
i915_ppgtt_create and move it to its siblings for handling ppgtts.
Cc: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_gem_context.c | 35 ++++-----------------------------
drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++++++++++++++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 12 ++++++++++-
5 files changed, 31 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5fe3b1dfc34c..a89eb87e4af6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2497,7 +2497,6 @@ void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj);
#define ctx_to_ppgtt(ctx) container_of((ctx)->vm, struct i915_hw_ppgtt, base)
#define vm_to_ppgtt(vm) container_of(vm, struct i915_hw_ppgtt, base)
int __must_check i915_gem_context_init(struct drm_device *dev);
-void ppgtt_release(struct kref *kref);
void i915_gem_context_fini(struct drm_device *dev);
void i915_gem_context_reset(struct drm_device *dev);
int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 25a32b9c9b4b..1a46be5d2979 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4511,7 +4511,7 @@ void i915_gem_vma_destroy(struct i915_vma *vma)
ppgtt = vm_to_ppgtt(vm);
if (ppgtt)
- kref_put(&ppgtt->ref, ppgtt_release);
+ i915_ppgtt_put(ppgtt);
list_del(&vma->vma_link);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index ae706cba05ae..603a227e3aaa 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -96,33 +96,6 @@
#define GEN6_CONTEXT_ALIGN (64<<10)
#define GEN7_CONTEXT_ALIGN 4096
-static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
-{
- struct drm_device *dev = ppgtt->base.dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct i915_address_space *vm = &ppgtt->base;
-
- if (ppgtt == dev_priv->mm.aliasing_ppgtt ||
- (list_empty(&vm->active_list) && list_empty(&vm->inactive_list))) {
- ppgtt->base.cleanup(&ppgtt->base);
- return;
- }
-
- /* vmas should already be unbound */
- WARN_ON(!list_empty(&vm->active_list));
-
- ppgtt->base.cleanup(&ppgtt->base);
-}
-
-void ppgtt_release(struct kref *kref)
-{
- struct i915_hw_ppgtt *ppgtt =
- container_of(kref, struct i915_hw_ppgtt, ref);
-
- do_ppgtt_cleanup(ppgtt);
- kfree(ppgtt);
-}
-
static size_t get_context_alignment(struct drm_device *dev)
{
if (IS_GEN6(dev))
@@ -172,7 +145,7 @@ void i915_gem_context_free(struct kref *ctx_ref)
}
if (ppgtt)
- kref_put(&ppgtt->ref, ppgtt_release);
+ i915_ppgtt_put(ppgtt);
if (ctx->legacy_hw_ctx.rcs_state)
drm_gem_object_unreference(&ctx->legacy_hw_ctx.rcs_state->base);
list_del(&ctx->link);
@@ -219,7 +192,7 @@ create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
if (!ppgtt)
return ERR_PTR(-ENOMEM);
- ret = i915_gem_init_ppgtt(dev, ppgtt);
+ ret = i915_ppgtt_init(dev, ppgtt);
if (ret) {
kfree(ppgtt);
return ERR_PTR(ret);
@@ -231,7 +204,7 @@ create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
static struct intel_context *
__create_hw_context(struct drm_device *dev,
- struct drm_i915_file_private *file_priv)
+ struct drm_i915_file_private *file_priv)
{
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_context *ctx;
@@ -339,7 +312,7 @@ i915_gem_create_context(struct drm_device *dev,
/* For platforms which only have aliasing PPGTT, we fake the
* address space and refcounting. */
ctx->vm = &dev_priv->mm.aliasing_ppgtt->base;
- kref_get(&dev_priv->mm.aliasing_ppgtt->ref);
+ i915_ppgtt_get(dev_priv->mm.aliasing_ppgtt);
} else
ctx->vm = &dev_priv->gtt.base;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 90c3d0fae3f1..58c8f99680a6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1191,7 +1191,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
return 0;
}
-int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
+int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
{
struct drm_i915_private *dev_priv = dev->dev_private;
int ret = 0;
@@ -1222,6 +1222,19 @@ int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
return ret;
}
+void i915_ppgtt_release(struct kref *kref)
+{
+ struct i915_hw_ppgtt *ppgtt =
+ container_of(kref, struct i915_hw_ppgtt, ref);
+
+ /* vmas should already be unbound */
+ WARN_ON(!list_empty(&ppgtt->base.active_list));
+ WARN_ON(!list_empty(&ppgtt->base.inactive_list));
+
+ ppgtt->base.cleanup(&ppgtt->base);
+ kfree(ppgtt);
+}
+
static void
ppgtt_bind_vma(struct i915_vma *vma,
enum i915_cache_level cache_level,
@@ -2167,7 +2180,7 @@ i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
ppgtt = vm_to_ppgtt(vm);
if (ppgtt)
- kref_get(&ppgtt->ref);
+ i915_ppgtt_get(ppgtt);
return vma;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 8d6f7c18c404..c2ff69e1f781 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -273,7 +273,17 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start,
unsigned long mappable_end, unsigned long end);
bool intel_enable_ppgtt(struct drm_device *dev, bool full);
-int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
+
+int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
+void i915_ppgtt_release(struct kref *kref);
+static inline void i915_ppgtt_get(struct i915_hw_ppgtt *ppgtt)
+{
+ kref_get(&ppgtt->ref);
+}
+static inline void i915_ppgtt_put(struct i915_hw_ppgtt *ppgtt)
+{
+ kref_put(&ppgtt->ref, i915_ppgtt_release);
+}
void i915_check_and_clear_faults(struct drm_device *dev);
void i915_gem_suspend_gtt_mappings(struct drm_device *dev);
--
2.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs
2014-07-30 10:44 [PATCH 1/2] drm/i915: Some cleanups for the ppgtt lifetime handling Daniel Vetter
@ 2014-07-30 10:44 ` Daniel Vetter
0 siblings, 0 replies; 8+ messages in thread
From: Daniel Vetter @ 2014-07-30 10:44 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
Include depency hell ftw! So need to move this into a real function.
Also fix up the header include order in i915_drv.h: The rule is to
always include core headers first, then local stuff.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_drv.h | 7 -------
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a89eb87e4af6..c783cfe5515d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2541,13 +2541,6 @@ int __must_check i915_gem_evict_something(struct drm_device *dev,
int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle);
int i915_gem_evict_everything(struct drm_device *dev);
-/* belongs in i915_gem_gtt.h */
-static inline void i915_gem_chipset_flush(struct drm_device *dev)
-{
- if (INTEL_INFO(dev)->gen < 6)
- intel_gtt_chipset_flush();
-}
-
/* i915_gem_stolen.c */
int i915_gem_init_stolen(struct drm_device *dev);
int i915_gem_stolen_setup_compression(struct drm_device *dev, int size, int fb_cpp);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 58c8f99680a6..9c9fac190ad4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2031,6 +2031,12 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
teardown_scratch_page(vm->dev);
}
+void i915_gem_chipset_flush(struct drm_device *dev)
+{
+ if (INTEL_INFO(dev)->gen < 6)
+ intel_gtt_chipset_flush();
+}
+
static int i915_gmch_probe(struct drm_device *dev,
size_t *gtt_total,
size_t *stolen,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index c2ff69e1f781..00148266ee6f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -292,4 +292,6 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);
+void i915_gem_chipset_flush(struct drm_device *dev);
+
#endif
--
2.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2014-08-13 12:23 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-08-13 10:51 [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Chris Wilson
2014-08-13 10:51 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Chris Wilson
2014-08-13 11:32 ` Daniel Vetter
2014-08-13 11:45 ` Chris Wilson
2014-08-13 12:23 ` Daniel Vetter
2014-08-13 11:32 ` [PATCH 1/2] drm/i915: Flush the PTEs after updating them before suspend Daniel Vetter
2014-08-13 11:46 ` Chris Wilson
-- strict thread matches above, loose matches on Subject: below --
2014-07-30 10:44 [PATCH 1/2] drm/i915: Some cleanups for the ppgtt lifetime handling Daniel Vetter
2014-07-30 10:44 ` [PATCH 2/2] drm/i915: Move i915_gem_chipset_flush to where it belongs Daniel Vetter
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